arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences.
This commit is contained in:
Gregory Nutt
parent
c8793637ee
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474
arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
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474
arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
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/********************************************************************************************
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* arch/arm/src/kinetis/chip/kinetis_k64pinmux.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************/
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#ifndef __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H
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#define __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H
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/********************************************************************************************
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* Included Files
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********************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#ifdef KINETIS_K64
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/********************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************/
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/* Reference: Paragraph 10.3.1, p 258, of FreeScale document K60P144M100SF2RM
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*
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* In most cases, there are alternative configurations for various pins. Those alternative
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* pins are labeled with a suffix like _1, _2, etc. in order to distinguish them. Logic in
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* the board.h file must select the correct pin configuration for the board by defining a pin
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* configuration (with no suffix) that maps to the correct alternative.
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*/
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#define PIN_TSI0_CH1 (PIN_ANALOG | PIN_PORTA | PIN0)
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#define PIN_UART0_CTS_1 (PIN_ALT2 | PIN_PORTA | PIN0)
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#define PIN_FTM0_CH5_1 (PIN_ALT3 | PIN_PORTA | PIN0)
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#define PIN_JTAG_TCLK (PIN_ALT7 | PIN_PORTA | PIN0)
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#define PIN_SWD_CLK (PIN_ALT7 | PIN_PORTA | PIN0)
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#define PIN_TSI0_CH2 (PIN_ANALOG | PIN_PORTA | PIN1)
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#define PIN_UART0_RX_1 (PIN_ALT2 | PIN_PORTA | PIN1)
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#define PIN_FTM0_CH6_1 (PIN_ALT3 | PIN_PORTA | PIN1)
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#define PIN_JTAG_TDI (PIN_ALT7 | PIN_PORTA | PIN1)
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#define PIN_TSI0_CH3 (PIN_ANALOG | PIN_PORTA | PIN2)
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#define PIN_UART0_TX_1 (PIN_ALT2 | PIN_PORTA | PIN2)
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#define PIN_FTM0_CH7_1 (PIN_ALT3 | PIN_PORTA | PIN2)
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#define PIN_JTAG_TDO (PIN_ALT7 | PIN_PORTA | PIN2)
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#define PIN_TRACE_SWO (PIN_ALT7 | PIN_PORTA | PIN2)
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#define PIN_TSI0_CH4 (PIN_ANALOG | PIN_PORTA | PIN3)
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#define PIN_UART0_RTS_1 (PIN_ALT2 | PIN_PORTA | PIN3)
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#define PIN_FTM0_CH0_1 (PIN_ALT3 | PIN_PORTA | PIN3)
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#define PIN_JTAG_TMS (PIN_ALT7 | PIN_PORTA | PIN3)
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#define PIN_SWD_DIO (PIN_ALT7 | PIN_PORTA | PIN3)
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#define PIN_TSI0_CH5 (PIN_ANALOG | PIN_PORTA | PIN4)
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#define PIN_FTM0_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN4)
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#define PIN_NMI (PIN_ALT7 | PIN_PORTA | PIN4)
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#define PIN_FTM0_CH2_1 (PIN_ALT3 | PIN_PORTA | PIN5)
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#if 0
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# define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
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# define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
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#else
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# define PIN_RMII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
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# define PIN_MII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
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#endif
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#define PIN_CMP2_OUT_1 (PIN_ALT5 | PIN_PORTA | PIN5)
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#define PIN_I2S0_RX_BCLK_1 (PIN_ALT6 | PIN_PORTA | PIN5)
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#define PIN_JTAG_TRST (PIN_ALT7 | PIN_PORTA | PIN5)
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#define PIN_FTM0_CH3_1 (PIN_ALT3 | PIN_PORTA | PIN6)
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#define PIN_TRACE_CLKOUT (PIN_ALT7 | PIN_PORTA | PIN6)
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#define PIN_ADC0_SE10 (PIN_ANALOG | PIN_PORTA | PIN7)
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#define PIN_FTM0_CH4_1 (PIN_ALT3 | PIN_PORTA | PIN7)
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#define PIN_TRACE_D3 (PIN_ALT7 | PIN_PORTA | PIN7)
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#define PIN_ADC0_SE11 (PIN_ANALOG | PIN_PORTA | PIN8)
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#define PIN_FTM1_CH0_1 (PIN_ALT3 | PIN_PORTA | PIN8)
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#define PIN_FTM1_QD_PHA_1 (PIN_ALT6 | PIN_PORTA | PIN8)
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#define PIN_TRACE_D2 (PIN_ALT7 | PIN_PORTA | PIN8)
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#define PIN_FTM1_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN9)
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#define PIN_MII0_RXD3 (PIN_ALT4 | PIN_PORTA | PIN9)
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#define PIN_FTM1_QD_PHB_1 (PIN_ALT6 | PIN_PORTA | PIN9)
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#define PIN_TRACE_D1 (PIN_ALT7 | PIN_PORTA | PIN9)
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#define PIN_FTM2_CH0_1 (PIN_ALT3 | PIN_PORTA | PIN10)
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#define PIN_MII0_RXD2 (PIN_ALT4 | PIN_PORTA | PIN10)
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#define PIN_FTM2_QD_PHA_1 (PIN_ALT6 | PIN_PORTA | PIN10)
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#define PIN_TRACE_D0 (PIN_ALT7 | PIN_PORTA | PIN10)
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#define PIN_FTM2_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN11)
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#define PIN_MII0_RXCLK (PIN_ALT4 | PIN_PORTA | PIN11)
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#define PIN_FTM2_QD_PHB_1 (PIN_ALT6 | PIN_PORTA | PIN11)
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#define PIN_CMP2_IN0 (PIN_ANALOG | PIN_PORTA | PIN12)
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#define PIN_CAN0_TX_1 (PIN_ALT2 | PIN_PORTA | PIN12)
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#define PIN_FTM1_CH0_2 (PIN_ALT3 | PIN_PORTA | PIN12)
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#define PIN_RMII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12)
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#define PIN_MII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12)
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#define PIN_I2S0_TXD_1 (PIN_ALT6 | PIN_PORTA | PIN12)
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#define PIN_FTM1_QD_PHA_2 (PIN_ALT7 | PIN_PORTA | PIN12)
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#define PIN_CMP2_IN1 (PIN_ANALOG | PIN_PORTA | PIN13)
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#define PIN_CAN0_RX_1 (PIN_ALT2 | PIN_PORTA | PIN13)
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#define PIN_FTM1_CH1_2 (PIN_ALT3 | PIN_PORTA | PIN13)
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#define PIN_RMII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13)
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#define PIN_MII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13)
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#define PIN_I2S0_TX_FS_1 (PIN_ALT6 | PIN_PORTA | PIN13)
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#define PIN_FTM1_QD_PHB_2 (PIN_ALT7 | PIN_PORTA | PIN13)
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#define PIN_SPI0_PCS0_1 (PIN_ALT2 | PIN_PORTA | PIN14)
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#define PIN_UART0_TX_2 (PIN_ALT3 | PIN_PORTA | PIN14)
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#define PIN_RMII0_CRS_DV (PIN_ALT4 | PIN_PORTA | PIN14)
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#define PIN_MII0_RXDV (PIN_ALT4 | PIN_PORTA | PIN14)
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#define PIN_I2S0_TX_BCLK_1 (PIN_ALT6 | PIN_PORTA | PIN14)
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#define PIN_SPI0_SCK_1 (PIN_ALT2 | PIN_PORTA | PIN15)
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#define PIN_UART0_RX_2 (PIN_ALT3 | PIN_PORTA | PIN15)
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#define PIN_RMII0_TXEN (PIN_ALT4 | PIN_PORTA | PIN15)
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#define PIN_MII0_TXEN (PIN_ALT4 | PIN_PORTA | PIN15)
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#define PIN_I2S0_RXD_1 (PIN_ALT6 | PIN_PORTA | PIN15)
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#define PIN_SPI0_SOUT_1 (PIN_ALT2 | PIN_PORTA | PIN16)
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#define PIN_UART0_CTS_2 (PIN_ALT3 | PIN_PORTA | PIN16)
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#define PIN_RMII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16)
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#define PIN_MII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16)
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#define PIN_I2S0_RX_FS_1 (PIN_ALT6 | PIN_PORTA | PIN16)
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#define PIN_ADC1_SE17 (PIN_ANALOG | PIN_PORTA | PIN17)
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#define PIN_SPI0_SIN_1 (PIN_ALT2 | PIN_PORTA | PIN17)
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#define PIN_UART0_RTS_2 (PIN_ALT3 | PIN_PORTA | PIN17)
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#define PIN_RMII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17)
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#define PIN_MII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17)
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#define PIN_I2S0_MCLK_1 (PIN_ALT6 | PIN_PORTA | PIN17)
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#define PIN_I2S0_CLKIN_1 (PIN_ALT7 | PIN_PORTA | PIN17)
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#define PIN_EXTAL (PIN_ANALOG | PIN_PORTA | PIN18)
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#define PIN_FTM0_FLT2_1 (PIN_ALT3 | PIN_PORTA | PIN18)
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#define PIN_FTM_CLKIN0 (PIN_ALT4 | PIN_PORTA | PIN18)
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#define PIN_XTAL (PIN_ANALOG | PIN_PORTA | PIN19)
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#define PIN_FTM1_FLT0_1 (PIN_ALT3 | PIN_PORTA | PIN19)
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#define PIN_FTM_CLKIN1 (PIN_ALT4 | PIN_PORTA | PIN19)
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#define PIN_LPT0_ALT1 (PIN_ALT6 | PIN_PORTA | PIN19)
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#define PIN_MII0_TXD2 (PIN_ALT4 | PIN_PORTA | PIN24)
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#define PIN_FB_A29 (PIN_ALT6 | PIN_PORTA | PIN24)
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#define PIN_MII0_TXCLK (PIN_ALT4 | PIN_PORTA | PIN25)
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#define PIN_FB_A28 (PIN_ALT6 | PIN_PORTA | PIN25)
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#define PIN_MII0_TXD3 (PIN_ALT4 | PIN_PORTA | PIN26)
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#define PIN_FB_A27 (PIN_ALT6 | PIN_PORTA | PIN26)
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#define PIN_MII0_CRS (PIN_ALT4 | PIN_PORTA | PIN27)
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#define PIN_FB_A26 (PIN_ALT6 | PIN_PORTA | PIN27)
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#define PIN_MII0_TXER (PIN_ALT4 | PIN_PORTA | PIN28)
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#define PIN_FB_A25 (PIN_ALT6 | PIN_PORTA | PIN28)
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#define PIN_MII0_COL (PIN_ALT4 | PIN_PORTA | PIN29)
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#define PIN_FB_A24 (PIN_ALT6 | PIN_PORTA | PIN29)
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#define PIN_ADC0_SE8 (PIN_ANALOG | PIN_PORTB | PIN0)
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#define PIN_ADC1_SE8 (PIN_ANALOG | PIN_PORTB | PIN0)
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#define PIN_TSI0_CH0 (PIN_ANALOG | PIN_PORTB | PIN0)
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#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0)
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#define PIN_FTM1_CH0_3 (PIN_ALT3 | PIN_PORTB | PIN0)
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#define PIN_RMII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
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#define PIN_MII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
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#define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTB | PIN0)
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#define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTB | PIN1)
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#define PIN_ADC1_SE9 (PIN_ANALOG | PIN_PORTB | PIN1)
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#define PIN_TSI0_CH6 (PIN_ANALOG | PIN_PORTB | PIN1)
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#define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1)
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#define PIN_FTM1_CH1_3 (PIN_ALT3 | PIN_PORTB | PIN1)
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#define PIN_RMII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1)
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#define PIN_MII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1)
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#define PIN_FTM1_QD_PHB_3 (PIN_ALT6 | PIN_PORTB | PIN1)
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#define PIN_ADC0_SE12 (PIN_ANALOG | PIN_PORTB | PIN2)
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#define PIN_TSI0_CH7 (PIN_ANALOG | PIN_PORTB | PIN2)
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#define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2)
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#define PIN_UART0_RTS_3 (PIN_ALT3 | PIN_PORTB | PIN2)
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#define PIN_ENET0_1588_TMR0_1 (PIN_ALT4 | PIN_PORTB | PIN2)
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#define PIN_FTM0_FLT3 (PIN_ALT6 | PIN_PORTB | PIN2)
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#define PIN_ADC0_SE13 (PIN_ANALOG | PIN_PORTB | PIN3)
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#define PIN_TSI0_CH8 (PIN_ANALOG | PIN_PORTB | PIN3)
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#define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3)
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#define PIN_UART0_CTS_3 (PIN_ALT3 | PIN_PORTB | PIN3)
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#define PIN_ENET0_1588_TMR1_1 (PIN_ALT4 | PIN_PORTB | PIN3)
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#define PIN_FTM0_FLT0_2 (PIN_ALT6 | PIN_PORTB | PIN3)
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#define PIN_ADC1_SE10 (PIN_ANALOG | PIN_PORTB | PIN4)
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#define PIN_ENET0_1588_TMR2_1 (PIN_ALT4 | PIN_PORTB | PIN4)
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#define PIN_FTM1_FLT0_2 (PIN_ALT6 | PIN_PORTB | PIN4)
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#define PIN_ADC1_SE11 (PIN_ANALOG | PIN_PORTB | PIN5)
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#define PIN_ENET0_1588_TMR3_1 (PIN_ALT4 | PIN_PORTB | PIN5)
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#define PIN_FTM2_FLT0_1 (PIN_ALT6 | PIN_PORTB | PIN5)
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#define PIN_ADC1_SE12 (PIN_ANALOG | PIN_PORTB | PIN6)
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#define PIN_FB_AD23 (PIN_ALT5 | PIN_PORTB | PIN6)
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#define PIN_ADC1_SE13 (PIN_ANALOG | PIN_PORTB | PIN7)
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#define PIN_FB_AD22 (PIN_ALT5 | PIN_PORTB | PIN7)
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#define PIN_UART3_RTS_1 (PIN_ALT3 | PIN_PORTB | PIN8)
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#define PIN_FB_AD21 (PIN_ALT5 | PIN_PORTB | PIN8)
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#define PIN_SPI1_PCS1_1 (PIN_ALT2 | PIN_PORTB | PIN9)
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#define PIN_UART3_CTS_1 (PIN_ALT3 | PIN_PORTB | PIN9)
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#define PIN_FB_AD20 (PIN_ALT5 | PIN_PORTB | PIN9)
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#define PIN_ADC1_SE14 (PIN_ANALOG | PIN_PORTB | PIN10)
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#define PIN_SPI1_PCS0_1 (PIN_ALT2 | PIN_PORTB | PIN10)
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#define PIN_UART3_RX_1 (PIN_ALT3 | PIN_PORTB | PIN10)
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#define PIN_FB_AD19 (PIN_ALT5 | PIN_PORTB | PIN10)
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#define PIN_FTM0_FLT1_1 (PIN_ALT6 | PIN_PORTB | PIN10)
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#define PIN_ADC1_SE15 (PIN_ANALOG | PIN_PORTB | PIN11)
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#define PIN_SPI1_SCK_1 (PIN_ALT2 | PIN_PORTB | PIN11)
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#define PIN_UART3_TX_1 (PIN_ALT3 | PIN_PORTB | PIN11)
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#define PIN_FB_AD18 (PIN_ALT5 | PIN_PORTB | PIN11)
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#define PIN_FTM0_FLT2_2 (PIN_ALT6 | PIN_PORTB | PIN11)
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#define PIN_TSI0_CH9 (PIN_ANALOG | PIN_PORTB | PIN16)
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#define PIN_SPI1_SOUT_1 (PIN_ALT2 | PIN_PORTB | PIN16)
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#define PIN_UART0_RX_3 (PIN_ALT3 | PIN_PORTB | PIN16)
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#define PIN_FB_AD17 (PIN_ALT5 | PIN_PORTB | PIN16)
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#define PIN_EWM_IN_1 (PIN_ALT6 | PIN_PORTB | PIN16)
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#define PIN_TSI0_CH10 (PIN_ANALOG | PIN_PORTB | PIN17)
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#define PIN_SPI1_SIN_1 (PIN_ALT2 | PIN_PORTB | PIN17)
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#define PIN_UART0_TX_3 (PIN_ALT3 | PIN_PORTB | PIN17)
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#define PIN_FB_AD16 (PIN_ALT5 | PIN_PORTB | PIN17)
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#define PIN_EWM_OUT_1 (PIN_ALT6 | PIN_PORTB | PIN17)
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#define PIN_TSI0_CH11 (PIN_ANALOG | PIN_PORTB | PIN18)
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#define PIN_CAN0_TX_2 (PIN_ALT2 | PIN_PORTB | PIN18)
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#define PIN_FTM2_CH0_2 (PIN_ALT3 | PIN_PORTB | PIN18)
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#define PIN_I2S0_TX_BCLK_2 (PIN_ALT4 | PIN_PORTB | PIN18)
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#define PIN_FB_AD15 (PIN_ALT5 | PIN_PORTB | PIN18)
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#define PIN_FTM2_QD_PHA_2 (PIN_ALT6 | PIN_PORTB | PIN18)
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#define PIN_TSI0_CH12 (PIN_ANALOG | PIN_PORTB | PIN19)
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#define PIN_CAN0_RX_2 (PIN_ALT2 | PIN_PORTB | PIN19)
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#define PIN_FTM2_CH1_2 (PIN_ALT3 | PIN_PORTB | PIN19)
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#define PIN_I2S0_TX_FS_2 (PIN_ALT4 | PIN_PORTB | PIN19)
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#define PIN_FB_OE (PIN_ALT5 | PIN_PORTB | PIN19)
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#define PIN_FTM2_QD_PHB_2 (PIN_ALT6 | PIN_PORTB | PIN19)
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#define PIN_SPI2_PCS0_1 (PIN_ALT2 | PIN_PORTB | PIN20)
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#define PIN_FB_AD31 (PIN_ALT5 | PIN_PORTB | PIN20)
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#define PIN_CMP0_OUT_1 (PIN_ALT6 | PIN_PORTB | PIN20)
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#define PIN_SPI2_SCK_1 (PIN_ALT2 | PIN_PORTB | PIN21)
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#define PIN_FB_AD30 (PIN_ALT5 | PIN_PORTB | PIN21)
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#define PIN_CMP1_OUT_1 (PIN_ALT6 | PIN_PORTB | PIN21)
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#define PIN_SPI2_SOUT_1 (PIN_ALT2 | PIN_PORTB | PIN22)
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#define PIN_FB_AD29 (PIN_ALT5 | PIN_PORTB | PIN22)
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#define PIN_CMP2_OUT_2 (PIN_ALT6 | PIN_PORTB | PIN22)
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#define PIN_SPI2_SIN_1 (PIN_ALT2 | PIN_PORTB | PIN23)
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#define PIN_SPI0_PCS5 (PIN_ALT3 | PIN_PORTB | PIN23)
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#define PIN_FB_AD28 (PIN_ALT5 | PIN_PORTB | PIN23)
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#define PIN_ADC0_SE14 (PIN_ANALOG | PIN_PORTC | PIN0)
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#define PIN_TSI0_CH13 (PIN_ANALOG | PIN_PORTC | PIN0)
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#define PIN_SPI0_PCS4 (PIN_ALT2 | PIN_PORTC | PIN0)
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#define PIN_PDB0_EXTRG_1 (PIN_ALT3 | PIN_PORTC | PIN0)
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#define PIN_I2S0_TXD_2 (PIN_ALT4 | PIN_PORTC | PIN0)
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#define PIN_FB_AD14 (PIN_ALT5 | PIN_PORTC | PIN0)
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#define PIN_ADC0_SE15 (PIN_ANALOG | PIN_PORTC | PIN1)
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#define PIN_TSI0_CH14 (PIN_ANALOG | PIN_PORTC | PIN1)
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#define PIN_SPI0_PCS3_1 (PIN_ALT2 | PIN_PORTC | PIN1)
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#define PIN_UART1_RTS_1 (PIN_ALT3 | PIN_PORTC | PIN1)
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#define PIN_FTM0_CH0_2 (PIN_ALT4 | PIN_PORTC | PIN1)
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#define PIN_FB_AD13 (PIN_ALT5 | PIN_PORTC | PIN1)
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#define PIN_ADC0_SE4B (PIN_ANALOG | PIN_PORTC | PIN2)
|
||||
#define PIN_CMP1_IN0 (PIN_ANALOG | PIN_PORTC | PIN2)
|
||||
#define PIN_TSI0_CH15 (PIN_ANALOG | PIN_PORTC | PIN2)
|
||||
#define PIN_SPI0_PCS2_2 (PIN_ALT2 | PIN_PORTC | PIN2)
|
||||
#define PIN_UART1_CTS_1 (PIN_ALT3 | PIN_PORTC | PIN2)
|
||||
#define PIN_FTM0_CH1_2 (PIN_ALT4 | PIN_PORTC | PIN2)
|
||||
#define PIN_FB_AD12 (PIN_ALT5 | PIN_PORTC | PIN2)
|
||||
#define PIN_CMP1_IN1 (PIN_ANALOG | PIN_PORTC | PIN3)
|
||||
#define PIN_SPI0_PCS1_1 (PIN_ALT2 | PIN_PORTC | PIN3)
|
||||
#define PIN_UART1_RX_1 (PIN_ALT3 | PIN_PORTC | PIN3)
|
||||
#define PIN_FTM0_CH2_2 (PIN_ALT4 | PIN_PORTC | PIN3)
|
||||
#define PIN_FB_CLKOUT (PIN_ALT5 | PIN_PORTC | PIN3)
|
||||
#define PIN_SPI0_PCS0_2 (PIN_ALT2 | PIN_PORTC | PIN4)
|
||||
#define PIN_UART1_TX_1 (PIN_ALT3 | PIN_PORTC | PIN4)
|
||||
#define PIN_FTM0_CH3_2 (PIN_ALT4 | PIN_PORTC | PIN4)
|
||||
#define PIN_FB_AD11 (PIN_ALT5 | PIN_PORTC | PIN4)
|
||||
#define PIN_CMP1_OUT_2 (PIN_ALT6 | PIN_PORTC | PIN4)
|
||||
#define PIN_SPI0_SCK_2 (PIN_ALT2 | PIN_PORTC | PIN5)
|
||||
#define PIN_LPT0_ALT2 (PIN_ALT4 | PIN_PORTC | PIN5)
|
||||
#define PIN_FB_AD10 (PIN_ALT5 | PIN_PORTC | PIN5)
|
||||
#define PIN_CMP0_OUT_2 (PIN_ALT6 | PIN_PORTC | PIN5)
|
||||
#define PIN_CMP0_IN0 (PIN_ANALOG | PIN_PORTC | PIN6)
|
||||
#define PIN_SPI0_SOUT_2 (PIN_ALT2 | PIN_PORTC | PIN6)
|
||||
#define PIN_PDB0_EXTRG_2 (PIN_ALT3 | PIN_PORTC | PIN6)
|
||||
#define PIN_FB_AD9 (PIN_ALT5 | PIN_PORTC | PIN6)
|
||||
#define PIN_CMP0_IN1 (PIN_ANALOG | PIN_PORTC | PIN7)
|
||||
#define PIN_SPI0_SIN_2 (PIN_ALT2 | PIN_PORTC | PIN7)
|
||||
#define PIN_FB_AD8 (PIN_ALT5 | PIN_PORTC | PIN7)
|
||||
#define PIN_ADC1_SE4B (PIN_ANALOG | PIN_PORTC | PIN8)
|
||||
#define PIN_CMP0_IN2 (PIN_ANALOG | PIN_PORTC | PIN8)
|
||||
#define PIN_I2S0_MCLK_2 (PIN_ALT3 | PIN_PORTC | PIN8)
|
||||
#define PIN_I2S0_CLKIN_2 (PIN_ALT4 | PIN_PORTC | PIN8)
|
||||
#define PIN_FB_AD7 (PIN_ALT5 | PIN_PORTC | PIN8)
|
||||
#define PIN_ADC1_SE5B (PIN_ANALOG | PIN_PORTC | PIN9)
|
||||
#define PIN_CMP0_IN3 (PIN_ANALOG | PIN_PORTC | PIN9)
|
||||
#define PIN_I2S0_RX_BCLK_2 (PIN_ALT4 | PIN_PORTC | PIN9)
|
||||
#define PIN_FB_AD6 (PIN_ALT5 | PIN_PORTC | PIN9)
|
||||
#define PIN_FTM2_FLT0_2 (PIN_ALT6 | PIN_PORTC | PIN9)
|
||||
#define PIN_ADC1_SE6B (PIN_ANALOG | PIN_PORTC | PIN10)
|
||||
#define PIN_CMP0_IN4 (PIN_ANALOG | PIN_PORTC | PIN10)
|
||||
#define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10)
|
||||
#define PIN_I2S0_RX_FS_2 (PIN_ALT4 | PIN_PORTC | PIN10)
|
||||
#define PIN_FB_AD5 (PIN_ALT5 | PIN_PORTC | PIN10)
|
||||
#define PIN_ADC1_SE7B (PIN_ANALOG | PIN_PORTC | PIN11)
|
||||
#define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11)
|
||||
#define PIN_I2S0_RXD_2 (PIN_ALT4 | PIN_PORTC | PIN11)
|
||||
#define PIN_FB_RW (PIN_ALT5 | PIN_PORTC | PIN11)
|
||||
#define PIN_UART4_RTS_1 (PIN_ALT3 | PIN_PORTC | PIN12)
|
||||
#define PIN_FB_AD27 (PIN_ALT5 | PIN_PORTC | PIN12)
|
||||
#define PIN_UART4_CTS_1 (PIN_ALT3 | PIN_PORTC | PIN13)
|
||||
#define PIN_FB_AD26 (PIN_ALT5 | PIN_PORTC | PIN13)
|
||||
#define PIN_UART4_RX_1 (PIN_ALT3 | PIN_PORTC | PIN14)
|
||||
#define PIN_FB_AD25 (PIN_ALT5 | PIN_PORTC | PIN14)
|
||||
#define PIN_UART4_TX_1 (PIN_ALT3 | PIN_PORTC | PIN15)
|
||||
#define PIN_FB_AD24 (PIN_ALT5 | PIN_PORTC | PIN15)
|
||||
#define PIN_CAN1_RX_1 (PIN_ALT2 | PIN_PORTC | PIN16)
|
||||
#define PIN_UART3_RX_2 (PIN_ALT3 | PIN_PORTC | PIN16)
|
||||
#define PIN_ENET0_1588_TMR0_2 (PIN_ALT4 | PIN_PORTC | PIN16)
|
||||
#define PIN_FB_CS5 (PIN_ALT5 | PIN_PORTC | PIN16)
|
||||
#define PIN_FB_TSIZ1 (PIN_ALT5 | PIN_PORTC | PIN16)
|
||||
#define PIN_FB_BE23_16_BLS15_8 (PIN_ALT5 | PIN_PORTC | PIN16)
|
||||
#define PIN_CAN1_TX_1 (PIN_ALT2 | PIN_PORTC | PIN17)
|
||||
#define PIN_UART3_TX_2 (PIN_ALT3 | PIN_PORTC | PIN17)
|
||||
#define PIN_ENET0_1588_TMR1_2 (PIN_ALT4 | PIN_PORTC | PIN17)
|
||||
#define PIN_FB_CS4 (PIN_ALT5 | PIN_PORTC | PIN17)
|
||||
#define PIN_FB_TSIZ0 (PIN_ALT5 | PIN_PORTC | PIN17)
|
||||
#define PIN_FB_BE31_24_BLS7_0 (PIN_ALT5 | PIN_PORTC | PIN17)
|
||||
#define PIN_UART3_RTS_2 (PIN_ALT3 | PIN_PORTC | PIN18)
|
||||
#define PIN_ENET0_1588_TMR2_2 (PIN_ALT4 | PIN_PORTC | PIN18)
|
||||
#define PIN_FB_TBST (PIN_ALT5 | PIN_PORTC | PIN18)
|
||||
#define PIN_FB_CS2 (PIN_ALT5 | PIN_PORTC | PIN18)
|
||||
#define PIN_FB_BE15_8_BLS23_16 (PIN_ALT5 | PIN_PORTC | PIN18)
|
||||
#define PIN_UART3_CTS_2 (PIN_ALT3 | PIN_PORTC | PIN19)
|
||||
#define PIN_ENET0_1588_TMR3_2 (PIN_ALT4 | PIN_PORTC | PIN19)
|
||||
#define PIN_FB_CS3 (PIN_ALT5 | PIN_PORTC | PIN19)
|
||||
#define PIN_FB_BE7_0_BLS31_24 (PIN_ALT5 | PIN_PORTC | PIN19)
|
||||
#define PIN_FB_TA (PIN_ALT6 | PIN_PORTC | PIN19)
|
||||
|
||||
#define PIN_SPI0_PCS0_3 (PIN_ALT2 | PIN_PORTD | PIN0)
|
||||
#define PIN_UART2_RTS (PIN_ALT3 | PIN_PORTD | PIN0)
|
||||
#define PIN_FB_ALE (PIN_ALT5 | PIN_PORTD | PIN0)
|
||||
#define PIN_FB_CS1 (PIN_ALT5 | PIN_PORTD | PIN0)
|
||||
#define PIN_FB_TS (PIN_ALT5 | PIN_PORTD | PIN0)
|
||||
#define PIN_ADC0_SE5B (PIN_ANALOG | PIN_PORTD | PIN1)
|
||||
#define PIN_SPI0_SCK_3 (PIN_ALT2 | PIN_PORTD | PIN1)
|
||||
#define PIN_UART2_CTS (PIN_ALT3 | PIN_PORTD | PIN1)
|
||||
#define PIN_FB_CS0 (PIN_ALT5 | PIN_PORTD | PIN1)
|
||||
#define PIN_SPI0_SOUT_3 (PIN_ALT2 | PIN_PORTD | PIN2)
|
||||
#define PIN_UART2_RX (PIN_ALT3 | PIN_PORTD | PIN2)
|
||||
#define PIN_FB_AD4 (PIN_ALT5 | PIN_PORTD | PIN2)
|
||||
#define PIN_SPI0_SIN_3 (PIN_ALT2 | PIN_PORTD | PIN3)
|
||||
#define PIN_UART2_TX (PIN_ALT3 | PIN_PORTD | PIN3)
|
||||
#define PIN_FB_AD3 (PIN_ALT5 | PIN_PORTD | PIN3)
|
||||
#define PIN_SPI0_PCS1_2 (PIN_ALT2 | PIN_PORTD | PIN4)
|
||||
#define PIN_UART0_RTS_4 (PIN_ALT3 | PIN_PORTD | PIN4)
|
||||
#define PIN_FTM0_CH4_2 (PIN_ALT4 | PIN_PORTD | PIN4)
|
||||
#define PIN_FB_AD2 (PIN_ALT5 | PIN_PORTD | PIN4)
|
||||
#define PIN_EWM_IN_2 (PIN_ALT6 | PIN_PORTD | PIN4)
|
||||
#define PIN_ADC0_SE6B (PIN_ANALOG | PIN_PORTD | PIN5)
|
||||
#define PIN_SPI0_PCS2_1 (PIN_ALT2 | PIN_PORTD | PIN5)
|
||||
#define PIN_UART0_CTS_4 (PIN_ALT3 | PIN_PORTD | PIN5)
|
||||
#define PIN_FTM0_CH5_2 (PIN_ALT4 | PIN_PORTD | PIN5)
|
||||
#define PIN_FB_AD1 (PIN_ALT5 | PIN_PORTD | PIN5)
|
||||
#define PIN_EWM_OUT_2 (PIN_ALT6 | PIN_PORTD | PIN5)
|
||||
#define PIN_ADC0_SE7B (PIN_ANALOG | PIN_PORTD | PIN6)
|
||||
#define PIN_SPI0_PCS3_2 (PIN_ALT2 | PIN_PORTD | PIN6)
|
||||
#define PIN_UART0_RX_4 (PIN_ALT3 | PIN_PORTD | PIN6)
|
||||
#define PIN_FTM0_CH6_2 (PIN_ALT4 | PIN_PORTD | PIN6)
|
||||
#define PIN_FB_AD0 (PIN_ALT5 | PIN_PORTD | PIN6)
|
||||
#define PIN_FTM0_FLT0_1 (PIN_ALT6 | PIN_PORTD | PIN6)
|
||||
#define PIN_CMT_IRO (PIN_ALT2 | PIN_PORTD | PIN7)
|
||||
#define PIN_UART0_TX_4 (PIN_ALT3 | PIN_PORTD | PIN7)
|
||||
#define PIN_FTM0_CH7_2 (PIN_ALT4 | PIN_PORTD | PIN7)
|
||||
#define PIN_FTM0_FLT1_2 (PIN_ALT6 | PIN_PORTD | PIN7)
|
||||
#define PIN_I2C0_SCL_3 (PIN_ALT2 | PIN_PORTD | PIN8)
|
||||
#define PIN_UART5_RX_1 (PIN_ALT3 | PIN_PORTD | PIN8)
|
||||
#define PIN_FB_A16 (PIN_ALT6 | PIN_PORTD | PIN8)
|
||||
#define PIN_I2C0_SDA_3 (PIN_ALT2 | PIN_PORTD | PIN9)
|
||||
#define PIN_UART5_TX_1 (PIN_ALT3 | PIN_PORTD | PIN9)
|
||||
#define PIN_FB_A17 (PIN_ALT6 | PIN_PORTD | PIN9)
|
||||
#define PIN_UART5_RTS_1 (PIN_ALT3 | PIN_PORTD | PIN10)
|
||||
#define PIN_FB_A18 (PIN_ALT6 | PIN_PORTD | PIN10)
|
||||
#define PIN_SPI2_PCS0_2 (PIN_ALT2 | PIN_PORTD | PIN11)
|
||||
#define PIN_UART5_CTS_1 (PIN_ALT3 | PIN_PORTD | PIN11)
|
||||
#define PIN_SDHC0_CLKIN (PIN_ALT4 | PIN_PORTD | PIN11)
|
||||
#define PIN_FB_A19 (PIN_ALT6 | PIN_PORTD | PIN11)
|
||||
#define PIN_SPI2_SCK_2 (PIN_ALT2 | PIN_PORTD | PIN12)
|
||||
#define PIN_SDHC0_D4 (PIN_ALT4 | PIN_PORTD | PIN12)
|
||||
#define PIN_FB_A20 (PIN_ALT6 | PIN_PORTD | PIN12)
|
||||
#define PIN_SPI2_SOUT_2 (PIN_ALT2 | PIN_PORTD | PIN13)
|
||||
#define PIN_SDHC0_D5 (PIN_ALT4 | PIN_PORTD | PIN13)
|
||||
#define PIN_FB_A21 (PIN_ALT6 | PIN_PORTD | PIN13)
|
||||
#define PIN_SPI2_SIN_2 (PIN_ALT2 | PIN_PORTD | PIN14)
|
||||
#define PIN_SDHC0_D6 (PIN_ALT4 | PIN_PORTD | PIN14)
|
||||
#define PIN_FB_A22 (PIN_ALT6 | PIN_PORTD | PIN14)
|
||||
#define PIN_SPI2_PCS1 (PIN_ALT2 | PIN_PORTD | PIN15)
|
||||
#define PIN_SDHC0_D7 (PIN_ALT4 | PIN_PORTD | PIN15)
|
||||
#define PIN_FB_A23 (PIN_ALT6 | PIN_PORTD | PIN15)
|
||||
|
||||
#define PIN_ADC1_SE4A (PIN_ANALOG | PIN_PORTE | PIN0)
|
||||
#define PIN_SPI1_PCS1_2 (PIN_ALT2 | PIN_PORTE | PIN0)
|
||||
#define PIN_UART1_TX_2 (PIN_ALT3 | PIN_PORTE | PIN0)
|
||||
#define PIN_SDHC0_D1 (PIN_ALT4 | PIN_PORTE | PIN0)
|
||||
#define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0)
|
||||
#define PIN_ADC1_SE5A (PIN_ANALOG | PIN_PORTE | PIN1)
|
||||
#define PIN_SPI1_SOUT_2 (PIN_ALT2 | PIN_PORTE | PIN1)
|
||||
#define PIN_UART1_RX_2 (PIN_ALT3 | PIN_PORTE | PIN1)
|
||||
#define PIN_SDHC0_D0 (PIN_ALT4 | PIN_PORTE | PIN1)
|
||||
#define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1)
|
||||
#define PIN_ADC1_SE6A (PIN_ANALOG | PIN_PORTE | PIN2)
|
||||
#define PIN_SPI1_SCK_2 (PIN_ALT2 | PIN_PORTE | PIN2)
|
||||
#define PIN_UART1_CTS_2 (PIN_ALT3 | PIN_PORTE | PIN2)
|
||||
#define PIN_SDHC0_DCLK (PIN_ALT4 | PIN_PORTE | PIN2)
|
||||
#define PIN_ADC1_SE7A (PIN_ANALOG | PIN_PORTE | PIN3)
|
||||
#define PIN_SPI1_SIN_2 (PIN_ALT2 | PIN_PORTE | PIN3)
|
||||
#define PIN_UART1_RTS_2 (PIN_ALT3 | PIN_PORTE | PIN3)
|
||||
#define PIN_SDHC0_CMD (PIN_ALT4 | PIN_PORTE | PIN3)
|
||||
#define PIN_SPI1_PCS0_2 (PIN_ALT2 | PIN_PORTE | PIN4)
|
||||
#define PIN_UART3_TX_3 (PIN_ALT3 | PIN_PORTE | PIN4)
|
||||
#define PIN_SDHC0_D3 (PIN_ALT4 | PIN_PORTE | PIN4)
|
||||
#define PIN_SPI1_PCS2 (PIN_ALT2 | PIN_PORTE | PIN5)
|
||||
#define PIN_UART3_RX_3 (PIN_ALT3 | PIN_PORTE | PIN5)
|
||||
#define PIN_SDHC0_D2 (PIN_ALT4 | PIN_PORTE | PIN5)
|
||||
#define PIN_SPI1_PCS3 (PIN_ALT2 | PIN_PORTE | PIN6)
|
||||
#define PIN_UART3_CTS_3 (PIN_ALT3 | PIN_PORTE | PIN6)
|
||||
#define PIN_I2S0_MCLK_3 (PIN_ALT4 | PIN_PORTE | PIN6)
|
||||
#define PIN_I2S0_CLKIN_3 (PIN_ALT6 | PIN_PORTE | PIN6)
|
||||
#define PIN_UART3_RTS_3 (PIN_ALT3 | PIN_PORTE | PIN7)
|
||||
#define PIN_I2S0_RXD_3 (PIN_ALT4 | PIN_PORTE | PIN7)
|
||||
#define PIN_UART5_TX_2 (PIN_ALT3 | PIN_PORTE | PIN8)
|
||||
#define PIN_I2S0_RX_FS_3 (PIN_ALT4 | PIN_PORTE | PIN8)
|
||||
#define PIN_UART5_RX_2 (PIN_ALT3 | PIN_PORTE | PIN9)
|
||||
#define PIN_I2S0_RX_BCLK_3 (PIN_ALT4 | PIN_PORTE | PIN9)
|
||||
#define PIN_UART5_CTS_2 (PIN_ALT3 | PIN_PORTE | PIN10)
|
||||
#define PIN_I2S0_TXD_3 (PIN_ALT4 | PIN_PORTE | PIN10)
|
||||
#define PIN_UART5_RTS_2 (PIN_ALT3 | PIN_PORTE | PIN11)
|
||||
#define PIN_I2S0_TX_FS_3 (PIN_ALT4 | PIN_PORTE | PIN11)
|
||||
#define PIN_I2S0_TX_BCLK_3 (PIN_ALT4 | PIN_PORTE | PIN12)
|
||||
#define PIN_ADC0_SE17 (PIN_ANALOG | PIN_PORTE | PIN24)
|
||||
#define PIN_CAN1_TX_2 (PIN_ALT2 | PIN_PORTE | PIN24)
|
||||
#define PIN_UART4_TX_2 (PIN_ALT3 | PIN_PORTE | PIN24)
|
||||
#define PIN_EWM_OUT_3 (PIN_ALT6 | PIN_PORTE | PIN24)
|
||||
#define PIN_ADC0_SE18 (PIN_ANALOG | PIN_PORTE | PIN25)
|
||||
#define PIN_CAN1_RX_2 (PIN_ALT2 | PIN_PORTE | PIN25)
|
||||
#define PIN_UART4_RX_2 (PIN_ALT3 | PIN_PORTE | PIN25)
|
||||
#define PIN_EWM_IN_3 (PIN_ALT6 | PIN_PORTE | PIN25)
|
||||
#define PIN_UART4_CTS_2 (PIN_ALT3 | PIN_PORTE | PIN26)
|
||||
#define PIN_ENET_1588_CLKIN (PIN_ALT4 | PIN_PORTE | PIN26)
|
||||
#define PIN_RTC_CLKOUT (PIN_ALT6 | PIN_PORTE | PIN26)
|
||||
#define PIN_USB_CLKIN (PIN_ALT7 | PIN_PORTE | PIN26)
|
||||
#define PIN_UART4_RTS_2 (PIN_ALT3 | PIN_PORTE | PIN27)
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Data
|
||||
********************************************************************************************/
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_K64 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHP_KINETIS_K64PINMUX_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_osc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_osc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@ -81,4 +81,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_OSC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIHP_KINETIS_OSC_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_pdb.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_pdb.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@ -83,6 +83,10 @@
|
||||
|
||||
#define KINETIS_PDB_PO0EN_OFFSET 0x0190 /* Pulse-Out 0 Enable Register */
|
||||
#define KINETIS_PDB_PO0DLY_OFFSET 0x0194 /* Pulse-Out 0 Delay Register */
|
||||
#ifdef KINETIS_K64
|
||||
# define KINETIS_PDB_PO1DLY_OFFSET 0x0198 /* Pulse-Out 1 Delay Register */
|
||||
# define KINETIS_PDB_PO2DLY_OFFSET 0x019c /* Pulse-Out 2 Delay Register */
|
||||
#endif
|
||||
|
||||
/* Register Addresses ***********************************************************************/
|
||||
|
||||
@ -119,6 +123,10 @@
|
||||
|
||||
#define KINETIS_PDB0_PO0EN (KINETIS_PDB0_BASE+KINETIS_PDB_PO0EN_OFFSET)
|
||||
#define KINETIS_PDB0_PO0DLY (KINETIS_PDB0_BASE+KINETIS_PDB_PO0DLY_OFFSET)
|
||||
#ifdef KINETIS_K64
|
||||
# define KINETIS_PDB0_PO1DLY (KINETIS_PDB0_BASE+KINETIS_PDB_PO1DLY_OFFSET)
|
||||
# define KINETIS_PDB0_PO2DLY (KINETIS_PDB0_BASE+KINETIS_PDB_PO2DLY_OFFSET)
|
||||
#endif
|
||||
|
||||
/* Register Bit Definitions *****************************************************************/
|
||||
|
||||
@ -252,4 +260,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PDB_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PDB_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_pit.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_pit.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -121,4 +121,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PIT_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PIT_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_pmc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_pmc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -108,4 +108,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PMC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PMC_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_port.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_port.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -426,4 +426,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PORT_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_PORT_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_rngb.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_rngb.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -158,4 +158,4 @@
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_NRNG && KINETIS_NRNG > 0 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_RNGB_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RNGB_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_rtc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_rtc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -59,7 +59,7 @@
|
||||
#define KINETIS_RTC_CR_OFFSET 0x0010 /* RTC Control Register */
|
||||
#define KINETIS_RTC_SR_OFFSET 0x0014 /* RTC Status Register */
|
||||
#define KINETIS_RTC_LR_OFFSET 0x0018 /* RTC Lock Register */
|
||||
#ifdef KINETIS_K40
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define KINETIS_RTC_IER_OFFSET 0x001c /* RTC Interrupt Enable Register (K40) */
|
||||
#endif
|
||||
#ifdef KINETIS_K60
|
||||
@ -77,7 +77,7 @@
|
||||
#define KINETIS_RTC_CR (KINETIS_RTC_BASE+KINETIS_RTC_CR_OFFSET)
|
||||
#define KINETIS_RTC_SR (KINETIS_RTC_BASE+KINETIS_RTC_SR_OFFSET)
|
||||
#define KINETIS_RTC_LR (KINETIS_RTC_BASE+KINETIS_RTC_LR_OFFSET)
|
||||
#ifdef KINETIS_K40
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define KINETIS_RTC_IER (KINETIS_RTC_BASE+KINETIS_RTC_IER_OFFSET)
|
||||
#endif
|
||||
#ifdef KINETIS_K60
|
||||
@ -141,7 +141,7 @@
|
||||
/* Bits 7-31: Reserved */
|
||||
/* RTC Interrupt Enable Register (32-bits, K40) */
|
||||
|
||||
#ifdef KINETIS_K40
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define RTC_IER_TIIE (1 << 0) /* Bit 0: Time Invalid Interrupt Enable */
|
||||
# define RTC_IER_TOIE (1 << 1) /* Bit 1: Time Overflow Interrupt Enable */
|
||||
# define RTC_IER_TAIE (1 << 2) /* Bit 2: Time Alarm Interrupt Enable */
|
||||
@ -167,7 +167,7 @@
|
||||
#define RTC_WAR_CRW (1 << 4) /* Bit 4: Control Register Write */
|
||||
#define RTC_WAR_SRW (1 << 5) /* Bit 5: Status Register Write */
|
||||
#define RTC_WAR_LRW (1 << 6) /* Bit 6: Lock Register Write */
|
||||
#ifdef KINETIS_K40
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define RTC_WAR_IERW (1 << 7) /* Bit 7: Interrupt Enable Register Write */
|
||||
#endif
|
||||
#ifdef KINETIS_K60
|
||||
@ -183,7 +183,7 @@
|
||||
#define RTC_RAR_CRR (1 << 4) /* Bit 4: Control Register Read */
|
||||
#define RTC_RAR_SRR (1 << 5) /* Bit 5: Status Register Read */
|
||||
#define RTC_RAR_LRR (1 << 6) /* Bit 6: Lock Register Read */
|
||||
#ifdef KINETIS_K40
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define RTC_RAR_IERR (1 << 7) /* Bit 7: Interrupt Enable Register Read */
|
||||
#endif
|
||||
#ifdef KINETIS_K60
|
||||
@ -204,4 +204,4 @@
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_NRTC && KINETIS_NRTC > 0 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_RTC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_RTC_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_sdhc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_sdhc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -385,4 +385,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SDHC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SDHC_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_sim.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_sim.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -489,29 +489,29 @@
|
||||
# define SIM_FCFG1_EESIZE_32B (9 << SIM_FCFG1_EESIZE_SHIFT) /* 32 Bytes */
|
||||
# define SIM_FCFG1_EESIZE_NONE (15 << SIM_FCFG1_EESIZE_SHIFT) /* 0 Bytes */
|
||||
/* Bits 20-23: Reserved */
|
||||
#ifdef KINETIS_K40
|
||||
#define SIM_FCFG1_PFSIZE_SHIFT (24) /* Bits 24-27: Program flash size (K40) */
|
||||
#define SIM_FCFG1_PFSIZE_MASK (15 << SIM_FCFG1_PFSIZE_SHIFT)
|
||||
# define SIM_FCFG1_PFSIZE_128KB (7 << SIM_FCFG1_PFSIZE_SHIFT) /* 128KB program flash, 4KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_256KB (9 << SIM_FCFG1_PFSIZE_SHIFT) /* 256KB program flash, 8KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_512KB (11 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_512KB2 (15 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
#define SIM_FCFG1_NVMSIZE_SHIFT (28) /* Bits 28-31: FlexNVM size (K40)*/
|
||||
#define SIM_FCFG1_NVMSIZE_MASK (15 << SIM_FCFG1_NVMSIZE_SHIFT)
|
||||
# define SIM_FCFG1_NVMSIZE_NONE (0 << SIM_FCFG1_NVMSIZE_SHIFT) /* 0KB FlexNVM */
|
||||
# define SIM_FCFG1_NVMSIZE_128KB (7 << SIM_FCFG1_NVMSIZE_SHIFT) /* 128KB FlexNVM, 16KB protection region */
|
||||
# define SIM_FCFG1_NVMSIZE_256KB (9 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
|
||||
# define SIM_FCFG1_NVMSIZE_256KB2 (15 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
|
||||
#if defined(KINETIS_K40) || defined(KINETIS_K64)
|
||||
# define SIM_FCFG1_PFSIZE_SHIFT (24) /* Bits 24-27: Program flash size (K40) */
|
||||
# define SIM_FCFG1_PFSIZE_MASK (15 << SIM_FCFG1_PFSIZE_SHIFT)
|
||||
# define SIM_FCFG1_PFSIZE_128KB (7 << SIM_FCFG1_PFSIZE_SHIFT) /* 128KB program flash, 4KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_256KB (9 << SIM_FCFG1_PFSIZE_SHIFT) /* 256KB program flash, 8KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_512KB (11 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
# define SIM_FCFG1_PFSIZE_512KB2 (15 << SIM_FCFG1_PFSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
# define SIM_FCFG1_NVMSIZE_SHIFT (28) /* Bits 28-31: FlexNVM size (K40)*/
|
||||
# define SIM_FCFG1_NVMSIZE_MASK (15 << SIM_FCFG1_NVMSIZE_SHIFT)
|
||||
# define SIM_FCFG1_NVMSIZE_NONE (0 << SIM_FCFG1_NVMSIZE_SHIFT) /* 0KB FlexNVM */
|
||||
# define SIM_FCFG1_NVMSIZE_128KB (7 << SIM_FCFG1_NVMSIZE_SHIFT) /* 128KB FlexNVM, 16KB protection region */
|
||||
# define SIM_FCFG1_NVMSIZE_256KB (9 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
|
||||
# define SIM_FCFG1_NVMSIZE_256KB2 (15 << SIM_FCFG1_NVMSIZE_SHIFT) /* 256KB FlexNVM, 32KB protection region */
|
||||
#endif
|
||||
|
||||
#ifdef KINETIS_K60
|
||||
#define SIM_FCFG1_FSIZE_SHIFT (24) /* Bits 24-31: Flash size (K60)*/
|
||||
#define SIM_FCFG1_FSIZE_MASK (0xff << SIM_FCFG1_FSIZE_SHIFT)
|
||||
# define SIM_FCFG1_FSIZE_32KB (2 << SIM_FCFG1_FSIZE_SHIFT) /* 32KB program flash, 1KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_64KB (4 << SIM_FCFG1_FSIZE_SHIFT) /* 64KB program flash, 2KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_128KB (6 << SIM_FCFG1_FSIZE_SHIFT) /* 128KB program flash, 4KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_256KB (8 << SIM_FCFG1_FSIZE_SHIFT) /* 256KB program flash, 8KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_512KB (12 << SIM_FCFG1_FSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_SHIFT (24) /* Bits 24-31: Flash size (K60)*/
|
||||
# define SIM_FCFG1_FSIZE_MASK (0xff << SIM_FCFG1_FSIZE_SHIFT)
|
||||
# define SIM_FCFG1_FSIZE_32KB (2 << SIM_FCFG1_FSIZE_SHIFT) /* 32KB program flash, 1KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_64KB (4 << SIM_FCFG1_FSIZE_SHIFT) /* 64KB program flash, 2KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_128KB (6 << SIM_FCFG1_FSIZE_SHIFT) /* 128KB program flash, 4KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_256KB (8 << SIM_FCFG1_FSIZE_SHIFT) /* 256KB program flash, 8KB protection region */
|
||||
# define SIM_FCFG1_FSIZE_512KB (12 << SIM_FCFG1_FSIZE_SHIFT) /* 512KB program flash, 16KB protection region */
|
||||
#endif
|
||||
|
||||
/* Flash Configuration Register 2 */
|
||||
@ -542,4 +542,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SIM_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_SIM_H */
|
||||
@ -52,7 +52,7 @@
|
||||
#include "up_internal.h"
|
||||
#include "kinetis_config.h"
|
||||
#include "chip.h"
|
||||
#include "kinetis_port.h"
|
||||
#include "chip/kinetis_port.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@ -45,7 +45,7 @@
|
||||
|
||||
#include "kinetis.h"
|
||||
#include "chip/kinetis_mcg.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
#include "chip/kinetis_fmc.h"
|
||||
#include "chip/kinetis_llwu.h"
|
||||
#include "chip/kinetis_pinmux.h"
|
||||
|
||||
@ -66,7 +66,7 @@
|
||||
#include "kinetis.h"
|
||||
#include "kinetis_config.h"
|
||||
#include "chip/kinetis_pinmux.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
#include "chip/kinetis_mpu.h"
|
||||
#include "chip/kinetis_enet.h"
|
||||
|
||||
|
||||
@ -50,7 +50,7 @@
|
||||
#include "kinetis_config.h"
|
||||
#include "kinetis.h"
|
||||
#include "kinetis_uart.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
#include "chip/kinetis_pinmux.h"
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@ -42,18 +42,6 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
@ -49,7 +49,7 @@
|
||||
#include "up_internal.h"
|
||||
|
||||
#include "kinetis.h"
|
||||
#include "kinetis_port.h"
|
||||
#include "chip/kinetis_port.h"
|
||||
#include "chip/kinetis_gpio.h"
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@ -47,7 +47,7 @@
|
||||
|
||||
#include "kinetis.h"
|
||||
#include "chip/kinetis_gpio.h"
|
||||
#include "kinetis_port.h"
|
||||
#include "chip/kinetis_port.h"
|
||||
|
||||
#ifdef CONFIG_DEBUG_GPIO_INFO
|
||||
|
||||
|
||||
@ -50,7 +50,7 @@
|
||||
#include "up_internal.h"
|
||||
|
||||
#include "kinetis.h"
|
||||
#include "kinetis_port.h"
|
||||
#include "chip/kinetis_port.h"
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
|
||||
|
||||
@ -61,7 +61,7 @@
|
||||
#include "chip/kinetis_pwm.h"
|
||||
#include "chip/kinetis_gpio.h"
|
||||
#include "chip/kinetis_ftm.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
|
||||
/* This module then only compiles if there is at least one enabled timer
|
||||
* intended for use with the PWM upper half driver.
|
||||
|
||||
@ -62,8 +62,8 @@
|
||||
|
||||
#include "kinetis.h"
|
||||
#include "chip/kinetis_pinmux.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "kinetis_sdhc.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
#include "chip/kinetis_sdhc.h"
|
||||
|
||||
#ifdef CONFIG_KINETIS_SDHC
|
||||
|
||||
|
||||
@ -67,7 +67,7 @@
|
||||
#include "up_arch.h"
|
||||
#include "kinetis.h"
|
||||
#include "kinetis_usbotg.h"
|
||||
#include "kinetis_sim.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
#include "chip/kinetis_fmc.h"
|
||||
|
||||
#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USBOTG)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user