Kinetis Support ARMV7 Common Vector and FPU
This commit is contained in:
David Sidrane
parent
4de46c848d
commit
bce382da52
@ -85,6 +85,7 @@ config ARCH_CHIP_KINETIS
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_CMNVECTOR
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---help---
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Freescale Kinetis Architectures (ARM Cortex-M4)
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@ -1,8 +1,9 @@
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/************************************************************************************
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/****************************************************************************
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* arch/arm/include/kinetis/irq.h
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*
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* Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -31,10 +32,10 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly through
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* nuttx/irq.h
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_KINETIS_IRQ_H
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@ -50,8 +51,8 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* IRQ numbers **********************************************************************/
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/* The IRQ numbers corresponds directly to vector numbers and hence map directly to
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/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
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* bits in the NVIC. This does, however, waste several words of memory in the IRQ
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* to handle mapping tables.
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*/
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@ -73,410 +74,20 @@
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#define KINETIS_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
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#define KINETIS_IRQ_SYSTICK (15) /* Vector 15: System tick */
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/* External interrupts (vectors >= 16) */
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/* External interrupts (vectors >= 16). These definitions are chip-specific */
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#define KINETIS_IRQ_EXTINT (16)
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/* K20 Family ***********************************************************************
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*
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* The interrupt vectors for the following parts is defined in Freescale document
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* K20P64M72SF1RM
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*/
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#define KINETIS_IRQ_FIRST (16) /* Vector number of the first external interrupt */
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#if defined(CONFIG_ARCH_FAMILY_K20)
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# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
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# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
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# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
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# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
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# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
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# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
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# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
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# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
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# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
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# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
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# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
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# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
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# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
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# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
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# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
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# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
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# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
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# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
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# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
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# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
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* detect, low-voltage warning */
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# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
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# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
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# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
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# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
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# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
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# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
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# define KINETIS_IRQ_CAN0MB (45) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
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# define KINETIS_IRQ_CAN0BO (46) /* Vector 46: CAN0 Bus Off */
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# define KINETIS_IRQ_CAN0ERR (47) /* Vector 47: CAN0 Error */
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# define KINETIS_IRQ_CAN0TW (48) /* Vector 48: CAN0 Transmit Warning */
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# define KINETIS_IRQ_CAN0RW (49) /* Vector 49: CAN0 Receive Warning */
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# define KINETIS_IRQ_CAN0WU (50) /* Vector 50: CAN0 Wake UP */
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//TODO UART0_LON
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# define KINETIS_IRQ_UART0S (61) /* Vector 61: UART0 status */
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# define KINETIS_IRQ_UART0E (62) /* Vector 62: UART0 error */
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# define KINETIS_IRQ_UART1S (63) /* Vector 63: UART1 status */
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# define KINETIS_IRQ_UART1E (64) /* Vector 64: UART1 error */
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# define KINETIS_IRQ_UART2S (65) /* Vector 65: UART2 status */
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# define KINETIS_IRQ_UART2E (66) /* Vector 66: UART2 error */
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# define KINETIS_IRQ_ADC0 (73) /* Vector 73: ADC0 */
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# define KINETIS_IRQ_ADC1 (74) /* Vector 74: ADC1 */
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# define KINETIS_IRQ_CMP0 (75) /* Vector 75: CMP0 */
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# define KINETIS_IRQ_CMP1 (76) /* Vector 76: CMP1 */
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# define KINETIS_IRQ_CMP2 (77) /* Vector 77: CMP2 */
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# define KINETIS_IRQ_FTM0 (78) /* Vector 78: FTM0 all sources */
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# define KINETIS_IRQ_FTM1 (79) /* Vector 79: FTM1 all sources */
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# define KINETIS_IRQ_FTM2 (80) /* Vector 80: FTM2 all sources */
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# define KINETIS_IRQ_CMT (81) /* Vector 81: CMT */
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# define KINETIS_IRQ_RTC (82) /* Vector 82: RTC alarm interrupt */
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//TODO RTC_SECOND
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# define KINETIS_IRQ_PITCH0 (84) /* Vector 84: PIT channel 0 */
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# define KINETIS_IRQ_PITCH1 (85) /* Vector 85: PIT channel 1 */
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# define KINETIS_IRQ_PITCH2 (86) /* Vector 86: PIT channel 2 */
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# define KINETIS_IRQ_PITCH3 (87) /* Vector 87: PIT channel 3 */
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# define KINETIS_IRQ_PDB (88) /* Vector 88: PDB */
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# define KINETIS_IRQ_USBOTG (89) /* Vector 88: USB OTG */
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# define KINETIS_IRQ_USBCD (90) /* Vector 90: USB charger detect */
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# define KINETIS_IRQ_DAC0 (97) /* Vector 97: DAC0 */
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# define KINETIS_IRQ_TSI (99) /* Vector 97: TSI all sources */
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# define KINETIS_IRQ_MCG (100) /* Vector 100: MCG */
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# define KINETIS_IRQ_LPT (101) /* Vector 101: Low power timer */
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# define KINETIS_IRQ_PORTA (103) /* Vector 103: Pin detect port A */
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# define KINETIS_IRQ_PORTB (104) /* Vector 104: Pin detect port B */
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# define KINETIS_IRQ_PORTC (105) /* Vector 105: Pin detect port C */
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# define KINETIS_IRQ_PORTD (106) /* Vector 106: Pin detect port D */
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# define KINETIS_IRQ_PORTE (107) /* Vector 107: Pin detect port E */
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# define KINETIS_IRQ_SWI (110) /* Vector 110: Software interrupt */
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# define NR_VECTORS (111) /* 111 vectors */
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# define NR_IRQS (111) /* 94 interrupts but 111 IRQ numbers */
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/* K40 Family ***********************************************************************
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*
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* The interrupt vectors for the following parts is defined in Freescale document
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* K40P144M100SF2RM
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*/
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# include <arch/kinetis/kinetis_k20irq.h>
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#elif defined(CONFIG_ARCH_FAMILY_K40)
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# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
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# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
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# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
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# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
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# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
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# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
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# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
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# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
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# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
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# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
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# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
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# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
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# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
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# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
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# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
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# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
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# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
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# define KINETIS_IRQ_MCM (33) /* Vector 33: MCM Normal interrupt */
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# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
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# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
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# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
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* detect, low-voltage warning */
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# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
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# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
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/* Vector 39: Reserved */
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# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
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# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
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# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
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# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
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# define KINETIS_IRQ_SPI2 (44) /* Vector 44: SPI2 all sources */
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# define KINETIS_IRQ_CAN0MB (45) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
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# define KINETIS_IRQ_CAN0BO (46) /* Vector 46: CAN0 Bus Off */
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# define KINETIS_IRQ_CAN0ERR (47) /* Vector 47: CAN0 Error */
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# define KINETIS_IRQ_CAN0TW (48) /* Vector 48: CAN0 Transmit Warning */
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# define KINETIS_IRQ_CAN0RW (49) /* Vector 49: CAN0 Receive Warning */
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# define KINETIS_IRQ_CAN0WU (50) /* Vector 50: CAN0 Wake UP */
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/* Vectors 51-52: Reserved */
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# define KINETIS_IRQ_CAN1MB (53) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
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# define KINETIS_IRQ_CAN1BO (54) /* Vector 54: CAN1 Bus Off */
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# define KINETIS_IRQ_CAN1ERR (55) /* Vector 55: CAN1 Error */
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# define KINETIS_IRQ_CAN1TW (56) /* Vector 56: CAN1 Transmit Warning */
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# define KINETIS_IRQ_CAN1RW (57) /* Vector 57: CAN1 Receive Warning */
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# define KINETIS_IRQ_CAN1WU (58) /* Vector 58: CAN1 Wake UP */
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/* Vectors 59-60: Reserved */
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# define KINETIS_IRQ_UART0S (61) /* Vector 61: UART0 status */
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# define KINETIS_IRQ_UART0E (62) /* Vector 62: UART0 error */
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# define KINETIS_IRQ_UART1S (63) /* Vector 63: UART1 status */
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# define KINETIS_IRQ_UART1E (64) /* Vector 64: UART1 error */
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# define KINETIS_IRQ_UART2S (65) /* Vector 65: UART2 status */
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# define KINETIS_IRQ_UART2E (66) /* Vector 66: UART2 error */
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# define KINETIS_IRQ_UART3S (67) /* Vector 67: UART3 status */
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# define KINETIS_IRQ_UART3E (68) /* Vector 68: UART3 error */
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# define KINETIS_IRQ_UART4S (69) /* Vector 69: UART4 status */
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# define KINETIS_IRQ_UART4E (70) /* Vector 70: UART4 error */
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# define KINETIS_IRQ_UART5S (71) /* Vector 71: UART5 status */
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# define KINETIS_IRQ_UART5E (72) /* Vector 72: UART5 error */
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# define KINETIS_IRQ_ADC0 (73) /* Vector 73: ADC0 */
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# define KINETIS_IRQ_ADC1 (74) /* Vector 74: ADC1 */
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# define KINETIS_IRQ_CMP0 (75) /* Vector 75: CMP0 */
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# define KINETIS_IRQ_CMP1 (76) /* Vector 76: CMP1 */
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# define KINETIS_IRQ_CMP2 (77) /* Vector 77: CMP2 */
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# define KINETIS_IRQ_FTM0 (78) /* Vector 78: FTM0 all sources */
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# define KINETIS_IRQ_FTM1 (79) /* Vector 79: FTM1 all sources */
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# define KINETIS_IRQ_FTM2 (80) /* Vector 80: FTM2 all sources */
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# define KINETIS_IRQ_CMT (81) /* Vector 81: CMT */
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# define KINETIS_IRQ_RTC (82) /* Vector 82: RTC alarm interrupt */
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/* Vector 83: Reserved */
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# define KINETIS_IRQ_PITCH0 (84) /* Vector 84: PIT channel 0 */
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# define KINETIS_IRQ_PITCH1 (85) /* Vector 85: PIT channel 1 */
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# define KINETIS_IRQ_PITCH2 (86) /* Vector 86: PIT channel 2 */
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# define KINETIS_IRQ_PITCH3 (87) /* Vector 87: PIT channel 3 */
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# define KINETIS_IRQ_PDB (88) /* Vector 88: PDB */
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# define KINETIS_IRQ_USBOTG (89) /* Vector 88: USB OTG */
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# define KINETIS_IRQ_USBCD (90) /* Vector 90: USB charger detect */
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/* Vectors 91-94: Reserved */
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# define KINETIS_IRQ_I2S0 (95) /* Vector 95: I2S0 */
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# define KINETIS_IRQ_SDHC (96) /* Vector 96: SDHC */
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# define KINETIS_IRQ_DAC0 (97) /* Vector 97: DAC0 */
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# define KINETIS_IRQ_DAC1 (98) /* Vector 98: DAC1 */
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# define KINETIS_IRQ_TSI (99) /* Vector 97: TSI all sources */
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# define KINETIS_IRQ_MCG (100) /* Vector 100: MCG */
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# define KINETIS_IRQ_LPT (101) /* Vector 101: Low power timer */
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# define KINETIS_IRQ_SLCD (102) /* Vector 102: Segment LCD all sources */
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# define KINETIS_IRQ_PORTA (103) /* Vector 103: Pin detect port A */
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# define KINETIS_IRQ_PORTB (104) /* Vector 104: Pin detect port B */
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# define KINETIS_IRQ_PORTC (105) /* Vector 105: Pin detect port C */
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# define KINETIS_IRQ_PORTD (106) /* Vector 106: Pin detect port D */
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# define KINETIS_IRQ_PORTE (107) /* Vector 107: Pin detect port E */
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/* Vectors 108-109: Reserved */
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# define KINETIS_IRQ_SWI (110) /* Vector 110: Software interrupt */
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/* Note that the total number of IRQ numbers supported is equal to the number of
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* valid interrupt vectors. This is wasteful in that certain tables are sized by
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* this value. There are only 94 valid interrupts so, potentially the numver of
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* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
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* also simplifies operations on NVIC registers and (at least in my state of mind
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* now) seems to justify the waste.
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*/
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# define NR_VECTORS (111) /* 111 vectors */
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# define NR_IRQS (111) /* 94 interrupts but 111 IRQ numbers */
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/* K60 Family ***********************************************************************
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*
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* The memory map for the following parts is defined in Freescale document
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* K60P144M100SF2RM
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*/
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# include <arch/kinetis/kinetis_k40irq.h>
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#elif defined(CONFIG_ARCH_FAMILY_K60)
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# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
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# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
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# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
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# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
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# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
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# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
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# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
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# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
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# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
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# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
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# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
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# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
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# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
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# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
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# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
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# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
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# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
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# define KINETIS_IRQ_MCM (33) /* Vector 33: MCM Normal interrupt */
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# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
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# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
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# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
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* detect, low-voltage warning */
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# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
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# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
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# define KINETIS_IRQ_RNGB (39) /* Vector 39: Random number generator */
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# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
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# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
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# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
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# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
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# define KINETIS_IRQ_SPI2 (44) /* Vector 44: SPI2 all sources */
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# define KINETIS_IRQ_CAN0MB (45) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
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# define KINETIS_IRQ_CAN0BO (46) /* Vector 46: CAN0 Bus Off */
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# define KINETIS_IRQ_CAN0ERR (47) /* Vector 47: CAN0 Error */
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# define KINETIS_IRQ_CAN0TW (48) /* Vector 48: CAN0 Transmit Warning */
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# define KINETIS_IRQ_CAN0RW (49) /* Vector 49: CAN0 Receive Warning */
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# define KINETIS_IRQ_CAN0WU (50) /* Vector 50: CAN0 Wake UP */
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/* Vectors 51-52: Reserved */
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# define KINETIS_IRQ_CAN1MB (53) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
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# define KINETIS_IRQ_CAN1BO (54) /* Vector 54: CAN1 Bus Off */
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# define KINETIS_IRQ_CAN1ERR (55) /* Vector 55: CAN1 Error */
|
||||
# define KINETIS_IRQ_CAN1TW (56) /* Vector 56: CAN1 Transmit Warning */
|
||||
# define KINETIS_IRQ_CAN1RW (57) /* Vector 57: CAN1 Receive Warning */
|
||||
# define KINETIS_IRQ_CAN1WU (58) /* Vector 58: CAN1 Wake UP */
|
||||
/* Vectors 59-60: Reserved */
|
||||
# define KINETIS_IRQ_UART0S (61) /* Vector 61: UART0 status */
|
||||
# define KINETIS_IRQ_UART0E (62) /* Vector 62: UART0 error */
|
||||
# define KINETIS_IRQ_UART1S (63) /* Vector 63: UART1 status */
|
||||
# define KINETIS_IRQ_UART1E (64) /* Vector 64: UART1 error */
|
||||
# define KINETIS_IRQ_UART2S (65) /* Vector 65: UART2 status */
|
||||
# define KINETIS_IRQ_UART2E (66) /* Vector 66: UART2 error */
|
||||
# define KINETIS_IRQ_UART3S (67) /* Vector 67: UART3 status */
|
||||
# define KINETIS_IRQ_UART3E (68) /* Vector 68: UART3 error */
|
||||
# define KINETIS_IRQ_UART4S (69) /* Vector 69: UART4 status */
|
||||
# define KINETIS_IRQ_UART4E (70) /* Vector 70: UART4 error */
|
||||
# define KINETIS_IRQ_UART5S (71) /* Vector 71: UART5 status */
|
||||
# define KINETIS_IRQ_UART5E (72) /* Vector 72: UART5 error */
|
||||
# define KINETIS_IRQ_ADC0 (73) /* Vector 73: ADC0 */
|
||||
# define KINETIS_IRQ_ADC1 (74) /* Vector 74: ADC1 */
|
||||
# define KINETIS_IRQ_CMP0 (75) /* Vector 75: CMP0 */
|
||||
# define KINETIS_IRQ_CMP1 (76) /* Vector 76: CMP1 */
|
||||
# define KINETIS_IRQ_CMP2 (77) /* Vector 77: CMP2 */
|
||||
# define KINETIS_IRQ_FTM0 (78) /* Vector 78: FTM0 all sources */
|
||||
# define KINETIS_IRQ_FTM1 (79) /* Vector 79: FTM1 all sources */
|
||||
# define KINETIS_IRQ_FTM2 (80) /* Vector 80: FTM2 all sources */
|
||||
# define KINETIS_IRQ_CMT (81) /* Vector 81: CMT */
|
||||
# define KINETIS_IRQ_RTC (82) /* Vector 82: RTC alarm interrupt */
|
||||
/* Vector 83: Reserved */
|
||||
# define KINETIS_IRQ_PITCH0 (84) /* Vector 84: PIT channel 0 */
|
||||
# define KINETIS_IRQ_PITCH1 (85) /* Vector 85: PIT channel 1 */
|
||||
# define KINETIS_IRQ_PITCH2 (86) /* Vector 86: PIT channel 2 */
|
||||
# define KINETIS_IRQ_PITCH3 (87) /* Vector 87: PIT channel 3 */
|
||||
# define KINETIS_IRQ_PDB (88) /* Vector 88: PDB */
|
||||
# define KINETIS_IRQ_USBOTG (89) /* Vector 88: USB OTG */
|
||||
# define KINETIS_IRQ_USBCD (90) /* Vector 90: USB charger detect */
|
||||
# define KINETIS_IRQ_EMACTMR (91) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
# define KINETIS_IRQ_EMACTX (92) /* Vector 92: Ethernet MAC transmit interrupt */
|
||||
# define KINETIS_IRQ_EMACRX (93) /* Vector 93: Ethernet MAC receive interrupt */
|
||||
# define KINETIS_IRQ_EMACMISC (94) /* Vector 94: Ethernet MAC error and misc interrupt */
|
||||
# define KINETIS_IRQ_I2S0 (95) /* Vector 95: I2S0 */
|
||||
# define KINETIS_IRQ_SDHC (96) /* Vector 96: SDHC */
|
||||
# define KINETIS_IRQ_DAC0 (97) /* Vector 97: DAC0 */
|
||||
# define KINETIS_IRQ_DAC1 (98) /* Vector 98: DAC1 */
|
||||
# define KINETIS_IRQ_TSI (99) /* Vector 97: TSI all sources */
|
||||
# define KINETIS_IRQ_MCG (100) /* Vector 100: MCG */
|
||||
# define KINETIS_IRQ_LPT (101) /* Vector 101: Low power timer */
|
||||
/* Vector 102: Reserved */
|
||||
# define KINETIS_IRQ_PORTA (103) /* Vector 103: Pin detect port A */
|
||||
# define KINETIS_IRQ_PORTB (104) /* Vector 104: Pin detect port B */
|
||||
# define KINETIS_IRQ_PORTC (105) /* Vector 105: Pin detect port C */
|
||||
# define KINETIS_IRQ_PORTD (106) /* Vector 106: Pin detect port D */
|
||||
# define KINETIS_IRQ_PORTE (107) /* Vector 107: Pin detect port E */
|
||||
/* Vectors 108-119: Reserved */
|
||||
|
||||
/* Note that the total number of IRQ numbers supported is equal to the number of
|
||||
* valid interrupt vectors. This is wasteful in that certain tables are sized by
|
||||
* this value. There are only 97 valid interrupts so, potentially the number of
|
||||
* IRQs to could be reduced to 97. However, equating IRQ numbers with vector numbers
|
||||
* also simplifies operations on NVIC registers and (at least in my state of mind
|
||||
* now) seems to justify the waste.
|
||||
*/
|
||||
|
||||
# define NR_VECTORS (120) /* 120 vectors */
|
||||
# define NR_IRQS (108) /* 120 interrupts but 108 IRQ numbers */
|
||||
|
||||
/* K64 Family ***********************************************************************
|
||||
*
|
||||
* The memory map for the following parts is defined in NXP document
|
||||
* K64P144M120SF5RM.pdf
|
||||
*/
|
||||
|
||||
# include <arch/kinetis/kinetis_k60irq.h>
|
||||
#elif defined(CONFIG_ARCH_FAMILY_K64)
|
||||
|
||||
# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
|
||||
# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
# define KINETIS_IRQ_MCM (33) /* Vector 33: MCM Normal interrupt */
|
||||
# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
|
||||
# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
|
||||
# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
|
||||
# define KINETIS_IRQ_RNGB (39) /* Vector 39: Random number generator */
|
||||
# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
|
||||
# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
|
||||
# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
|
||||
# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
|
||||
# define KINETIS_IRQ_I2S0 (44) /* Vector 44: Transmit */
|
||||
# define KINETIS_IRQ_I2S1 (45) /* Vector 45: Transmit */
|
||||
/* Vector 46: Reserved */
|
||||
# define KINETIS_IRQ_UART0S (47) /* Vector 47: UART0 status */
|
||||
# define KINETIS_IRQ_UART0E (48) /* Vector 48: UART0 error */
|
||||
# define KINETIS_IRQ_UART1S (49) /* Vector 49: UART1 status */
|
||||
# define KINETIS_IRQ_UART1E (50) /* Vector 50: UART1 error */
|
||||
# define KINETIS_IRQ_UART2S (51) /* Vector 51: UART2 status */
|
||||
# define KINETIS_IRQ_UART2E (52) /* Vector 52: UART2 error */
|
||||
# define KINETIS_IRQ_UART3S (53) /* Vector 53: UART3 status */
|
||||
# define KINETIS_IRQ_UART3E (54) /* Vector 54: UART3 error */
|
||||
# define KINETIS_IRQ_ADC0 (55) /* Vector 55: ADC0 */
|
||||
# define KINETIS_IRQ_CMP0 (56) /* Vector 56: CMP0 */
|
||||
# define KINETIS_IRQ_CMP1 (57) /* Vector 57: CMP1 */
|
||||
# define KINETIS_IRQ_FTM0 (58) /* Vector 58: FTM0 all sources */
|
||||
# define KINETIS_IRQ_FTM1 (59) /* Vector 59: FTM1 all sources */
|
||||
# define KINETIS_IRQ_FTM2 (60) /* Vector 60: FTM2 all sources */
|
||||
# define KINETIS_IRQ_CMT (61) /* Vector 61: CMT */
|
||||
# define KINETIS_IRQ_RTC0 (62) /* Vector 62: RTC alarm interrupt */
|
||||
# define KINETIS_IRQ_RTC1 (63) /* Vector 63: RTC seconds interrupt */
|
||||
# define KINETIS_IRQ_PITCH0 (64) /* Vector 64: PIT channel 0 */
|
||||
# define KINETIS_IRQ_PITCH1 (65) /* Vector 65: PIT channel 1 */
|
||||
# define KINETIS_IRQ_PITCH2 (66) /* Vector 66: PIT channel 2 */
|
||||
# define KINETIS_IRQ_PITCH3 (67) /* Vector 67: PIT channel 3 */
|
||||
# define KINETIS_IRQ_PDB (68) /* Vector 68: PDB */
|
||||
# define KINETIS_IRQ_USBOTG (69) /* Vector 68: USB OTG */
|
||||
# define KINETIS_IRQ_USBCD (70) /* Vector 70: USB charger detect */
|
||||
/* Vector 71: Reserved */
|
||||
# define KINETIS_IRQ_DAC0 (72) /* Vector 72: DAC0 */
|
||||
# define KINETIS_IRQ_MCG (73) /* Vector 73: MCG */
|
||||
# define KINETIS_IRQ_LPT (74) /* Vector 74: Low power timer */
|
||||
# define KINETIS_IRQ_PORTA (75) /* Vector 75: Pin detect port A */
|
||||
# define KINETIS_IRQ_PORTB (76) /* Vector 76: Pin detect port B */
|
||||
# define KINETIS_IRQ_PORTC (77) /* Vector 77: Pin detect port C */
|
||||
# define KINETIS_IRQ_PORTD (78) /* Vector 78: Pin detect port D */
|
||||
# define KINETIS_IRQ_PORTE (79) /* Vector 79: Pin detect port E */
|
||||
# define KINETIS_IRQ_SOFTWARE (80) /* Vector 80: Software interrupt */
|
||||
# define KINETIS_IRQ_SPI2 (81) /* Vector 81: SPI2 all sources */
|
||||
# define KINETIS_IRQ_UART4S (82) /* Vector 82: UART4 status */
|
||||
# define KINETIS_IRQ_UART4E (83) /* Vector 83: UART4 error */
|
||||
# define KINETIS_IRQ_UART5S (84) /* Vector 84: UART5 status */
|
||||
# define KINETIS_IRQ_UART5E (85) /* Vector 85: UART5 error */
|
||||
# define KINETIS_IRQ_CMP2 (86) /* Vector 86: CMP2 */
|
||||
# define KINETIS_IRQ_FTM3 (87) /* Vector 87: FTM3 all sources */
|
||||
# define KINETIS_IRQ_DAC1 (88) /* Vector 88: DAC1 */
|
||||
# define KINETIS_IRQ_ADC1 (89) /* Vector 89: ADC1 */
|
||||
# define KINETIS_IRQ_I2C2 (90) /* Vector 90: I2C2 */
|
||||
# define KINETIS_IRQ_CAN0MB (91) /* Vector 91: CAN0 OR'ed Message buffer (0-15) */
|
||||
# define KINETIS_IRQ_CAN0BO (92) /* Vector 92: CAN0 Bus Off */
|
||||
# define KINETIS_IRQ_CAN0ERR (93) /* Vector 93: CAN0 Error */
|
||||
# define KINETIS_IRQ_CAN0TW (94) /* Vector 94: CAN0 Transmit Warning */
|
||||
# define KINETIS_IRQ_CAN0RW (95) /* Vector 95: CAN0 Receive Warning */
|
||||
# define KINETIS_IRQ_CAN0WU (96) /* Vector 96: CAN0 Wake UP */
|
||||
# define KINETIS_IRQ_SDHC (97) /* Vector 97: SDHC */
|
||||
# define KINETIS_IRQ_EMACTMR (98) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
# define KINETIS_IRQ_EMACTX (99) /* Vector 92: Ethernet MAC transmit interrupt */
|
||||
# define KINETIS_IRQ_EMACRX (100) /* Vector 93: Ethernet MAC receive interrupt */
|
||||
# define KINETIS_IRQ_EMACMISC (101) /* Vector 94: Ethernet MAC error and misc interrupt */
|
||||
|
||||
# define NR_VECTORS (102) /* 102 vectors */
|
||||
# define NR_IRQS (102) /* 85 interrupts but 102 IRQ numbers */
|
||||
|
||||
# include <arch/kinetis/kinetis_k64irq.h>
|
||||
#elif defined(CONFIG_ARCH_FAMILY_K66)
|
||||
# include <arch/kinetis/kinetis_k66irq.h>
|
||||
#else
|
||||
/* The interrupt vectors for other parts are defined in other documents and may or
|
||||
* may not be the same as above (the family members are all very similar) This
|
||||
@ -484,7 +95,7 @@
|
||||
* if the vectors are the same.
|
||||
*/
|
||||
|
||||
# error "No IRQ numbers for this Kinetis part"
|
||||
# error "No IRQ numbers for this Kinetis K part"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
|
||||
200
arch/arm/include/kinetis/kinetis_k20irq.h
Normal file
200
arch/arm/include/kinetis/kinetis_k20irq.h
Normal file
@ -0,0 +1,200 @@
|
||||
/*****************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_k20irq.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly
|
||||
* through nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
|
||||
|
||||
/*****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/*****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
||||
* directly to bits in the NVIC. This does, however, waste several words of
|
||||
* memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found
|
||||
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*
|
||||
* K20 Family ****************************************************************
|
||||
*
|
||||
* The interrupt vectors for the following parts is defined in Freescale
|
||||
* document K20P64M72SF1RM
|
||||
*/
|
||||
|
||||
#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST+0) /* 0: DMA channel 0 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST+1) /* 1: DMA channel 1 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST+2) /* 2: DMA channel 2 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST+3) /* 3: DMA channel 3 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST+4) /* 4: DMA channel 4 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST+5) /* 5: DMA channel 5 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST+6) /* 6: DMA channel 6 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST+7) /* 7: DMA channel 7 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST+8) /* 8: DMA channel 8 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST+9) /* 9: DMA channel 9 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10) /* 10: DMA channel 10 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11) /* 11: DMA channel 11 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12) /* 12: DMA channel 12 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13) /* 13: DMA channel 13 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14) /* 14: DMA channel 14 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15) /* 15: DMA channel 15 transfer complete */
|
||||
#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST+16) /* 16: DMA error interrupt channels 0-15 */
|
||||
#define KINETIS_IRQ_RESVD17 (KINETIS_IRQ_FIRST+17) /* 17: Reserved */
|
||||
#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18) /* 18: Flash memory command complete */
|
||||
#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19) /* 19: Flash memory read collision */
|
||||
#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST+20) /* 20: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST+21) /* 21: LLWU Normal Low Leakage Wakeup */
|
||||
#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST+22) /* 22: Watchdog */
|
||||
#define KINETIS_IRQ_RESVD23 (KINETIS_IRQ_FIRST+23) /* 23: Reserved */
|
||||
#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST+24) /* 24: I2C0 */
|
||||
#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST+25) /* 25: I2C1 */
|
||||
#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST+26) /* 26: SPI0 all sources */
|
||||
#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST+27) /* 27: SPI1 all sources */
|
||||
#define KINETIS_IRQ_RESVD28 (KINETIS_IRQ_FIRST+28) /* 28: Reserved */
|
||||
#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST+29) /* 29: CAN0 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST+30) /* 30: CAN0 Bus Off */
|
||||
#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+31) /* 31: CAN0 Error */
|
||||
#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST+32) /* 32: CAN0 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST+33) /* 33: CAN0 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST+34) /* 34: CAN0 Wake UP */
|
||||
#define KINETIS_IRQ_I2S0TX (KINETIS_IRQ_FIRST+35) /* 35: I2S0 Transmit */
|
||||
#define KINETIS_IRQ_I2S0TX (KINETIS_IRQ_FIRST+36) /* 36: I2S0 Receive */
|
||||
#define KINETIS_IRQ_RESVD37 (KINETIS_IRQ_FIRST+37) /* 37: Reserved */
|
||||
#define KINETIS_IRQ_RESVD38 (KINETIS_IRQ_FIRST+38) /* 38: Reserved */
|
||||
#define KINETIS_IRQ_RESVD39 (KINETIS_IRQ_FIRST+39) /* 39: Reserved */
|
||||
#define KINETIS_IRQ_RESVD40 (KINETIS_IRQ_FIRST+40) /* 40: Reserved */
|
||||
#define KINETIS_IRQ_RESVD41 (KINETIS_IRQ_FIRST+41) /* 41: Reserved */
|
||||
#define KINETIS_IRQ_RESVD42 (KINETIS_IRQ_FIRST+42) /* 42: Reserved */
|
||||
#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST+43) /* 43: Reserved */
|
||||
#define KINETIS_IRQ_UART0L (KINETIS_IRQ_FIRST+44) /* 44: UART0 LON */
|
||||
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST+45) /* 45: UART0 status */
|
||||
#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST+46) /* 46: UART0 error */
|
||||
#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST+47) /* 47: UART1 status */
|
||||
#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST+48) /* 48: UART1 error */
|
||||
#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST+49) /* 49: UART2 status */
|
||||
#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST+50) /* 50: UART2 error */
|
||||
#define KINETIS_IRQ_RESVD51 (KINETIS_IRQ_FIRST+51) /* 51: Reserved */
|
||||
#define KINETIS_IRQ_RESVD52 (KINETIS_IRQ_FIRST+52) /* 52: Reserved */
|
||||
#define KINETIS_IRQ_RESVD53 (KINETIS_IRQ_FIRST+53) /* 53: Reserved */
|
||||
#define KINETIS_IRQ_RESVD54 (KINETIS_IRQ_FIRST+54) /* 54: Reserved */
|
||||
#define KINETIS_IRQ_RESVD55 (KINETIS_IRQ_FIRST+55) /* 55: Reserved */
|
||||
#define KINETIS_IRQ_RESVD56 (KINETIS_IRQ_FIRST+56) /* 56: Reserved */
|
||||
#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST+57) /* 57: ADC0 */
|
||||
#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST+58) /* 58: ADC1 */
|
||||
#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST+59) /* 59: CMP0 */
|
||||
#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST+60) /* 60: CMP1 */
|
||||
#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST+61) /* 61: CMP2 */
|
||||
#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST+62) /* 62: FTM0 all sources */
|
||||
#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST+63) /* 63: FTM1 all sources */
|
||||
#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST+64) /* 64: FTM2 all sources */
|
||||
#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST+65) /* 65: CMT */
|
||||
#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST+66) /* 66: RTC alarm interrupt */
|
||||
#define KINETIS_IRQ_RTCS (KINETIS_IRQ_FIRST+67) /* 67: RTC Seconds interrupt */
|
||||
#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST+68) /* 68: PIT channel 0 */
|
||||
#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST+69) /* 69: PIT channel 1 */
|
||||
#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST+70) /* 70: PIT channel 2 */
|
||||
#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST+71) /* 71: PIT channel 3 */
|
||||
#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST+72) /* 72: PDB */
|
||||
#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST+73) /* 73: USB OTG */
|
||||
#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST+74) /* 74: USB charger detect */
|
||||
#define KINETIS_IRQ_RESVD75 (KINETIS_IRQ_FIRST+75) /* 75: Reserved */
|
||||
#define KINETIS_IRQ_RESVD76 (KINETIS_IRQ_FIRST+76) /* 76: Reserved */
|
||||
#define KINETIS_IRQ_RESVD77 (KINETIS_IRQ_FIRST+77) /* 77: Reserved */
|
||||
#define KINETIS_IRQ_RESVD78 (KINETIS_IRQ_FIRST+78) /* 78: Reserved */
|
||||
#define KINETIS_IRQ_RESVD79 (KINETIS_IRQ_FIRST+79) /* 79: Reserved */
|
||||
#define KINETIS_IRQ_RESVD80 (KINETIS_IRQ_FIRST+80) /* 80: Reserved */
|
||||
#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST+81) /* 81: DAC0 */
|
||||
#define KINETIS_IRQ_RESVD82 (KINETIS_IRQ_FIRST+82) /* 82: Reserved */
|
||||
#define KINETIS_IRQ_TSI (KINETIS_IRQ_FIRST+83) /* 83: TSI all sources */
|
||||
#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST+84) /* 84: MCG */
|
||||
#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST+85) /* 85: Low power timer */
|
||||
#define KINETIS_IRQ_RESVD86 (KINETIS_IRQ_FIRST+86) /* 86: Reserved */
|
||||
#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST+87) /* 87: Pin detect port A */
|
||||
#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST+88) /* 88: Pin detect port B */
|
||||
#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST+89) /* 89: Pin detect port C */
|
||||
#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST+90) /* 90: Pin detect port D */
|
||||
#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST+91) /* 91: Pin detect port E */
|
||||
#define KINETIS_IRQ_RESVD92 (KINETIS_IRQ_FIRST+92) /* 92: Reserved */
|
||||
#define KINETIS_IRQ_RESVD93 (KINETIS_IRQ_FIRST+93) /* 93: Reserved */
|
||||
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST+94) /* 94: Software interrupt */
|
||||
|
||||
#define NR_INTERRUPTS 95 /* 95 Non core IRQs*/
|
||||
#define NR_VECTORS (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H */
|
||||
200
arch/arm/include/kinetis/kinetis_k40irq.h
Normal file
200
arch/arm/include/kinetis/kinetis_k40irq.h
Normal file
@ -0,0 +1,200 @@
|
||||
/*****************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_k40irq.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly
|
||||
* through nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
|
||||
|
||||
/*****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/*****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
||||
* directly to bits in the NVIC. This does, however, waste several words of
|
||||
* memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found
|
||||
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*
|
||||
* K40 Family ****************************************************************
|
||||
*
|
||||
* The interrupt vectors for the following parts is defined in Freescale
|
||||
* document K40P144M100SF2RM
|
||||
*/
|
||||
|
||||
#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST+0) /* 0: DMA channel 0 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST+1) /* 1: DMA channel 1 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST+2) /* 2: DMA channel 2 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST+3) /* 3: DMA channel 3 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST+4) /* 4: DMA channel 4 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST+5) /* 5: DMA channel 5 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST+6) /* 6: DMA channel 6 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST+7) /* 7: DMA channel 7 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST+8) /* 8: DMA channel 8 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST+9) /* 9: DMA channel 9 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10) /* 10: DMA channel 10 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11) /* 11: DMA channel 11 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12) /* 12: DMA channel 12 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13) /* 13: DMA channel 13 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14) /* 14: DMA channel 14 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15) /* 15: DMA channel 15 transfer complete */
|
||||
#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST+16) /* 16: DMA error interrupt channels 0-15 */
|
||||
#define KINETIS_IRQ_MCM (KINETIS_IRQ_FIRST+17) /* 17: MCM Normal interrupt */
|
||||
#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18) /* 18: Flash memory command complete */
|
||||
#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19) /* 19: Flash memory read collision */
|
||||
#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST+20) /* 20: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST+21) /* 21: LLWU Normal Low Leakage Wakeup */
|
||||
#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST+22) /* 22: Watchdog */
|
||||
#define KINETIS_IRQ_RESVD23 (KINETIS_IRQ_FIRST+23) /* 23: Reserved */
|
||||
#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST+24) /* 24: I2C0 */
|
||||
#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST+25) /* 25: I2C1 */
|
||||
#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST+26) /* 26: SPI0 all sources */
|
||||
#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST+27) /* 27: SPI1 all sources */
|
||||
#define KINETIS_IRQ_SPI2 (KINETIS_IRQ_FIRST+28) /* 28: SPI2 all sources */
|
||||
#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST+29) /* 29: CAN0 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST+30) /* 30: CAN0 Bus Off */
|
||||
#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+31) /* 31: CAN0 Error */
|
||||
#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST+32) /* 32: CAN0 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST+33) /* 33: CAN0 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST+34) /* 34: CAN0 Wake UP */
|
||||
#define KINETIS_IRQ_RESVD35 (KINETIS_IRQ_FIRST+35) /* 35: Reserved */
|
||||
#define KINETIS_IRQ_RESVD36 (KINETIS_IRQ_FIRST+36) /* 36: Reserved */
|
||||
#define KINETIS_IRQ_CAN1MB (KINETIS_IRQ_FIRST+37) /* 37: CAN1 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN1BO (KINETIS_IRQ_FIRST+38) /* 38: CAN1 Bus Off */
|
||||
#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST+39) /* 39: CAN1 Error */
|
||||
#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST+40) /* 40: CAN1 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST+41) /* 41: CAN1 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST+42) /* 42: CAN1 Wake UP */
|
||||
#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST+43) /* 43: Reserved */
|
||||
#define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST+44) /* 44: Reserved */
|
||||
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST+45) /* 45: UART0 status */
|
||||
#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST+46) /* 46: UART0 error */
|
||||
#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST+47) /* 47: UART1 status */
|
||||
#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST+48) /* 48: UART1 error */
|
||||
#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST+49) /* 49: UART2 status */
|
||||
#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST+50) /* 50: UART2 error */
|
||||
#define KINETIS_IRQ_UART3S (KINETIS_IRQ_FIRST+51) /* 51: UART3 status */
|
||||
#define KINETIS_IRQ_UART3E (KINETIS_IRQ_FIRST+52) /* 52: UART3 error */
|
||||
#define KINETIS_IRQ_UART4S (KINETIS_IRQ_FIRST+53) /* 53: UART4 status */
|
||||
#define KINETIS_IRQ_UART4E (KINETIS_IRQ_FIRST+54) /* 54: UART4 error */
|
||||
#define KINETIS_IRQ_UART5S (KINETIS_IRQ_FIRST+55) /* 55: UART5 status */
|
||||
#define KINETIS_IRQ_UART5E (KINETIS_IRQ_FIRST+56) /* 56: UART5 error */
|
||||
#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST+57) /* 57: ADC0 */
|
||||
#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST+58) /* 58: ADC1 */
|
||||
#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST+59) /* 59: CMP0 */
|
||||
#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST+60) /* 60: CMP1 */
|
||||
#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST+61) /* 61: CMP2 */
|
||||
#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST+62) /* 62: FTM0 all sources */
|
||||
#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST+63) /* 63: FTM1 all sources */
|
||||
#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST+64) /* 64: FTM2 all sources */
|
||||
#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST+65) /* 65: CMT */
|
||||
#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST+66) /* 66: RTC alarm interrupt */
|
||||
#define KINETIS_IRQ_RESVD67 (KINETIS_IRQ_FIRST+67) /* 67: Reserved */
|
||||
#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST+68) /* 68: PIT channel 0 */
|
||||
#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST+69) /* 69: PIT channel 1 */
|
||||
#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST+70) /* 70: PIT channel 2 */
|
||||
#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST+71) /* 71: PIT channel 3 */
|
||||
#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST+72) /* 72: PDB */
|
||||
#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST+73) /* 73: USB OTG */
|
||||
#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST+74) /* 74: USB charger detect */
|
||||
#define KINETIS_IRQ_RESVD75 (KINETIS_IRQ_FIRST+75) /* 75: Reserved */
|
||||
#define KINETIS_IRQ_RESVD76 (KINETIS_IRQ_FIRST+76) /* 76: Reserved */
|
||||
#define KINETIS_IRQ_RESVD77 (KINETIS_IRQ_FIRST+77) /* 77: Reserved */
|
||||
#define KINETIS_IRQ_RESVD78 (KINETIS_IRQ_FIRST+78) /* 78: Reserved */
|
||||
#define KINETIS_IRQ_I2S0 (KINETIS_IRQ_FIRST+79) /* 79: I2S0 */
|
||||
#define KINETIS_IRQ_SDHC (KINETIS_IRQ_FIRST+80) /* 80: SDHC */
|
||||
#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST+81) /* 81: DAC0 */
|
||||
#define KINETIS_IRQ_DAC1 (KINETIS_IRQ_FIRST+82) /* 82: DAC1 */
|
||||
#define KINETIS_IRQ_TSI (KINETIS_IRQ_FIRST+83) /* 83: TSI all sources */
|
||||
#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST+84) /* 84: MCG */
|
||||
#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST+85) /* 85: Low power timer */
|
||||
#define KINETIS_IRQ_SLCD (KINETIS_IRQ_FIRST+86) /* 86: Segment LCD all sources */
|
||||
#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST+87) /* 87: Pin detect port A */
|
||||
#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST+88) /* 88: Pin detect port B */
|
||||
#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST+89) /* 89: Pin detect port C */
|
||||
#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST+90) /* 90: Pin detect port D */
|
||||
#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST+91) /* 91: Pin detect port E */
|
||||
#define KINETIS_IRQ_RESVD92 (KINETIS_IRQ_FIRST+92) /* 92: Reserved */
|
||||
#define KINETIS_IRQ_RESVD93 (KINETIS_IRQ_FIRST+93) /* 93: Reserved */
|
||||
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST+94) /* 94: Software interrupt */
|
||||
|
||||
#define NR_INTERRUPTS 95 /* 95 Non core IRQs*/
|
||||
#define NR_VECTORS (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H */
|
||||
200
arch/arm/include/kinetis/kinetis_k60irq.h
Normal file
200
arch/arm/include/kinetis/kinetis_k60irq.h
Normal file
@ -0,0 +1,200 @@
|
||||
/*****************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_k60irq.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly
|
||||
* through nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
|
||||
|
||||
/*****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/*****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
||||
* directly to bits in the NVIC. This does, however, waste several words of
|
||||
* memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found
|
||||
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*
|
||||
* K60 Family ****************************************************************
|
||||
*
|
||||
* The interrupt vectors for the following parts is defined in Freescale
|
||||
* document K60P144M100SF2RM
|
||||
*/
|
||||
|
||||
#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST+0) /* 0: DMA channel 0 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST+1) /* 1: DMA channel 1 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST+2) /* 2: DMA channel 2 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST+3) /* 3: DMA channel 3 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST+4) /* 4: DMA channel 4 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST+5) /* 5: DMA channel 5 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST+6) /* 6: DMA channel 6 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST+7) /* 7: DMA channel 7 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST+8) /* 8: DMA channel 8 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST+9) /* 9: DMA channel 9 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10) /* 10: DMA channel 10 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11) /* 11: DMA channel 11 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12) /* 12: DMA channel 12 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13) /* 13: DMA channel 13 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14) /* 14: DMA channel 14 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15) /* 15: DMA channel 15 transfer complete */
|
||||
#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST+16) /* 16: DMA error interrupt channels 0-15 */
|
||||
#define KINETIS_IRQ_MCM (KINETIS_IRQ_FIRST+17) /* 17: MCM Normal interrupt */
|
||||
#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18) /* 18: Flash memory command complete */
|
||||
#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19) /* 19: Flash memory read collision */
|
||||
#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST+20) /* 20: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST+21) /* 21: LLWU Normal Low Leakage Wakeup */
|
||||
#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST+22) /* 22: Watchdog */
|
||||
#define KINETIS_IRQ_RNGB (KINETIS_IRQ_FIRST+23) /* 23: Random number generator */
|
||||
#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST+24) /* 24: I2C0 */
|
||||
#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST+25) /* 25: I2C1 */
|
||||
#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST+26) /* 26: SPI0 all sources */
|
||||
#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST+27) /* 27: SPI1 all sources */
|
||||
#define KINETIS_IRQ_SPI2 (KINETIS_IRQ_FIRST+28) /* 28: SPI2 all sources */
|
||||
#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST+29) /* 29: CAN0 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST+30) /* 30: CAN0 Bus Off */
|
||||
#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+31) /* 31: CAN0 Error */
|
||||
#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST+32) /* 32: CAN0 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST+33) /* 33: CAN0 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST+34) /* 34: CAN0 Wake UP */
|
||||
#define KINETIS_IRQ_RESVD35 (KINETIS_IRQ_FIRST+35) /* 35: Reserved */
|
||||
#define KINETIS_IRQ_RESVD36 (KINETIS_IRQ_FIRST+36) /* 36: Reserved */
|
||||
#define KINETIS_IRQ_CAN1MB (KINETIS_IRQ_FIRST+37) /* 37: CAN1 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN1BO (KINETIS_IRQ_FIRST+38) /* 38: CAN1 Bus Off */
|
||||
#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST+39) /* 39: CAN1 Error */
|
||||
#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST+40) /* 40: CAN1 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST+41) /* 41: CAN1 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST+42) /* 42: CAN1 Wake UP */
|
||||
#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST+43) /* 43: Reserved */
|
||||
#define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST+44) /* 44: Reserved */
|
||||
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST+45) /* 45: UART0 status */
|
||||
#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST+46) /* 46: UART0 error */
|
||||
#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST+47) /* 47: UART1 status */
|
||||
#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST+48) /* 48: UART1 error */
|
||||
#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST+49) /* 49: UART2 status */
|
||||
#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST+50) /* 50: UART2 error */
|
||||
#define KINETIS_IRQ_UART3S (KINETIS_IRQ_FIRST+51) /* 51: UART3 status */
|
||||
#define KINETIS_IRQ_UART3E (KINETIS_IRQ_FIRST+52) /* 52: UART3 error */
|
||||
#define KINETIS_IRQ_UART4S (KINETIS_IRQ_FIRST+53) /* 53: UART4 status */
|
||||
#define KINETIS_IRQ_UART4E (KINETIS_IRQ_FIRST+54) /* 54: UART4 error */
|
||||
#define KINETIS_IRQ_UART5S (KINETIS_IRQ_FIRST+55) /* 55: UART5 status */
|
||||
#define KINETIS_IRQ_UART5E (KINETIS_IRQ_FIRST+56) /* 56: UART5 error */
|
||||
#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST+57) /* 57: ADC0 */
|
||||
#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST+58) /* 58: ADC1 */
|
||||
#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST+59) /* 59: CMP0 */
|
||||
#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST+60) /* 60: CMP1 */
|
||||
#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST+61) /* 61: CMP2 */
|
||||
#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST+62) /* 62: FTM0 all sources */
|
||||
#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST+63) /* 63: FTM1 all sources */
|
||||
#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST+64) /* 64: FTM2 all sources */
|
||||
#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST+65) /* 65: CMT */
|
||||
#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST+66) /* 66: RTC alarm interrupt */
|
||||
#define KINETIS_IRQ_RESVD67 (KINETIS_IRQ_FIRST+67) /* 67: Reserved */
|
||||
#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST+68) /* 68: PIT channel 0 */
|
||||
#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST+69) /* 69: PIT channel 1 */
|
||||
#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST+70) /* 70: PIT channel 2 */
|
||||
#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST+71) /* 71: PIT channel 3 */
|
||||
#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST+72) /* 72: PDB */
|
||||
#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST+73) /* 73: USB OTG */
|
||||
#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST+74) /* 74: USB charger detect */
|
||||
#define KINETIS_IRQ_EMACTMR (KINETIS_IRQ_FIRST+75) /* 75: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
#define KINETIS_IRQ_EMACTX (KINETIS_IRQ_FIRST+76) /* 76: Ethernet MAC transmit interrupt */
|
||||
#define KINETIS_IRQ_EMACRX (KINETIS_IRQ_FIRST+77) /* 77: Ethernet MAC receive interrupt */
|
||||
#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+78) /* 78: Ethernet MAC error and misc interrupt */
|
||||
#define KINETIS_IRQ_I2S0 (KINETIS_IRQ_FIRST+79) /* 79: I2S0 */
|
||||
#define KINETIS_IRQ_SDHC (KINETIS_IRQ_FIRST+80) /* 80: SDHC */
|
||||
#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST+81) /* 81: DAC0 */
|
||||
#define KINETIS_IRQ_DAC1 (KINETIS_IRQ_FIRST+82) /* 82: DAC1 */
|
||||
#define KINETIS_IRQ_TSI (KINETIS_IRQ_FIRST+83) /* 83: TSI all sources */
|
||||
#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST+84) /* 84: MCG */
|
||||
#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST+85) /* 85: Low power timer */
|
||||
#define KINETIS_IRQ_RESVD86 (KINETIS_IRQ_FIRST+86) /* 86: Reserved */
|
||||
#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST+87) /* 87: Pin detect port A */
|
||||
#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST+88) /* 88: Pin detect port B */
|
||||
#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST+89) /* 89: Pin detect port C */
|
||||
#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST+90) /* 90: Pin detect port D */
|
||||
#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST+91) /* 91: Pin detect port E */
|
||||
#define KINETIS_IRQ_RESVD92 (KINETIS_IRQ_FIRST+92) /* 92: Reserved */
|
||||
#define KINETIS_IRQ_RESVD93 (KINETIS_IRQ_FIRST+93) /* 93: Reserved */
|
||||
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST+94) /* 94: Software interrupt */
|
||||
|
||||
#define NR_INTERRUPTS 95 /* 95 Non core IRQs*/
|
||||
#define NR_VECTORS (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 111 vectors */
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H */
|
||||
190
arch/arm/include/kinetis/kinetis_k64irq.h
Normal file
190
arch/arm/include/kinetis/kinetis_k64irq.h
Normal file
@ -0,0 +1,190 @@
|
||||
/*****************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_k64irq.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly
|
||||
* through nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
|
||||
|
||||
/*****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/*****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
||||
* directly to bits in the NVIC. This does, however, waste several words of
|
||||
* memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found
|
||||
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*
|
||||
* K60 Family ****************************************************************
|
||||
*
|
||||
* The interrupt vectors for the following parts is defined in Freescale
|
||||
* document K64P144M120SF5RM.pdf
|
||||
*/
|
||||
#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST+0) /* 0: DMA channel 0 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST+1) /* 1: DMA channel 1 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST+2) /* 2: DMA channel 2 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST+3) /* 3: DMA channel 3 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST+4) /* 4: DMA channel 4 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST+5) /* 5: DMA channel 5 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST+6) /* 6: DMA channel 6 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST+7) /* 7: DMA channel 7 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST+8) /* 8: DMA channel 8 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST+9) /* 9: DMA channel 9 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10) /* 10: DMA channel 10 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11) /* 11: DMA channel 11 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12) /* 12: DMA channel 12 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13) /* 13: DMA channel 13 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14) /* 14: DMA channel 14 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15) /* 15: DMA channel 15 transfer complete */
|
||||
#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST+16) /* 16: DMA error interrupt channels 0-15 */
|
||||
#define KINETIS_IRQ_MCM (KINETIS_IRQ_FIRST+17) /* 17: MCM Normal interrupt */
|
||||
#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18) /* 18: Flash memory command complete */
|
||||
#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19) /* 19: Flash memory read collision */
|
||||
#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST+20) /* 20: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST+21) /* 21: LLWU Normal Low Leakage Wakeup */
|
||||
#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST+22) /* 22: Watchdog or EWM */
|
||||
#define KINETIS_IRQ_RNGB (KINETIS_IRQ_FIRST+23) /* 23: Random number generator */
|
||||
#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST+24) /* 24: I2C0 */
|
||||
#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST+25) /* 25: I2C1 */
|
||||
#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST+26) /* 26: SPI0 all sources */
|
||||
#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST+27) /* 27: SPI1 all sources */
|
||||
#define KINETIS_IRQ_I2S0 (KINETIS_IRQ_FIRST+28) /* 28: 12S0 Transmit */
|
||||
#define KINETIS_IRQ_I2S1 (KINETIS_IRQ_FIRST+29) /* 29: 12S0 Receive */
|
||||
#define KINETIS_IRQ_RESVD30 (KINETIS_IRQ_FIRST+30) /* 30: Reserved */
|
||||
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST+31) /* 31: UART0 status */
|
||||
#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST+32) /* 32: UART0 error */
|
||||
#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST+33) /* 33: UART1 status */
|
||||
#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST+34) /* 34: UART1 error */
|
||||
#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST+35) /* 35: UART2 status */
|
||||
#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST+36) /* 36: UART2 error */
|
||||
#define KINETIS_IRQ_UART3S (KINETIS_IRQ_FIRST+37) /* 37: UART3 status */
|
||||
#define KINETIS_IRQ_UART3E (KINETIS_IRQ_FIRST+38) /* 38: UART3 error */
|
||||
#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST+39) /* 39: ADC0 */
|
||||
#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST+40) /* 40: CMP0 */
|
||||
#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST+41) /* 41: CMP1 */
|
||||
#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST+42) /* 42: FTM0 all sources */
|
||||
#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST+43) /* 43: FTM1 all sources */
|
||||
#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST+44) /* 44: FTM2 all sources */
|
||||
#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST+45) /* 45: CMT */
|
||||
#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST+46) /* 46: RTC alarm interrupt */
|
||||
#define KINETIS_IRQ_RTCS (KINETIS_IRQ_FIRST+47) /* 47: RTC seconds interrupt */
|
||||
#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST+48) /* 48: PIT channel 0 */
|
||||
#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST+49) /* 49: PIT channel 1 */
|
||||
#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST+50) /* 50: PIT channel 2 */
|
||||
#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST+51) /* 51: PIT channel 3 */
|
||||
#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST+52) /* 52: PDB */
|
||||
#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST+53) /* 53: USB OTG */
|
||||
#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST+54) /* 54: USB charger detect */
|
||||
#define KINETIS_IRQ_RESVD55 (KINETIS_IRQ_FIRST+55) /* 55: Reserved */
|
||||
#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST+56) /* 56: DAC0 */
|
||||
#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST+57) /* 57: MCG */
|
||||
#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST+58) /* 58: Low power timer */
|
||||
#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST+59) /* 59: Pin detect port A */
|
||||
#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST+60) /* 60: Pin detect port B */
|
||||
#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST+61) /* 61: Pin detect port C */
|
||||
#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST+62) /* 62: Pin detect port D */
|
||||
#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST+63) /* 63: Pin detect port E */
|
||||
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST+64) /* 64: Software interrupt */
|
||||
#define KINETIS_IRQ_SPI2 (KINETIS_IRQ_FIRST+65) /* 65: SPI2 all sources */
|
||||
#define KINETIS_IRQ_UART4S (KINETIS_IRQ_FIRST+66) /* 66: UART4 status */
|
||||
#define KINETIS_IRQ_UART4E (KINETIS_IRQ_FIRST+67) /* 67: UART4 error */
|
||||
#define KINETIS_IRQ_UART5S (KINETIS_IRQ_FIRST+68) /* 68: UART5 status */
|
||||
#define KINETIS_IRQ_UART5E (KINETIS_IRQ_FIRST+69) /* 69: UART5 error */
|
||||
#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST+70) /* 70: CMP2 */
|
||||
#define KINETIS_IRQ_FTM3 (KINETIS_IRQ_FIRST+71) /* 71: FTM3 all sources */
|
||||
#define KINETIS_IRQ_DAC1 (KINETIS_IRQ_FIRST+72) /* 72: DAC1 */
|
||||
#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST+73) /* 73: ADC1 */
|
||||
#define KINETIS_IRQ_I2C2 (KINETIS_IRQ_FIRST+74) /* 74: I2C2 */
|
||||
#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST+75) /* 75: CAN0 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST+76) /* 76: CAN0 Bus Off */
|
||||
#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+77) /* 77: CAN0 Error */
|
||||
#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST+78) /* 78: CAN0 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST+79) /* 79: CAN0 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST+80) /* 80: CAN0 Wake UP */
|
||||
#define KINETIS_IRQ_SDHC (KINETIS_IRQ_FIRST+81) /* 81: SDHC */
|
||||
#define KINETIS_IRQ_EMACTMR (KINETIS_IRQ_FIRST+82) /* 82: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
#define KINETIS_IRQ_EMACTX (KINETIS_IRQ_FIRST+83) /* 83: Ethernet MAC transmit interrupt */
|
||||
#define KINETIS_IRQ_EMACRX (KINETIS_IRQ_FIRST+84) /* 84: Ethernet MAC receive interrupt */
|
||||
#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+85) /* 85: Ethernet MAC error and misc interrupt */
|
||||
|
||||
#define NR_INTERRUPTS 86 /* 86 Non core IRQs*/
|
||||
#define NR_VECTORS (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 102 vectors */
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H */
|
||||
206
arch/arm/include/kinetis/kinetis_k66irq.h
Normal file
206
arch/arm/include/kinetis/kinetis_k66irq.h
Normal file
@ -0,0 +1,206 @@
|
||||
/*****************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_k66irq.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly
|
||||
* through nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H
|
||||
|
||||
/*****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/*****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
||||
* directly to bits in the NVIC. This does, however, waste several words of
|
||||
* memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found
|
||||
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*
|
||||
* K66 Family ****************************************************************
|
||||
*
|
||||
* The interrupt vectors for the following parts is defined in Freescale
|
||||
* document K66P144M180SF5RMV2
|
||||
*/
|
||||
|
||||
#define KINETIS_IRQ_DMACH0 (KINETIS_IRQ_FIRST+0) /* 0: DMA channel 0, 16 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH1 (KINETIS_IRQ_FIRST+1) /* 1: DMA channel 1, 17 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH2 (KINETIS_IRQ_FIRST+2) /* 2: DMA channel 2, 18 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH3 (KINETIS_IRQ_FIRST+3) /* 3: DMA channel 3, 19 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH4 (KINETIS_IRQ_FIRST+4) /* 4: DMA channel 4, 20 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH5 (KINETIS_IRQ_FIRST+5) /* 5: DMA channel 5, 21 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH6 (KINETIS_IRQ_FIRST+6) /* 6: DMA channel 6, 11 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH7 (KINETIS_IRQ_FIRST+7) /* 7: DMA channel 7, 23 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH8 (KINETIS_IRQ_FIRST+8) /* 8: DMA channel 8, 24 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH9 (KINETIS_IRQ_FIRST+9) /* 9: DMA channel 9, 25 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH10 (KINETIS_IRQ_FIRST+10) /* 10: DMA channel 10, 26 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH11 (KINETIS_IRQ_FIRST+11) /* 11: DMA channel 11, 27 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH12 (KINETIS_IRQ_FIRST+12) /* 12: DMA channel 12, 28 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH13 (KINETIS_IRQ_FIRST+13) /* 13: DMA channel 13, 29 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH14 (KINETIS_IRQ_FIRST+14) /* 14: DMA channel 14, 30 transfer complete */
|
||||
#define KINETIS_IRQ_DMACH15 (KINETIS_IRQ_FIRST+15) /* 15: DMA channel 15, 31 transfer complete */
|
||||
#define KINETIS_IRQ_DMAERR (KINETIS_IRQ_FIRST+16) /* 16: DMA error interrupt channels 0-31 */
|
||||
#define KINETIS_IRQ_MCM (KINETIS_IRQ_FIRST+17) /* 17: MCM Normal interrupt */
|
||||
#define KINETIS_IRQ_FLASHCC (KINETIS_IRQ_FIRST+18) /* 18: Flash memory command complete */
|
||||
#define KINETIS_IRQ_FLASHRC (KINETIS_IRQ_FIRST+19) /* 19: Flash memory read collision */
|
||||
#define KINETIS_IRQ_SMCLVD (KINETIS_IRQ_FIRST+20) /* 20: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
#define KINETIS_IRQ_LLWU (KINETIS_IRQ_FIRST+21) /* 21: LLWU Normal Low Leakage Wakeup */
|
||||
#define KINETIS_IRQ_WDOG (KINETIS_IRQ_FIRST+22) /* 22: Watchdog or EWM */
|
||||
#define KINETIS_IRQ_RNGB (KINETIS_IRQ_FIRST+23) /* 23: Random number generator */
|
||||
#define KINETIS_IRQ_I2C0 (KINETIS_IRQ_FIRST+24) /* 24: I2C0 */
|
||||
#define KINETIS_IRQ_I2C1 (KINETIS_IRQ_FIRST+25) /* 25: I2C1 */
|
||||
#define KINETIS_IRQ_SPI0 (KINETIS_IRQ_FIRST+26) /* 26: SPI0 all sources */
|
||||
#define KINETIS_IRQ_SPI1 (KINETIS_IRQ_FIRST+27) /* 27: SPI1 all sources */
|
||||
#define KINETIS_IRQ_I2S0 (KINETIS_IRQ_FIRST+28) /* 28: 12S0 Transmit */
|
||||
#define KINETIS_IRQ_I2S1 (KINETIS_IRQ_FIRST+29) /* 29: 12S0 Receive */
|
||||
#define KINETIS_IRQ_RESVD30 (KINETIS_IRQ_FIRST+30) /* 30: Reserved */
|
||||
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST+31) /* 31: UART0 status */
|
||||
#define KINETIS_IRQ_UART0E (KINETIS_IRQ_FIRST+32) /* 32: UART0 error */
|
||||
#define KINETIS_IRQ_UART1S (KINETIS_IRQ_FIRST+33) /* 33: UART1 status */
|
||||
#define KINETIS_IRQ_UART1E (KINETIS_IRQ_FIRST+34) /* 34: UART1 error */
|
||||
#define KINETIS_IRQ_UART2S (KINETIS_IRQ_FIRST+35) /* 35: UART2 status */
|
||||
#define KINETIS_IRQ_UART2E (KINETIS_IRQ_FIRST+36) /* 36: UART2 error */
|
||||
#define KINETIS_IRQ_UART3S (KINETIS_IRQ_FIRST+37) /* 37: UART3 status */
|
||||
#define KINETIS_IRQ_UART3E (KINETIS_IRQ_FIRST+38) /* 38: UART3 error */
|
||||
#define KINETIS_IRQ_ADC0 (KINETIS_IRQ_FIRST+39) /* 39: ADC0 */
|
||||
#define KINETIS_IRQ_CMP0 (KINETIS_IRQ_FIRST+40) /* 40: CMP0 */
|
||||
#define KINETIS_IRQ_CMP1 (KINETIS_IRQ_FIRST+41) /* 41: CMP1 */
|
||||
#define KINETIS_IRQ_FTM0 (KINETIS_IRQ_FIRST+42) /* 42: FTM0 all sources */
|
||||
#define KINETIS_IRQ_FTM1 (KINETIS_IRQ_FIRST+43) /* 43: FTM1 all sources */
|
||||
#define KINETIS_IRQ_FTM2 (KINETIS_IRQ_FIRST+44) /* 44: FTM2 all sources */
|
||||
#define KINETIS_IRQ_CMT (KINETIS_IRQ_FIRST+45) /* 45: CMT */
|
||||
#define KINETIS_IRQ_RTC (KINETIS_IRQ_FIRST+46) /* 46: RTC alarm interrupt */
|
||||
#define KINETIS_IRQ_RTCS (KINETIS_IRQ_FIRST+47) /* 47: RTC seconds interrupt */
|
||||
#define KINETIS_IRQ_PITCH0 (KINETIS_IRQ_FIRST+48) /* 48: PIT channel 0 */
|
||||
#define KINETIS_IRQ_PITCH1 (KINETIS_IRQ_FIRST+49) /* 49: PIT channel 1 */
|
||||
#define KINETIS_IRQ_PITCH2 (KINETIS_IRQ_FIRST+50) /* 50: PIT channel 2 */
|
||||
#define KINETIS_IRQ_PITCH3 (KINETIS_IRQ_FIRST+51) /* 51: PIT channel 3 */
|
||||
#define KINETIS_IRQ_PDB (KINETIS_IRQ_FIRST+52) /* 52: PDB */
|
||||
#define KINETIS_IRQ_USBOTG (KINETIS_IRQ_FIRST+53) /* 53: USB OTG */
|
||||
#define KINETIS_IRQ_USBCD (KINETIS_IRQ_FIRST+54) /* 54: USB charger detect */
|
||||
#define KINETIS_IRQ_RESVD55 (KINETIS_IRQ_FIRST+55) /* 55: Reserved */
|
||||
#define KINETIS_IRQ_DAC0 (KINETIS_IRQ_FIRST+56) /* 56: DAC0 */
|
||||
#define KINETIS_IRQ_MCG (KINETIS_IRQ_FIRST+57) /* 57: MCG */
|
||||
#define KINETIS_IRQ_LPT (KINETIS_IRQ_FIRST+58) /* 58: Low power timer */
|
||||
#define KINETIS_IRQ_PORTA (KINETIS_IRQ_FIRST+59) /* 59: Pin detect port A */
|
||||
#define KINETIS_IRQ_PORTB (KINETIS_IRQ_FIRST+60) /* 60: Pin detect port B */
|
||||
#define KINETIS_IRQ_PORTC (KINETIS_IRQ_FIRST+61) /* 61: Pin detect port C */
|
||||
#define KINETIS_IRQ_PORTD (KINETIS_IRQ_FIRST+62) /* 62: Pin detect port D */
|
||||
#define KINETIS_IRQ_PORTE (KINETIS_IRQ_FIRST+63) /* 63: Pin detect port E */
|
||||
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST+64) /* 64: Software interrupt */
|
||||
#define KINETIS_IRQ_SPI2 (KINETIS_IRQ_FIRST+65) /* 65: SPI2 all sources */
|
||||
#define KINETIS_IRQ_UART4S (KINETIS_IRQ_FIRST+66) /* 66: UART4 status */
|
||||
#define KINETIS_IRQ_UART4E (KINETIS_IRQ_FIRST+67) /* 67: UART4 error */
|
||||
#define KINETIS_IRQ_RESVD68 (KINETIS_IRQ_FIRST+68) /* 68: Reserved */
|
||||
#define KINETIS_IRQ_RESVD69 (KINETIS_IRQ_FIRST+69) /* 69: Reserved */
|
||||
#define KINETIS_IRQ_CMP2 (KINETIS_IRQ_FIRST+70) /* 70: CMP2 */
|
||||
#define KINETIS_IRQ_FTM3 (KINETIS_IRQ_FIRST+71) /* 71: FTM3 all sources */
|
||||
#define KINETIS_IRQ_DAC1 (KINETIS_IRQ_FIRST+72) /* 72: DAC1 */
|
||||
#define KINETIS_IRQ_ADC1 (KINETIS_IRQ_FIRST+73) /* 73: ADC1 */
|
||||
#define KINETIS_IRQ_I2C2 (KINETIS_IRQ_FIRST+74) /* 74: I2C2 */
|
||||
#define KINETIS_IRQ_CAN0MB (KINETIS_IRQ_FIRST+75) /* 75: CAN0 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN0BO (KINETIS_IRQ_FIRST+76) /* 76: CAN0 Bus Off */
|
||||
#define KINETIS_IRQ_CAN0ERR (KINETIS_IRQ_FIRST+77) /* 77: CAN0 Error */
|
||||
#define KINETIS_IRQ_CAN0TW (KINETIS_IRQ_FIRST+78) /* 78: CAN0 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN0RW (KINETIS_IRQ_FIRST+79) /* 79: CAN0 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN0WU (KINETIS_IRQ_FIRST+80) /* 80: CAN0 Wake UP */
|
||||
#define KINETIS_IRQ_SDHC (KINETIS_IRQ_FIRST+81) /* 81: SDHC */
|
||||
#define KINETIS_IRQ_EMACTMR (KINETIS_IRQ_FIRST+82) /* 82: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
#define KINETIS_IRQ_EMACTX (KINETIS_IRQ_FIRST+83) /* 83: Ethernet MAC transmit interrupt */
|
||||
#define KINETIS_IRQ_EMACRX (KINETIS_IRQ_FIRST+84) /* 84: Ethernet MAC receive interrupt */
|
||||
#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST+85) /* 85: Ethernet MAC error and misc interrupt */
|
||||
#define KINETIS_IRQ_LPUART0 (KINETIS_IRQ_FIRST+86) /* 86: LPUART0 Status and error */
|
||||
#define KINETIS_IRQ_TSI0 (KINETIS_IRQ_FIRST+87) /* 87: TSI0 */
|
||||
#define KINETIS_IRQ_TPM1 (KINETIS_IRQ_FIRST+88) /* 88: TPM1 */
|
||||
#define KINETIS_IRQ_TPM2 (KINETIS_IRQ_FIRST+89) /* 89: TPM2 */
|
||||
#define KINETIS_IRQ_USBHSDCD (KINETIS_IRQ_FIRST+90) /* 90: shared by USBHS DCD & USBHS Phy modules */
|
||||
#define KINETIS_IRQ_I2C3 (KINETIS_IRQ_FIRST+91) /* 91: I2C3 */
|
||||
#define KINETIS_IRQ_CMP3 (KINETIS_IRQ_FIRST+92) /* 92: CMP3 */
|
||||
#define KINETIS_IRQ_USBHSOTG (KINETIS_IRQ_FIRST+93) /* 93: USBHS OTG*/
|
||||
#define KINETIS_IRQ_CAN1MB (KINETIS_IRQ_FIRST+94) /* 94: CAN1 OR'ed Message buffer (0-15) */
|
||||
#define KINETIS_IRQ_CAN1BO (KINETIS_IRQ_FIRST+95) /* 95: CAN1 Bus Off */
|
||||
#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST+96) /* 96: CAN1 Error */
|
||||
#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST+97) /* 97: CAN1 Transmit Warning */
|
||||
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST+98) /* 98: CAN1 Receive Warning */
|
||||
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST+99) /* 99: CAN1 Wake UP */
|
||||
|
||||
|
||||
#define NR_INTERRUPTS 100 /* 100 Non core IRQs*/
|
||||
#define NR_VECTORS (KINETIS_IRQ_FIRST+NR_INTERRUPTS) /* 116 vectors */
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_66KIRQ_H */
|
||||
@ -33,11 +33,14 @@
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# The start-up, "head", file
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
|
||||
HEAD_ASRC =
|
||||
else
|
||||
HEAD_ASRC = kinetis_vectors.S
|
||||
endif
|
||||
|
||||
# Common ARM and Cortex-M3 files
|
||||
CMN_UASRCS =
|
||||
CMN_UCSRCS =
|
||||
|
||||
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
||||
CMN_ASRCS += up_testset.S vfork.S
|
||||
@ -48,9 +51,22 @@ CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_modifyreg8.c
|
||||
CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasestack.c
|
||||
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_releasepending.c
|
||||
CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
|
||||
CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c up_vfork.c
|
||||
CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_vfork.c
|
||||
CMN_CSRCS += up_systemreset.c
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
|
||||
CMN_CSRCS += up_stackcheck.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
|
||||
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
|
||||
CMN_ASRCS += up_lazyexception.S
|
||||
else
|
||||
CMN_ASRCS += up_exception.S
|
||||
endif
|
||||
CMN_CSRCS += up_vectors.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
|
||||
endif
|
||||
@ -67,6 +83,10 @@ CMN_UASRCS += up_signal_handler.S
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STACK_COLORATION),y)
|
||||
CMN_CSRCS += up_checkstack.c
|
||||
endif
|
||||
|
||||
# Use of common/up_etherstub.c is deprecated. The preferred mechanism is to
|
||||
# use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
|
||||
# up_initialize(). Then this stub would not be needed.
|
||||
@ -83,6 +103,19 @@ else ifeq ($(CONFIG_MODULE),y)
|
||||
CMN_CSRCS += up_elf.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_FPU),y)
|
||||
CMN_ASRCS += up_fpu.S
|
||||
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
|
||||
CMN_CSRCS += up_copyarmstate.c
|
||||
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
|
||||
CMN_CSRCS += up_copyarmstate.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
|
||||
CMN_CSRCS += up_itm_syslog.c
|
||||
endif
|
||||
|
||||
# Required Kinetis files
|
||||
|
||||
CHIP_ASRCS =
|
||||
|
||||
@ -46,9 +46,18 @@
|
||||
* should then include this file for the proper setup.
|
||||
*/
|
||||
|
||||
#include <arch/irq.h>
|
||||
#include <arch/kinetis/chip.h>
|
||||
#include "chip/kinetis_memorymap.h"
|
||||
|
||||
/* If the common ARMv7-M vector handling logic is used, then it expects the
|
||||
* following definition in this file that provides the number of supported external
|
||||
* interrupts which, for this architecture, is provided in the arch/stm32f7/chip.h
|
||||
* header file.
|
||||
*/
|
||||
|
||||
#define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
156
arch/arm/src/kinetis/chip/kinetis_k20vectors.h
Normal file
156
arch/arm/src/kinetis/chip/kinetis_k20vectors.h
Normal file
@ -0,0 +1,156 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k20vectors.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor definitions
|
||||
************************************************************************************/
|
||||
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
|
||||
* supplies ach K20 vector in terms of a (lower-case) ISR label and an
|
||||
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k20irq.h.
|
||||
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
|
||||
* the interrupt vectors and handlers in their final form.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_K20)
|
||||
|
||||
/* If the common ARMv7-M vector handling is used, then all it needs is the following
|
||||
* definition that provides the number of supported vectors.
|
||||
*/
|
||||
|
||||
# ifdef CONFIG_ARMV7M_CMNVECTOR
|
||||
|
||||
/* Reserve interrupt table entries for I/O interrupts. */
|
||||
|
||||
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
# else
|
||||
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
|
||||
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
|
||||
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
|
||||
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
|
||||
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
|
||||
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
|
||||
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
|
||||
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
|
||||
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
|
||||
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
|
||||
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
|
||||
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
|
||||
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
|
||||
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
|
||||
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
|
||||
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
|
||||
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
UNUSED(KINETIS_IRQ_RESVD17) /* Vector 33: Reserved */
|
||||
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
|
||||
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
|
||||
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
|
||||
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
|
||||
UNUSED(KINETIS_IRQ_RESVD23) /* Vector 39: Reserved */
|
||||
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
|
||||
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
|
||||
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
|
||||
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
|
||||
UNUSED(KINETIS_IRQ_RESVD28) /* Vector 44: Reserved */
|
||||
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
|
||||
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
|
||||
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
|
||||
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
|
||||
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
|
||||
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD37) /* Vector 53: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD38) /* Vector 54: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD39) /* Vector 55: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD40) /* Vector 56: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD41) /* Vector 57: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD42) /* Vector 58: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
|
||||
VECTOR(kinetis_uart0l, KINETIS_IRQ_UART0L) /* Vector 60: UART0 LON */
|
||||
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
|
||||
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
|
||||
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
|
||||
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
|
||||
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
|
||||
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
|
||||
UNUSED(KINETIS_IRQ_RESVD51) /* Vector 67: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD52) /* Vector 68: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD53) /* Vector 69: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD54) /* Vector 70: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD56) /* Vector 72: Reserved */
|
||||
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
|
||||
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
|
||||
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
|
||||
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
|
||||
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
|
||||
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
|
||||
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
|
||||
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
|
||||
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
|
||||
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
|
||||
VECTOR(kinetis_rtcs, KINETIS_IRQ_RTCS) /* Vector 83: RTC seconds interrupt */
|
||||
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
|
||||
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
|
||||
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
|
||||
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
|
||||
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
|
||||
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
|
||||
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
|
||||
UNUSED(KINETIS_IRQ_RESVD75) /* Vector 91: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD76) /* Vector 92: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD77) /* Vector 93: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD78) /* Vector 94: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD79) /* Vector 95: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD80) /* Vector 96: Reserved */
|
||||
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
|
||||
UNUSED(KINETIS_IRQ_RESVD82) /* Vector 98: Reserved */
|
||||
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
|
||||
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
|
||||
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
|
||||
UNUSED(KINETIS_IRQ_RESVD86) /* Vector 102: Reserved */
|
||||
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
|
||||
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
|
||||
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
|
||||
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
|
||||
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
|
||||
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
|
||||
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
|
||||
# endif /* CONFIG_ARMV7M_CMNVECTOR */
|
||||
#endif /* CONFIG_STM32_CONNECTIVITYLINE */
|
||||
156
arch/arm/src/kinetis/chip/kinetis_k40vectors.h
Normal file
156
arch/arm/src/kinetis/chip/kinetis_k40vectors.h
Normal file
@ -0,0 +1,156 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k40vectors.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor definitions
|
||||
************************************************************************************/
|
||||
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
|
||||
* supplies ach K40 vector in terms of a (lower-case) ISR label and an
|
||||
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k40irq.h.
|
||||
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
|
||||
* the interrupt vectors and handlers in their final form.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_K40)
|
||||
|
||||
/* If the common ARMv7-M vector handling is used, then all it needs is the following
|
||||
* definition that provides the number of supported vectors.
|
||||
*/
|
||||
|
||||
# ifdef CONFIG_ARMV7M_CMNVECTOR
|
||||
|
||||
/* Reserve interrupt table entries for I/O interrupts. */
|
||||
|
||||
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
# else
|
||||
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
|
||||
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
|
||||
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
|
||||
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
|
||||
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
|
||||
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
|
||||
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
|
||||
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
|
||||
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
|
||||
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
|
||||
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
|
||||
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
|
||||
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
|
||||
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
|
||||
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
|
||||
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
|
||||
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
|
||||
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
|
||||
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
|
||||
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
|
||||
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
|
||||
UNUSED(KINETIS_IRQ_RESVD23) /* Vector 39: Reserved */
|
||||
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
|
||||
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
|
||||
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
|
||||
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
|
||||
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 44: SPI2 all sources */
|
||||
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
|
||||
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
|
||||
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
|
||||
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
|
||||
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
|
||||
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
|
||||
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 54: CAN1 Bus Off */
|
||||
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR) /* Vector 55: CAN1 Error */
|
||||
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 56: CAN1 Transmit Warning */
|
||||
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 57: CAN1 Receive Warning */
|
||||
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 58: CAN1 Wake UP */
|
||||
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD44) /* Vector 60: Reserved */
|
||||
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
|
||||
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
|
||||
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
|
||||
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
|
||||
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
|
||||
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
|
||||
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 67: UART3 status */
|
||||
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 68: UART3 error */
|
||||
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 69: UART4 status */
|
||||
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 70: UART4 error */
|
||||
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 71: UART5 status */
|
||||
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 72: UART5 error */
|
||||
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
|
||||
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
|
||||
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
|
||||
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
|
||||
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
|
||||
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
|
||||
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
|
||||
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
|
||||
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
|
||||
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
|
||||
UNUSED(KINETIS_IRQ_RESVD67) /* Vector 83: Reserved */
|
||||
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
|
||||
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
|
||||
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
|
||||
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
|
||||
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
|
||||
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
|
||||
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
|
||||
UNUSED(KINETIS_IRQ_RESVD75) /* Vector 91: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD76) /* Vector 92: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD77) /* Vector 93: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD78) /* Vector 94: Reserved */
|
||||
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 95: I2S0 */
|
||||
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 96: SDHC */
|
||||
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
|
||||
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 98: DAC1 */
|
||||
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
|
||||
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
|
||||
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
|
||||
VECTOR(kinetis_slcd, KINETIS_IRQ_SLCD) /* Vector 102: Segment LCD all sources */
|
||||
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
|
||||
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
|
||||
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
|
||||
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
|
||||
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
|
||||
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
|
||||
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
|
||||
# endif /* CONFIG_ARMV7M_CMNVECTOR */
|
||||
#endif /* CONFIG_ARCH_FAMILY_K40 */
|
||||
156
arch/arm/src/kinetis/chip/kinetis_k60vectors.h
Normal file
156
arch/arm/src/kinetis/chip/kinetis_k60vectors.h
Normal file
@ -0,0 +1,156 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k60vectors.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor definitions
|
||||
************************************************************************************/
|
||||
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
|
||||
* supplies ach K60 vector in terms of a (lower-case) ISR label and an
|
||||
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k60irq.h.
|
||||
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
|
||||
* the interrupt vectors and handlers in their final form.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_K60)
|
||||
|
||||
/* If the common ARMv7-M vector handling is used, then all it needs is the following
|
||||
* definition that provides the number of supported vectors.
|
||||
*/
|
||||
|
||||
# ifdef CONFIG_ARMV7M_CMNVECTOR
|
||||
|
||||
/* Reserve interrupt table entries for I/O interrupts. */
|
||||
|
||||
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
# else
|
||||
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
|
||||
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
|
||||
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
|
||||
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
|
||||
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
|
||||
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
|
||||
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
|
||||
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
|
||||
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
|
||||
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
|
||||
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
|
||||
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
|
||||
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
|
||||
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
|
||||
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
|
||||
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
|
||||
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
|
||||
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
|
||||
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
|
||||
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
|
||||
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
|
||||
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
|
||||
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
|
||||
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
|
||||
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
|
||||
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
|
||||
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 44: SPI2 all sources */
|
||||
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
|
||||
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
|
||||
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
|
||||
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
|
||||
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
|
||||
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
|
||||
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 54: CAN1 Bus Off */
|
||||
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR) /* Vector 55: CAN1 Error */
|
||||
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 56: CAN1 Transmit Warning */
|
||||
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 57: CAN1 Receive Warning */
|
||||
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 58: CAN1 Wake UP */
|
||||
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD44) /* Vector 60: Reserved */
|
||||
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
|
||||
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
|
||||
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
|
||||
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
|
||||
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
|
||||
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
|
||||
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 67: UART3 status */
|
||||
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 68: UART3 error */
|
||||
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 69: UART4 status */
|
||||
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 70: UART4 error */
|
||||
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 71: UART5 status */
|
||||
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 72: UART5 error */
|
||||
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
|
||||
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
|
||||
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
|
||||
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
|
||||
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
|
||||
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
|
||||
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
|
||||
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
|
||||
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
|
||||
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
|
||||
UNUSED(KINETIS_IRQ_RESVD67) /* Vector 83: Reserved */
|
||||
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
|
||||
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
|
||||
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
|
||||
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
|
||||
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
|
||||
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
|
||||
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
|
||||
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 92: Ethernet MAC transmit interrupt */
|
||||
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 93: Ethernet MAC receive interrupt */
|
||||
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
|
||||
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 95: I2S0 */
|
||||
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 96: SDHC */
|
||||
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
|
||||
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 98: DAC1 */
|
||||
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
|
||||
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
|
||||
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
|
||||
UNUSED(KINETIS_IRQ_RESVD86) /* Vector 102: Reserved */
|
||||
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
|
||||
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
|
||||
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
|
||||
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
|
||||
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
|
||||
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
|
||||
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
|
||||
# endif /* CONFIG_ARMV7M_CMNVECTOR */
|
||||
#endif /* CONFIG_ARCH_FAMILY_K60 */
|
||||
147
arch/arm/src/kinetis/chip/kinetis_k64vectors.h
Normal file
147
arch/arm/src/kinetis/chip/kinetis_k64vectors.h
Normal file
@ -0,0 +1,147 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k64vectors.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor definitions
|
||||
************************************************************************************/
|
||||
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
|
||||
* supplies ach K64 vector in terms of a (lower-case) ISR label and an
|
||||
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k64irq.h.
|
||||
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
|
||||
* the interrupt vectors and handlers in their final form.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_K64)
|
||||
|
||||
/* If the common ARMv7-M vector handling is used, then all it needs is the following
|
||||
* definition that provides the number of supported vectors.
|
||||
*/
|
||||
|
||||
# ifdef CONFIG_ARMV7M_CMNVECTOR
|
||||
|
||||
/* Reserve interrupt table entries for I/O interrupts. */
|
||||
|
||||
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
# else
|
||||
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
|
||||
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
|
||||
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
|
||||
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
|
||||
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
|
||||
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
|
||||
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
|
||||
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
|
||||
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
|
||||
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
|
||||
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
|
||||
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
|
||||
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
|
||||
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
|
||||
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
|
||||
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
|
||||
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
|
||||
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
|
||||
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
|
||||
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
|
||||
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
|
||||
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
|
||||
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
|
||||
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
|
||||
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
|
||||
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
|
||||
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 44: Transmit */
|
||||
VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1) /* Vector 45: Transmit */
|
||||
UNUSED(KINETIS_IRQ_RESVD30) /* Vector 46: Reserved */
|
||||
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 47: UART0 status */
|
||||
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 48: UART0 error */
|
||||
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 49: UART1 status */
|
||||
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 50: UART1 error */
|
||||
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 51: UART2 status */
|
||||
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 52: UART2 error */
|
||||
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 53: UART3 status */
|
||||
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 54: UART3 error */
|
||||
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 55: ADC0 */
|
||||
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 56: CMP0 */
|
||||
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 57: CMP1 */
|
||||
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 58: FTM0 all sources */
|
||||
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 59: FTM1 all sources */
|
||||
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 60: FTM2 all sources */
|
||||
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 61: CMT */
|
||||
VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC) /* Vector 62: RTC alarm interrupt */
|
||||
VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS) /* Vector 63: RTC seconds interrupt */
|
||||
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 64: PIT channel 0 */
|
||||
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 65: PIT channel 1 */
|
||||
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 66: PIT channel 2 */
|
||||
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 67: PIT channel 3 */
|
||||
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 68: PDB */
|
||||
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 69: USB OTG */
|
||||
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 70: USB charger detect */
|
||||
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
|
||||
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 72: DAC0 */
|
||||
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 73: MCG */
|
||||
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 74: Low power timer */
|
||||
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 75: Pin detect port A */
|
||||
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 76: Pin detect port B */
|
||||
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 77: Pin detect port C */
|
||||
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 78: Pin detect port D */
|
||||
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 79: Pin detect port E */
|
||||
VECTOR(kinetis_software, KINETIS_IRQ_SWI) /* Vector 80: Software interrupt */
|
||||
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 81: SPI2 all sources */
|
||||
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 82: UART4 status */
|
||||
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 83: UART4 error */
|
||||
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 84: UART5 status */
|
||||
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 85: UART5 error */
|
||||
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 86: CMP2 */
|
||||
VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3) /* Vector 87: FTM3 all sources */
|
||||
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 88: DAC1 */
|
||||
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 89: ADC1 */
|
||||
VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2) /* Vector 90: I2C2 */
|
||||
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 91: CAN0 ORed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 92: CAN0 Bus Off */
|
||||
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 93: CAN0 Error */
|
||||
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 94: CAN0 Transmit Warning */
|
||||
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 95: CAN0 Receive Warning */
|
||||
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 96: CAN0 Wake UP */
|
||||
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 97: SDHC */
|
||||
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 92: Ethernet MAC transmit interrupt */
|
||||
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 93: Ethernet MAC receive interrupt */
|
||||
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
|
||||
# endif /* CONFIG_ARMV7M_CMNVECTOR */
|
||||
#endif /* CONFIG_ARCH_FAMILY_K64 */
|
||||
162
arch/arm/src/kinetis/chip/kinetis_k66vectors.h
Normal file
162
arch/arm/src/kinetis/chip/kinetis_k66vectors.h
Normal file
@ -0,0 +1,162 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k64vectors.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor definitions
|
||||
************************************************************************************/
|
||||
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
|
||||
* supplies ach K64 vector in terms of a (lower-case) ISR label and an
|
||||
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k64irq.h.
|
||||
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
|
||||
* the interrupt vectors and handlers in their final form.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_FAMILY_K64)
|
||||
|
||||
/* If the common ARMv7-M vector handling is used, then all it needs is the following
|
||||
* definition that provides the number of supported vectors.
|
||||
*/
|
||||
|
||||
# ifdef CONFIG_ARMV7M_CMNVECTOR
|
||||
|
||||
/* Reserve interrupt table entries for I/O interrupts. */
|
||||
|
||||
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
|
||||
|
||||
# else
|
||||
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
|
||||
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
|
||||
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
|
||||
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
|
||||
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
|
||||
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
|
||||
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
|
||||
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
|
||||
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
|
||||
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
|
||||
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
|
||||
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
|
||||
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
|
||||
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
|
||||
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
|
||||
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
|
||||
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
|
||||
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
|
||||
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
|
||||
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
|
||||
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
|
||||
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
|
||||
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
|
||||
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
|
||||
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
|
||||
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
|
||||
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 44: Transmit */
|
||||
VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1) /* Vector 45: Transmit */
|
||||
UNUSED(KINETIS_IRQ_RESVD30) /* Vector 46: Reserved */
|
||||
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 47: UART0 status */
|
||||
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 48: UART0 error */
|
||||
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 49: UART1 status */
|
||||
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 50: UART1 error */
|
||||
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 51: UART2 status */
|
||||
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 52: UART2 error */
|
||||
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 53: UART3 status */
|
||||
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 54: UART3 error */
|
||||
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 55: ADC0 */
|
||||
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 56: CMP0 */
|
||||
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 57: CMP1 */
|
||||
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 58: FTM0 all sources */
|
||||
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 59: FTM1 all sources */
|
||||
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 60: FTM2 all sources */
|
||||
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 61: CMT */
|
||||
VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC) /* Vector 62: RTC alarm interrupt */
|
||||
VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS) /* Vector 63: RTC seconds interrupt */
|
||||
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 64: PIT channel 0 */
|
||||
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 65: PIT channel 1 */
|
||||
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 66: PIT channel 2 */
|
||||
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 67: PIT channel 3 */
|
||||
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 68: PDB */
|
||||
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 69: USB OTG */
|
||||
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 70: USB charger detect */
|
||||
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
|
||||
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 72: DAC0 */
|
||||
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 73: MCG */
|
||||
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 74: Low power timer */
|
||||
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 75: Pin detect port A */
|
||||
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 76: Pin detect port B */
|
||||
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 77: Pin detect port C */
|
||||
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 78: Pin detect port D */
|
||||
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 79: Pin detect port E */
|
||||
VECTOR(kinetis_software, KINETIS_IRQ_SWI) /* Vector 80: Software interrupt */
|
||||
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 81: SPI2 all sources */
|
||||
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 82: UART4 status */
|
||||
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 83: UART4 error */
|
||||
UNUSED(KINETIS_IRQ_RESVD68) /* Vector 84: Reserved */
|
||||
UNUSED(KINETIS_IRQ_RESVD69) /* Vector 85: Reserved */
|
||||
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 86: CMP2 */
|
||||
VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3) /* Vector 87: FTM3 all sources */
|
||||
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 88: DAC1 */
|
||||
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 89: ADC1 */
|
||||
VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2) /* Vector 90: I2C2 */
|
||||
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 91: CAN0 ORed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 92: CAN0 Bus Off */
|
||||
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 93: CAN0 Error */
|
||||
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 94: CAN0 Transmit Warning */
|
||||
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 95: CAN0 Receive Warning */
|
||||
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 96: CAN0 Wake UP */
|
||||
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 97: SDHC */
|
||||
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 98: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 99: Ethernet MAC transmit interrupt */
|
||||
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 100: Ethernet MAC receive interrupt */
|
||||
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 101: Ethernet MAC error and misc interrupt */
|
||||
VECTOR(kinetis_lpuart0, KINETIS_IRQ_LPUART0) /* Vector 102: LPUART0 Status and error */
|
||||
VECTOR(kinetis_tsi0, KINETIS_IRQ_TSI0) /* Vector 103: TSI0 */
|
||||
VECTOR(kinetis_tpm1, KINETIS_IRQ_TPM1) /* Vector 104: TPM1 */
|
||||
VECTOR(kinetis_tpm2, KINETIS_IRQ_TPM2) /* Vector 105: TPM2 */
|
||||
VECTOR(kinetis_usbhsdcd,KINETIS_IRQ_USBHSDCD) /* Vector 106: shared by USBHS DCD & USBHS Phy modules */
|
||||
VECTOR(kinetis_i2c3, KINETIS_IRQ_I2C3) /* Vector 107: I2C3 */
|
||||
VECTOR(kinetis_cmp3, KINETIS_IRQ_CMP3) /* Vector 108: CMP3 */
|
||||
VECTOR(kinetis_usbhsotg,KINETIS_IRQ_USBHSOTG) /* Vector 109: USBHS OTG*/
|
||||
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 110: CAN1 OR'ed Message buffer (0-15) */
|
||||
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 111: CAN1 Bus Off */
|
||||
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR ) /* Vector 112: CAN1 Error */
|
||||
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 113: CAN1 Transmit Warning */
|
||||
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 114: CAN1 Receive Warning */
|
||||
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 115: CAN1 Wake UP */
|
||||
|
||||
# endif /* CONFIG_ARMV7M_CMNVECTOR */
|
||||
#endif /* CONFIG_ARCH_FAMILY_K64 */
|
||||
@ -82,23 +82,23 @@ void kinetis_clrpend(int irq)
|
||||
{
|
||||
/* Check for external interrupt */
|
||||
|
||||
if (irq >= KINETIS_IRQ_EXTINT)
|
||||
if (irq >= KINETIS_IRQ_FIRST)
|
||||
{
|
||||
if (irq < (KINETIS_IRQ_EXTINT+32))
|
||||
if (irq < (KINETIS_IRQ_FIRST+32))
|
||||
{
|
||||
putreg32(1 << (irq - KINETIS_IRQ_EXTINT), NVIC_IRQ0_31_CLRPEND);
|
||||
putreg32(1 << (irq - KINETIS_IRQ_FIRST), NVIC_IRQ0_31_CLRPEND);
|
||||
}
|
||||
else if (irq < (KINETIS_IRQ_EXTINT+64))
|
||||
else if (irq < (KINETIS_IRQ_FIRST+64))
|
||||
{
|
||||
putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 32), NVIC_IRQ32_63_CLRPEND);
|
||||
putreg32(1 << (irq - KINETIS_IRQ_FIRST - 32), NVIC_IRQ32_63_CLRPEND);
|
||||
}
|
||||
else if (irq < (KINETIS_IRQ_EXTINT+96))
|
||||
else if (irq < (KINETIS_IRQ_FIRST+96))
|
||||
{
|
||||
putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 64), NVIC_IRQ64_95_CLRPEND);
|
||||
putreg32(1 << (irq - KINETIS_IRQ_FIRST - 64), NVIC_IRQ64_95_CLRPEND);
|
||||
}
|
||||
else if (irq < NR_IRQS)
|
||||
{
|
||||
putreg32(1 << (irq - KINETIS_IRQ_EXTINT - 96), NVIC_IRQ96_127_CLRPEND);
|
||||
putreg32(1 << (irq - KINETIS_IRQ_FIRST - 96), NVIC_IRQ96_127_CLRPEND);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -258,27 +258,27 @@ static int kinetis_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
|
||||
|
||||
/* Check for external interrupt */
|
||||
|
||||
if (irq >= KINETIS_IRQ_EXTINT)
|
||||
if (irq >= KINETIS_IRQ_FIRST)
|
||||
{
|
||||
if (irq < (KINETIS_IRQ_EXTINT+32))
|
||||
if (irq < (KINETIS_IRQ_FIRST+32))
|
||||
{
|
||||
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_EXTINT);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_FIRST);
|
||||
}
|
||||
else if (irq < (KINETIS_IRQ_EXTINT+64))
|
||||
else if (irq < (KINETIS_IRQ_FIRST+64))
|
||||
{
|
||||
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 32);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_FIRST - 32);
|
||||
}
|
||||
else if (irq < (KINETIS_IRQ_EXTINT+96))
|
||||
else if (irq < (KINETIS_IRQ_FIRST+96))
|
||||
{
|
||||
*regaddr = (NVIC_IRQ64_95_ENABLE + offset);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 64);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_FIRST - 64);
|
||||
}
|
||||
else if (irq < NR_IRQS)
|
||||
{
|
||||
*regaddr = (NVIC_IRQ96_127_ENABLE + offset);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 96);
|
||||
*bit = 1 << (irq - KINETIS_IRQ_FIRST - 96);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -472,7 +472,7 @@ void up_disable_irq(int irq)
|
||||
* clear the bit in the System Handler Control and State Register.
|
||||
*/
|
||||
|
||||
if (irq >= KINETIS_IRQ_EXTINT)
|
||||
if (irq >= KINETIS_IRQ_FIRST)
|
||||
{
|
||||
putreg32(bit, regaddr);
|
||||
}
|
||||
@ -509,7 +509,7 @@ void up_enable_irq(int irq)
|
||||
* set the bit in the System Handler Control and State Register.
|
||||
*/
|
||||
|
||||
if (irq >= KINETIS_IRQ_EXTINT)
|
||||
if (irq >= KINETIS_IRQ_FIRST)
|
||||
{
|
||||
putreg32(bit, regaddr);
|
||||
}
|
||||
@ -560,7 +560,7 @@ int up_prioritize_irq(int irq, int priority)
|
||||
DEBUGASSERT(irq >= KINETIS_IRQ_MEMFAULT && irq < NR_IRQS &&
|
||||
(unsigned)priority <= NVIC_SYSH_PRIORITY_MIN);
|
||||
|
||||
if (irq < KINETIS_IRQ_EXTINT)
|
||||
if (irq < KINETIS_IRQ_FIRST)
|
||||
{
|
||||
/* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority
|
||||
* registers (0-3 are invalid)
|
||||
@ -573,7 +573,7 @@ int up_prioritize_irq(int irq, int priority)
|
||||
{
|
||||
/* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
|
||||
|
||||
irq -= KINETIS_IRQ_EXTINT;
|
||||
irq -= KINETIS_IRQ_FIRST;
|
||||
regaddr = NVIC_IRQ_PRIORITY(irq);
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user