arch/nrf53: add GPIOTE support
This commit is contained in:
raiden00pl
Alan Carvalho de Assis
parent
74b0e8c2c8
commit
bcecf2023f
@ -23,6 +23,7 @@ config NRF53_APPCORE
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select ARM_HAVE_DSP
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select ARCH_HAVE_FPU
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select NRF53_HAVE_PWM
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select NRF52_HAVE_GPIOTE1
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select NRF53_HAVE_SAADC
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select NRF53_HAVE_UART1
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@ -75,6 +76,10 @@ config NRF53_HAVE_UART1
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bool
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default n
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config NRF53_HAVE_GPIOTE1
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bool
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default n
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config NRF53_HAVE_PWM
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bool
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default n
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@ -103,6 +108,10 @@ config NRF53_PWM
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menu "NRF53 Peripheral Selection"
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config NRF53_GPIOTE
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bool "GPIOTE (GPIO interrupts)"
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default n
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config NRF53_UART0
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bool "UART0"
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default n
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@ -404,6 +413,27 @@ endif # NRF53_SAADC
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endmenu # SAADC Configuration
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menu "GPIO Interrupt Configuration"
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config NRF53_PER_PIN_INTERRUPTS
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bool "Per-pin interrupt callbacks"
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default !DEFAULT_SMALL
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depends on NRF53_GPIOTE
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---help---
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The GPIOTE peripheral supports a limited number of channels which can
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be set to EVENT mode and thus generate interrupts on pin state changes.
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Another mechanism offered by the GPIO/GPIOTE peripherals is the PORT
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event. This event is generated from a signal shared by all pins in
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the GPIO port.
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This option enables the ability to set per-pin callbacks that will
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be invoked from the main GPIOTE ISR when a PORT event is generated.
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As this involves extra storage to store each callback, this option can
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be disabled to save space. In such case, it is possible to set a callback
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for the whole PORT event directly.
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endmenu # GPIO Interrupt Configuration
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menuconfig NRF53_SOFTDEVICE_CONTROLLER
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bool "SoftDevice Controller"
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depends on ALLOW_BSDNORDIC_COMPONENTS
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@ -35,6 +35,10 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += nrf53_idle.c
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endif
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ifeq ($(CONFIG_NRF53_GPIOTE),y)
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CHIP_CSRCS += nrf53_gpiote.c
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endif
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ifeq ($(CONFIG_NRF53_UART),y)
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CHIP_CSRCS += nrf53_serial.c
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endif
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@ -48,7 +48,7 @@
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#define NRF53_CTRLAPPERI_BASE 0x41006000
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#define NRF53_RADIO_BASE 0x41008000
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#define NRF53_RNG_BASE 0x41009000
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#define NRF53_GPIOTE_BASE 0x4100A000
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#define NRF53_GPIOTE0_BASE 0x4100A000
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#define NRF53_WDT_BASE 0x4100B000
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#define NRF53_TIMER0_BASE 0x4100C000
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#define NRF53_ECB_BASE 0x4100D000
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653
arch/arm/src/nrf53/nrf53_gpiote.c
Normal file
653
arch/arm/src/nrf53/nrf53_gpiote.c
Normal file
@ -0,0 +1,653 @@
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/****************************************************************************
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* arch/arm/src/nrf53/nrf53_gpiote.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <string.h>
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#include <arch/irq.h>
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#include <nuttx/arch.h>
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#include "arm_internal.h"
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#include "nrf53_gpio.h"
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#include "nrf53_gpiote.h"
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#include "hardware/nrf53_gpiote.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define GPIOTE_PER_CHANNEL (8)
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#ifdef CONFIG_NRF53_HAVE_GPIOTE1
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# define GPIOTE_CHANNELS (16)
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#else
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# define GPIOTE_CHANNELS (8)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct nrf53_gpiote_callback_s
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{
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xcpt_t callback;
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void *arg;
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Callbacks attached to each GPIOTE channel */
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static struct nrf53_gpiote_callback_s g_gpiote_ch_callbacks[GPIOTE_CHANNELS];
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#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
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/* Callbacks attached to each GPIO pin */
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static struct nrf53_gpiote_callback_s
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g_gpiote_pin_callbacks[NRF53_GPIO_NPORTS][NRF53_GPIO_NPINS];
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#else
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/* Callback for the PORT event */
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static struct nrf53_gpiote_callback_s
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g_gpiote_port_callback[NRF53_GPIO_NPORTS];
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: nrf53_gpiote_putreg
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*
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* Description:
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* Put a 32-bit register value by offset for a given GPIOTE instance
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*
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****************************************************************************/
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static inline void nrf53_gpiote_putreg(int inst, uint32_t offset,
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uint32_t value)
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{
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#ifdef CONFIG_NRF53_HAVE_GPIOTE1
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if (inst == 1)
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{
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putreg32(value, NRF53_GPIOTE1_BASE + offset);
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}
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else
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#endif
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{
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putreg32(value, NRF53_GPIOTE0_BASE + offset);
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}
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}
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/****************************************************************************
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* Name: nrf53_gpiote_getreg
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*
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* Description:
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* Get a 32-bit register value by offset for a given GPIOTE instance
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*
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****************************************************************************/
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static inline uint32_t nrf53_gpiote_getreg(int inst, uint32_t offset)
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{
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#ifdef CONFIG_NRF53_HAVE_GPIOTE1
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if (inst == 1)
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{
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return getreg32(NRF53_GPIOTE1_BASE + offset);
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}
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else
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#endif
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{
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return getreg32(NRF53_GPIOTE0_BASE + offset);
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}
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}
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/****************************************************************************
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* Name: nrf53_gpiote_isr
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*
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* Description:
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* Common GPIOTE interrupt handler (GPIOTE0 and GPIOTE1)
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*
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****************************************************************************/
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static int nrf53_gpiote_isr(int irq, void *context, void *arg)
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{
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uint32_t regval = 0;
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int ret = OK;
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int i = 0;
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int inst = 0;
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int off = 0;
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#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
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int j = 0;
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#endif
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/* Get GPIOTE instnace */
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#ifdef CONFIG_NRF53_HAVE_GPIOTE1
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ints = (irq == NRF53_IRQ_GPIOTE0) ? 0 : 1;
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#else
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inst = 0;
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#endif
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/* Scan all GPIOTE channels */
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for (i = 0; i < GPIOTE_CHANNELS; i += 1)
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{
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off = i + GPIOTE_PER_CHANNEL * inst;
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/* Only if callback is registered */
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if (g_gpiote_ch_callbacks[off].callback != NULL)
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{
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/* Get input event register */
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regval = nrf53_gpiote_getreg(inst,
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NRF53_GPIOTE_EVENTS_IN_OFFSET(i));
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if (regval == GPIOTE_EVENT_IN_EVENT)
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{
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/* Execute callback */
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xcpt_t callback = g_gpiote_ch_callbacks[off].callback;
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void *cbarg = g_gpiote_ch_callbacks[off].arg;
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ret = callback(irq, context, cbarg);
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/* Clear event */
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nrf53_gpiote_putreg(inst, NRF53_GPIOTE_EVENTS_IN_OFFSET(i), 0);
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}
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}
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}
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/* Check for PORT event */
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regval = nrf53_gpiote_getreg(inst, NRF53_GPIOTE_EVENTS_PORT_OFFSET);
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if (regval)
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{
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uint32_t addr = 0;
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/* Ack PORT event */
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nrf53_gpiote_putreg(inst, NRF53_GPIOTE_EVENTS_PORT_OFFSET, 0);
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/* For each GPIO port, get LATCH register */
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for (i = 0; i < NRF53_GPIO_NPORTS; i++)
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{
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switch (i)
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{
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case 0:
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addr = NRF53_GPIO_P0_BASE + NRF53_GPIO_LATCH_OFFSET;
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break;
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case 1:
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addr = NRF53_GPIO_P1_BASE + NRF53_GPIO_LATCH_OFFSET;
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break;
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}
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/* Retrieve LATCH register */
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regval = getreg32(addr);
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/* Clear LATCH register (this may set PORT again) */
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putreg32(0xffffffff, addr);
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#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
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/* Check for pins with DETECT bit high in LATCH register
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* and dispatch callback if set
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*/
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for (j = 0; j < NRF53_GPIO_NPINS && regval; j++)
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{
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if (regval & (1 << j) && g_gpiote_pin_callbacks[i][j].callback)
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{
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/* Run callback */
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xcpt_t callback = g_gpiote_pin_callbacks[i][j].callback;
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void *cbarg = g_gpiote_pin_callbacks[i][j].arg;
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ret = callback(irq, context, cbarg);
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/* Mark bit is as "visited", we can stop looping sooner
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* this way
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*/
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regval &= ~(1 << j);
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}
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}
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#else
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if (g_gpiote_port_callback[i].callback)
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{
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xcpt_t callback = g_gpiote_port_callback[i].callback;
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void *cbarg = g_gpiote_port_callback[i].arg;
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ret = callback(irq, context, cbarg);
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}
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#endif
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}
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
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/****************************************************************************
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* Name: nrf53_gpiote_set_pin_event
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*
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* Description:
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* Sets/clears a handler for a given pin for the GPIO PORT event. This
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* will mean edge-sensitive or level-sensitive according to GPIO detect
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* mode configuration for the port (see nrf53_gpio_detectmode()). Pin
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* will be sensitive to high/low according to GPIO_SENSE_LOW/HIGH
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* (set via nrf53_gpio_config()).
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*
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* The passed handler will be invoked from the main ISR for the PORT
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* event and will take care of clearing the LATCH register.
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*
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* Input Parameters:
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* - pinset: GPIO pin configuration
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* - func: When non-NULL, generate interrupt
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* - arg: Argument passed to the interrupt callback
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*
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****************************************************************************/
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void nrf53_gpiote_set_pin_event(uint32_t pinset, xcpt_t func, void *arg)
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{
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int pin = 0;
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int port = 0;
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irqstate_t flags;
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pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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flags = enter_critical_section();
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g_gpiote_pin_callbacks[port][pin].callback = func;
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g_gpiote_pin_callbacks[port][pin].arg = arg;
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leave_critical_section(flags);
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}
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#else
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/****************************************************************************
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* Name: nrf53_gpiote_set_port_event
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*
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* Description:
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* Sets/clears the handler for the GPIO PORT event.
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*
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* The passed handler will be invoked from the main ISR for the PORT
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* event and will take care of clearing the LATCH register.
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*
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* Port events available only for GPIOTE0 for now.
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*
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* Input Parameters:
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* - pinset: GPIO port will be extracted from this parameter
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* - func: When non-NULL, generate interrupt
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* - arg: Argument passed to the interrupt callback
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*
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****************************************************************************/
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void nrf53_gpiote_set_port_event(uint32_t pinset, xcpt_t func, void *arg)
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{
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int port = 0;
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int inst = 0;
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irqstate_t flags;
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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flags = enter_critical_section();
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g_gpiote_port_callback[port].callback = func;
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g_gpiote_port_callback[port].arg = arg;
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if (func)
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{
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/* Enable the ISR */
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nrf53_gpiote_putreg(inst, NRF53_GPIOTE_INTENSET_OFFSET,
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GPIOTE_INT_PORT);
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}
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else
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{
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/* Check if we can disable the ISR */
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int i;
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for (i = 0; i < NRF53_GPIO_NPORTS; i++)
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{
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if (g_gpiote_port_callback[port].callback)
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{
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break;
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}
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}
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if (i == NRF53_GPIO_NPORTS)
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{
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nrf53_gpiote_putreg(inst, NRF53_GPIOTE_INTENCLR_OFFSET,
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GPIOTE_INT_PORT);
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}
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}
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leave_critical_section(flags);
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}
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#endif
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/****************************************************************************
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* Name: nrf53_gpiote_set_ch_event
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*
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* Description:
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* Configures a GPIOTE channel in EVENT mode, assigns it to a given pin
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* and sets a handler for the corresponding channel events.
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*
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* Input Parameters:
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* - pinset: GPIO pin configuration
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* - channel: GPIOTE channel used to capture events
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* - risingedge: Enables interrupt on rising edges
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* - fallingedge: Enables interrupt on falling edges
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* - func: When non-NULL, generate interrupt
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* - arg: Argument passed to the interrupt callback
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*
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****************************************************************************/
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void nrf53_gpiote_set_ch_event(uint32_t pinset, int channel,
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bool risingedge, bool fallingedge,
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xcpt_t func, void *arg)
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{
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int pin = 0;
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int port = 0;
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int inst = 0;
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uint32_t regval = 0;
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uint32_t rchan = 0;
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irqstate_t flags;
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DEBUGASSERT(channel < GPIOTE_CHANNELS);
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/* Get GPIOTE instnace */
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#ifdef CONFIG_NRF53_HAVE_GPIOTE1
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inst = (channel < GPIOTE_PER_CHANNEL) ? 0 : 1;
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#else
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inst = 0;
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#endif
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rchan = (inst == 1) ? channel : (channel - GPIOTE_PER_CHANNEL);
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/* NOTE: GPIOTE module has priority over GPIO module
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* so GPIO configuration will be ignored
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*/
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flags = enter_critical_section();
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if (func)
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{
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/* Select EVENT mode */
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regval |= GPIOTE_CONFIG_MODE_EV;
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/* Select GPIOTE pin */
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pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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regval |= (pin << GPIOTE_CONFIG_PSEL_SHIFT);
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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regval |= (port << GPIOTE_CONFIG_PORT_SHIFT);
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/* Select polarity */
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if (risingedge == true && fallingedge == true)
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{
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regval |= GPIOTE_CONFIG_POL_TG;
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}
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else if (risingedge == true)
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{
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regval |= GPIOTE_CONFIG_POL_LTH;
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}
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else if (fallingedge == true)
|
||||
{
|
||||
regval |= GPIOTE_CONFIG_POL_HTL;
|
||||
}
|
||||
|
||||
/* Enable callback for channel */
|
||||
|
||||
g_gpiote_ch_callbacks[channel].callback = func;
|
||||
g_gpiote_ch_callbacks[channel].arg = arg;
|
||||
|
||||
/* Enable interrupt for given event */
|
||||
|
||||
nrf53_gpiote_putreg(inst, NRF53_GPIOTE_INTENSET_OFFSET,
|
||||
GPIOTE_INT_IN(rchan));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Leave register as zero (disabled mode) */
|
||||
|
||||
/* Disable interrupt for given event */
|
||||
|
||||
nrf53_gpiote_putreg(inst, NRF53_GPIOTE_INTENCLR_OFFSET,
|
||||
GPIOTE_INT_IN(rchan));
|
||||
|
||||
/* Remove callback configuration */
|
||||
|
||||
g_gpiote_ch_callbacks[channel].callback = NULL;
|
||||
g_gpiote_ch_callbacks[channel].arg = NULL;
|
||||
}
|
||||
|
||||
/* Write CONFIG register */
|
||||
|
||||
nrf53_gpiote_putreg(inst, NRF53_GPIOTE_CONFIG_OFFSET(rchan), regval);
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_set_event
|
||||
*
|
||||
* Description:
|
||||
* Configures a GPIOTE channel in EVENT mode, assigns it to a given pin
|
||||
* and sets a handler for the first availalbe GPIOTE channel
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - risingedge: Enables interrupt on rising edges
|
||||
* - fallingedge: Enables interrupt on falling edges
|
||||
* - func: When non-NULL, generate interrupt
|
||||
* - arg: Argument passed to the interrupt callback
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure indicating the
|
||||
* nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int nrf53_gpiote_set_event(uint32_t pinset,
|
||||
bool risingedge, bool fallingedge,
|
||||
xcpt_t func, void *arg)
|
||||
{
|
||||
irqstate_t flags;
|
||||
int ret = -ENOMEM;
|
||||
int i = 0;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
/* Get free channel */
|
||||
|
||||
for (i = 0; i < GPIOTE_CHANNELS; i++)
|
||||
{
|
||||
if (g_gpiote_ch_callbacks[i].callback == NULL)
|
||||
{
|
||||
/* Configure channel */
|
||||
|
||||
nrf53_gpiote_set_ch_event(pinset, i,
|
||||
risingedge, fallingedge,
|
||||
func, arg);
|
||||
|
||||
/* Return the channel index */
|
||||
|
||||
ret = i;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpio_set_task
|
||||
*
|
||||
* Description:
|
||||
* Configure GPIO in TASK mode (to be controlled via tasks).
|
||||
* Note that a pin can only be either in TASK or EVENT mode (set by
|
||||
* nrf53_gpiosetevent with event set to true). Also, once set to TASK mode,
|
||||
* pin control is only possible via tasks on the via nrf53_gpio_write and
|
||||
* will automatically set the output mode.
|
||||
* Finally, a given pin should only be assigned to a given channel.
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: gpio pin configuration (only port + pin is important here)
|
||||
* - channel: the GPIOTE channel used to control the given pin
|
||||
* - output_high: set pin initially to output HIGH or LOW.
|
||||
* - outcfg: configure pin behavior one OUT task is triggered
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf53_gpiote_set_task(uint32_t pinset, int channel,
|
||||
bool output_high,
|
||||
enum nrf53_gpiote_outcfg_e outcfg)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t rchan;
|
||||
int pin;
|
||||
int port;
|
||||
int inst;
|
||||
|
||||
/* Get GPIOTE instnace */
|
||||
|
||||
#ifdef CONFIG_NRF53_HAVE_GPIOTE1
|
||||
inst = (channel < GPIOTE_PER_CHANNEL) ? 0 : 1;
|
||||
#else
|
||||
inst = 0;
|
||||
#endif
|
||||
|
||||
rchan = (inst == 1) ? channel : (channel - GPIOTE_PER_CHANNEL);
|
||||
|
||||
/* Select GPIOTE pin */
|
||||
|
||||
pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
regval = (pin << GPIOTE_CONFIG_PSEL_SHIFT);
|
||||
|
||||
port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
regval |= (port << GPIOTE_CONFIG_PORT_SHIFT);
|
||||
|
||||
/* Select TASK mode */
|
||||
|
||||
regval |= GPIOTE_CONFIG_MODE_TS;
|
||||
|
||||
/* Select pin number */
|
||||
|
||||
regval |= (pin << GPIOTE_CONFIG_PSEL_SHIFT);
|
||||
|
||||
/* Select initial output */
|
||||
|
||||
if (output_high)
|
||||
{
|
||||
regval |= (1 << GPIOTE_CONFIG_OUTINIT_SHIFT);
|
||||
}
|
||||
|
||||
/* Set polarity mode */
|
||||
|
||||
switch (outcfg)
|
||||
{
|
||||
case NRF53_GPIOTE_SET:
|
||||
regval |= GPIOTE_CONFIG_POL_LTH;
|
||||
break;
|
||||
case NRF53_GPIOTE_CLEAR:
|
||||
regval |= GPIOTE_CONFIG_POL_HTL;
|
||||
break;
|
||||
case NRF53_GPIOTE_TOGGLE:
|
||||
regval |= GPIOTE_CONFIG_POL_TG;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Write register */
|
||||
|
||||
nrf53_gpiote_putreg(inst, NRF53_GPIOTE_CONFIG_OFFSET(rchan), regval);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_init
|
||||
*
|
||||
* Description:
|
||||
* Initialize GPIOTE
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int nrf53_gpiote_init(void)
|
||||
{
|
||||
/* Clear LATCH register(s) */
|
||||
|
||||
putreg32(0, NRF53_GPIO_P0_BASE + NRF53_GPIO_LATCH_OFFSET);
|
||||
putreg32(0, NRF53_GPIO_P1_BASE + NRF53_GPIO_LATCH_OFFSET);
|
||||
|
||||
/* Reset GPIOTE data */
|
||||
|
||||
memset(&g_gpiote_ch_callbacks, 0, sizeof(g_gpiote_ch_callbacks));
|
||||
|
||||
#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
|
||||
memset(&g_gpiote_pin_callbacks, 0, sizeof(g_gpiote_pin_callbacks));
|
||||
|
||||
/* Enable PORT event interrupt */
|
||||
|
||||
nrf53_gpiote_putreg(0, NRF53_GPIOTE_INTENSET_OFFSET, GPIOTE_INT_PORT);
|
||||
# ifdef CONFIG_NRF53_HAVE_GPIOTE1
|
||||
nrf53_gpiote_putreg(1, NRF53_GPIOTE_INTENSET_OFFSET, GPIOTE_INT_PORT);
|
||||
# endif
|
||||
#else
|
||||
memset(&g_gpiote_port_callback, 0, sizeof(g_gpiote_port_callback));
|
||||
#endif
|
||||
|
||||
/* Attach GPIOTE interrupt handler */
|
||||
|
||||
irq_attach(NRF53_IRQ_GPIOTE0, nrf53_gpiote_isr, NULL);
|
||||
up_enable_irq(NRF53_IRQ_GPIOTE0);
|
||||
#ifdef CONFIG_NRF53_HAVE_GPIOTE1
|
||||
irq_attach(NRF53_IRQ_GPIOTE1, nrf53_gpiote_isr, NULL);
|
||||
up_enable_irq(NRF53_IRQ_GPIOTE1);
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
172
arch/arm/src/nrf53/nrf53_gpiote.h
Normal file
172
arch/arm/src/nrf53/nrf53_gpiote.h
Normal file
@ -0,0 +1,172 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/nrf53/nrf53_gpiote.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_NRF53_NRF53_GPIOTE_H
|
||||
#define __ARCH_ARM_SRC_NRF53_NRF53_GPIOTE_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/* GPIOTE OUT task configuration */
|
||||
|
||||
enum nrf53_gpiote_outcfg_e
|
||||
{
|
||||
NRF53_GPIOTE_SET = 0,
|
||||
NRF53_GPIOTE_CLEAR = 1,
|
||||
NRF53_GPIOTE_TOGGLE = 2,
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_set_ch_event
|
||||
*
|
||||
* Description:
|
||||
* Configures a GPIOTE channel in EVENT mode, assigns it to a given pin
|
||||
* and sets a handler for the corresponding channel events.
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - channel: GPIOTE channel used to capture events
|
||||
* - risingedge: Enables interrupt on rising edges
|
||||
* - fallingedge: Enables interrupt on falling edges
|
||||
* - func: When non-NULL, generate interrupt
|
||||
* - arg: Argument passed to the interrupt callback
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf53_gpiote_set_ch_event(uint32_t pinset, int channel,
|
||||
bool risingedge, bool fallingedge,
|
||||
xcpt_t func, void *arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_set_event
|
||||
*
|
||||
* Description:
|
||||
* Configures a GPIOTE channel in EVENT mode, assigns it to a given pin
|
||||
* and sets a handler for the first availalbe GPIOTE channel
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - risingedge: Enables interrupt on rising edges
|
||||
* - fallingedge: Enables interrupt on falling edges
|
||||
* - func: When non-NULL, generate interrupt
|
||||
* - arg: Argument passed to the interrupt callback
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure indicating the
|
||||
* nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int nrf53_gpiote_set_event(uint32_t pinset,
|
||||
bool risingedge, bool fallingedge,
|
||||
xcpt_t func, void *arg);
|
||||
|
||||
#ifdef CONFIG_NRF53_PER_PIN_INTERRUPTS
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_set_pin_event
|
||||
*
|
||||
* Description:
|
||||
* Sets/clears a handler for a given pin for the GPIO PORT event. This
|
||||
* will mean edge-sensitive or level-sensitive according to GPIO detect
|
||||
* mode configuration for the port (see nrf53_gpio_detectmode()). Pin
|
||||
* will be sensitive to high/low according to GPIO_SENSE_LOW/HIGH
|
||||
* (set via nrf53_gpio_config()).
|
||||
*
|
||||
* The passed handler will be invoked from the main ISR for the PORT
|
||||
* event and will take care of clearing the LATCH register.
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - func: When non-NULL, generate interrupt
|
||||
* - arg: Argument passed to the interrupt callback
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf53_gpiote_set_pin_event(uint32_t pinset, xcpt_t func, void *arg);
|
||||
#else
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_set_port_event
|
||||
*
|
||||
* Description:
|
||||
* Sets/clears the handler for the GPIO PORT event.
|
||||
*
|
||||
* The passed handler will be invoked from the main ISR for the PORT
|
||||
* event and will take care of clearing the LATCH register.
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: GPIO port will be extracted from this parameter
|
||||
* - func: When non-NULL, generate interrupt
|
||||
* - arg: Argument passed to the interrupt callback
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf53_gpiote_set_port_event(uint32_t pinset, xcpt_t func, void *arg);
|
||||
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpio_set_task
|
||||
*
|
||||
* Description:
|
||||
* Configure GPIO in TASK mode (to be controlled via tasks).
|
||||
* Note that a pin can only be either in TASK or EVENT mode (set by
|
||||
* nrf53_gpiosetevent with event set to true). Also, once set to TASK mode,
|
||||
* pin control is only possible via tasks on the via nrf53_gpio_write and
|
||||
* will automatically set the output mode.
|
||||
* Finally, a given pin should only be assigned to a given channel.
|
||||
*
|
||||
* Input Parameters:
|
||||
* - pinset: gpio pin configuration (only port + pin is important here)
|
||||
* - channel: the GPIOTE channel used to control the given pin
|
||||
* - output_high: set pin initially to output HIGH or LOW.
|
||||
* - outcfg: configure pin behavior one OUT task is triggered
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void nrf53_gpio_set_task(uint32_t pinset, int channel,
|
||||
bool output_high, enum nrf53_gpiote_outcfg_e outcfg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_gpiote_init
|
||||
*
|
||||
* Description:
|
||||
* Initialize GPIOTE
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int nrf53_gpiote_init(void);
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_NRF53_NRF53_GPIOTE_H */
|
||||
Loading…
Reference in New Issue
Block a user