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current_regs should be volatile; add support for nested interrupts; enable interrupts during syscall processing

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3475 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-04-06 23:01:06 +00:00
parent c0e7e4c2ff
commit bd12973b36
55 changed files with 295 additions and 144 deletions
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5
ChangeLog
View File

@ -1653,6 +1653,11 @@
an up_initialize() provide the same kind of capability.
* arch/*/include/*/type.h: On some compilers, char defaults as unsigned.
Explicitly add signed to integer types if signed is what is required.
* arch/*: For all architectures -- Global register state save structure
(usually called current_regs) should be marked volatile; Added general
capability to support nested interrupts (not fully realized for all
architectures).

4
arch/8051/src/up_initialize.c
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@ -1,7 +1,7 @@
/************************************************************************
* up_initialize.c
*
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -61,7 +61,7 @@
* interrupt.
*/
uint8_t g_irqtos;
volatile uint8_t g_irqtos;
/* Registers are saved in the following global array during
* interrupt processing. If a context switch is performed

4
arch/8051/src/up_internal.h
View File

@ -1,7 +1,7 @@
/**************************************************************************
* up_internal.h
*
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -72,7 +72,7 @@
* interrupt.
*/
extern uint8_t g_irqtos;
extern volatile uint8_t g_irqtos;
/* Registers are saved in the following global array during
* interrupt processing. If a context switch is performed

8
arch/8051/src/up_irqtest.c
View File

@ -1,7 +1,7 @@
/************************************************************************
* up_irqtest.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -68,10 +68,10 @@ typedef void (*vector_t)(void);
* Public Variables
************************************************************************/
bool g_irqtest;
uint8_t g_irqtos;
bool g_irqtest;
volatile uint8_t g_irqtos;
uint8_t g_irqregs[REGS_SIZE];
int g_nirqs;
int g_nirqs;
FAR struct xcptcontext *g_irqcontext;
/************************************************************************

14
arch/arm/include/cortexm3/irq.h
View File

@ -156,6 +156,13 @@ struct xcptcontext
#ifndef __ASSEMBLY__
/* Disable IRQs */
static inline void irqdisable(void)
{
__asm__ __volatile__ ("\tcpsid i\n");
}
/* Save the current primask state & disable IRQs */
static inline irqstate_t irqsave(void)
@ -176,6 +183,13 @@ static inline irqstate_t irqsave(void)
return primask;
}
/* Enable IRQs */
static inline void irqenable(void)
{
__asm__ __volatile__ ("\tcpsie i\n");
}
/* Restore saved primask state */
static inline void irqrestore(irqstate_t primask)

16
arch/arm/src/arm/up_dataabort.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_dataabort.c
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -103,13 +103,19 @@
void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
{
FAR _TCB *tcb = (FAR _TCB *)g_readytorun.head;
#ifdef CONFIG_PAGING
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t*)current_regs;
#endif
current_regs = regs;
#ifdef CONFIG_PAGING
/* In the NuttX on-demand paging implementation, only the read-only, .text
* section is paged. However, the ARM compiler generated PC-relative data
* fetches from within the .text sections. Also, it is customary to locate
@ -162,12 +168,16 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
pg_miss();
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
return;
segfault:
#endif
lldbg("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
PANIC(OSERR_ERREXCEPTION);
}

13
arch/arm/src/arm/up_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_doirq.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,8 @@ void up_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC(OSERR_ERREXCEPTION);
#else
uint32_t *savestate;
/* Nested interrupts are not supported in this implementation. If you want
* implemented nested interrupts, you would have to (1) change the way that
* current regs is handled and (2) the design associated with
@ -86,7 +88,7 @@ void up_doirq(int irq, uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
@ -97,9 +99,12 @@ void up_doirq(int irq, uint32_t *regs)
irq_dispatch(irq, regs);
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still disabled) */

14
arch/arm/src/arm/up_prefetchabort.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/src/up_prefetchabort.c
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -89,10 +89,15 @@
void up_prefetchabort(uint32_t *regs)
{
#ifdef CONFIG_PAGING
uint32_t *savestate;
/* Save the saved processor context in current_regs where it can be accessed
* for register dumps and possibly context switching.
*/
savestate = (uint32_t*)current_regs;
#endif
current_regs = regs;
#ifdef CONFIG_PAGING
@ -133,9 +138,12 @@ void up_prefetchabort(uint32_t *regs)
pg_miss();
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
}
else
#endif

4
arch/arm/src/c5471/c5471_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/c5471/c5471_irq.c
*
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -59,7 +59,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

8
arch/arm/src/common/up_internal.h
View File

@ -82,11 +82,11 @@
*/
#ifdef CONFIG_ARCH_CORTEXM3
# define up_savestate(regs) up_copystate(regs, current_regs)
# define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs)
# define up_restorestate(regs) (current_regs = regs)
#else
# define up_savestate(regs) up_copystate(regs, current_regs)
# define up_restorestate(regs) up_copystate(current_regs, regs)
# define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs)
# define up_restorestate(regs) up_copystate((uint32_t*)current_regs, regs)
#endif
/****************************************************************************
@ -107,7 +107,7 @@ typedef void (*up_vector_t)(void);
* interrupt processing.
*/
extern uint32_t *current_regs;
extern volatile uint32_t *current_regs;
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded

15
arch/arm/src/cortexm3/up_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/cortexm3/up_doirq.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,8 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC(OSERR_ERREXCEPTION);
#else
uint32_t *savestate;
/* Nested interrupts are not supported in this implementation. If you want
* implemented nested interrupts, you would have to (1) change the way that
* current regs is handled and (2) the design associated with
@ -86,7 +88,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
@ -103,11 +105,14 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* switch occurred during interrupt processing.
*/
regs = current_regs;
regs = (uint32_t*)current_regs;
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still disabled) */

23
arch/arm/src/cortexm3/up_svcall.c
View File

@ -57,7 +57,20 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#undef SYSCALL_INTERRUPTIBLE
#if defined(CONFIG_NUTTX_KERNEL)
# if CONFIG_ARCH_INTERRUPTSTACK > 3
# warning "CONFIG_ARCH_INTERRUPTSTACK and CONFIG_NUTTX_KERNEL are incompatible"
# warning "options as currently implemented. Interrupts will have to be disabled"
# warning "during SYScall processing to avoid un-handled nested interrupts"
# else
# define SYSCALL_INTERRUPTIBLE 1
# endif
#endif
/* Debug ********************************************************************/
/* Debug output from this file may interfere with context switching! To get
* debug output you must enabled the following in your NuttX configuration:
*
@ -116,6 +129,12 @@ static inline void dispatch_syscall(uint32_t *regs)
int index = cmd - CONFIG_SYS_RESERVED;
/* Enable interrupts while the SYSCALL executes */
#ifdef SYSCALL_INTERRUPTIBLE
irqenable();
#endif
/* Call the correct stub for each SYS call, based on the number of parameters */
svcdbg("Calling stub%d at %p\n", index, g_stubloopkup[index].stub0);
@ -177,6 +196,10 @@ static inline void dispatch_syscall(uint32_t *regs)
cmd, g_stubnparms[index]);
break;
}
#ifdef SYSCALL_INTERRUPTIBLE
irqdisable();
#endif
}
/* Set up the return vaue. First, check if a context switch occurred.

12
arch/arm/src/dm320/dm320_decodeirq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/dm320/dm320_decodeirq.c
* arch/arm/src/chip/dm320_decodeirq.c
*
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -94,6 +94,8 @@ void up_decodeirq(uint32_t* regs)
if ((unsigned)irq < NR_IRQS)
{
uint32_t *savestate;
/* Mask and acknowledge the interrupt */
up_maskack_irq(irq);
@ -102,15 +104,19 @@ void up_decodeirq(uint32_t* regs)
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
irq_dispatch(irq, regs);
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still
* disabled).

2
arch/arm/src/dm320/dm320_irq.c
View File

@ -57,7 +57,7 @@
* Public Data
************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/************************************************************************
* Private Data

11
arch/arm/src/imx/imx_decodeirq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/imx/imx_decodeirq.c
* arch/arm/src/chip/imx_decodeirq.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -78,6 +78,7 @@ void up_decodeirq(uint32_t* regs)
current_regs = regs;
PANIC(OSERR_ERREXCEPTION);
#else
uint32_t* savestate;
uint32_t regval;
int irq;
@ -85,6 +86,7 @@ void up_decodeirq(uint32_t* regs)
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Loop while there are pending interrupts to be processed */
@ -124,8 +126,11 @@ void up_decodeirq(uint32_t* regs)
}
while (irq < NR_IRQS);
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
#endif
}

4
arch/arm/src/imx/imx_irq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/imc/imx_irq.c
* arch/arm/src/chip/imx_irq.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -56,7 +56,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/arm/src/lm3s/lm3s_irq.c
View File

@ -75,7 +75,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -75,7 +75,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

12
arch/arm/src/lpc214x/lpc214x_decodeirq.c
View File

@ -1,7 +1,7 @@
/********************************************************************************
* arch/arm/src/lpc214x/lpc214x_decodeirq.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -145,19 +145,25 @@ static void lpc214x_decodeirq( uint32_t *regs)
if (irq < NR_IRQS)
{
uint32_t *savestate;
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
irq_dispatch(irq, regs);
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
}
#endif
}

4
arch/arm/src/lpc214x/lpc214x_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc214x/lpc214x_irq.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -59,7 +59,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

13
arch/arm/src/lpc2378/lpc23xx_decodeirq.c
View File

@ -6,7 +6,7 @@
*
* This file is part of the NuttX RTOS and based on the lpc2148 port:
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -131,11 +131,13 @@ static void lpc23xx_decodeirq(uint32_t *regs)
if (irq < NR_IRQS) /* redundant check ?? */
{
uint32_t *savestate;
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
@ -146,9 +148,12 @@ static void lpc23xx_decodeirq(uint32_t *regs)
irq_dispatch(irq, regs);
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
}
#endif

2
arch/arm/src/lpc2378/lpc23xx_irq.c
View File

@ -65,7 +65,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

10
arch/arm/src/lpc313x/lpc313x_decodeirq.c
View File

@ -102,6 +102,8 @@ void up_decodeirq(uint32_t *regs)
if ((unsigned)irq < NR_IRQS)
{
uint32_t* savestate;
/* Mask and acknowledge the interrupt */
up_maskack_irq(irq);
@ -110,15 +112,19 @@ void up_decodeirq(uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
irq_dispatch(irq, regs);
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still
* disabled).

4
arch/arm/src/lpc313x/lpc313x_irq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/lpc313x/lpc313x_irq.c
* arch/arm/src/chip/lpc313x_irq.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -64,7 +64,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/arm/src/sam3u/sam3u_irq.c
View File

@ -75,7 +75,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/arm/src/stm32/stm32_irq.c
View File

@ -75,7 +75,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

13
arch/arm/src/str71x/str71x_decodeirq.c
View File

@ -1,7 +1,7 @@
/********************************************************************************
* arch/arm/src/str71x/str71x_decodeirq.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -108,11 +108,13 @@ void up_decodeirq(uint32_t *regs)
if (irq < NR_IRQS)
{
uint32_t* savestate;
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
@ -123,9 +125,12 @@ void up_decodeirq(uint32_t *regs)
irq_dispatch(irq, regs);
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still disabled) */

4
arch/arm/src/str71x/str71x_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/st71x/st71x_irq.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -58,7 +58,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

4
arch/avr/src/at32uc3/at32uc3_irq.c
View File

@ -2,7 +2,7 @@
* arch/avr/src/at32uc3_/at32uc3_irq.c
* arch/avr/src/chip/at32uc3_irq.c
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -83,7 +83,7 @@ extern uint32_t avr32_int3;
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Types

13
arch/avr/src/avr32/up_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/avr32/up_doirq.c
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,8 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC(OSERR_ERREXCEPTION);
#else
uint32_t *savestate;
/* Nested interrupts are not supported in this implementation. If you want
* implemented nested interrupts, you would have to (1) change the way that
* current regs is handled and (2) the design associated with
@ -86,7 +88,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
@ -101,9 +103,12 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
regs = current_regs;
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
#endif
up_ledoff(LED_INIRQ);
return regs;

6
arch/avr/src/common/up_internal.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/common/up_internal.h
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -70,7 +70,7 @@
* state from the TCB.
*/
#define up_savestate(regs) up_copystate(regs, current_regs)
#define up_savestate(regs) up_copystate(regs, (uint32_t*)current_regs)
#define up_restorestate(regs) (current_regs = regs)
/****************************************************************************
@ -91,7 +91,7 @@ typedef void (*up_vector_t)(void);
* interrupt processing.
*/
extern uint32_t *current_regs;
extern volatile uint32_t *current_regs;
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded

11
arch/hc/src/common/up_doirq.c
View File

@ -76,6 +76,8 @@ uint8_t *up_doirq(int irq, uint8_t *regs)
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC(OSERR_ERREXCEPTION);
#else
uint8_t *savestate;
/* Nested interrupts are not supported in this implementation. If you want
* implemented nested interrupts, you would have to (1) change the way that
* current regs is handled and (2) the design associated with
@ -86,7 +88,7 @@ uint8_t *up_doirq(int irq, uint8_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint8_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
@ -101,9 +103,12 @@ uint8_t *up_doirq(int irq, uint8_t *regs)
regs = current_regs;
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
#endif
up_ledoff(LED_INIRQ);
return regs;

2
arch/hc/src/common/up_internal.h
View File

@ -81,7 +81,7 @@
* a referenced is passed to get the state from the TCB.
*/
#define up_savestate(regs) up_copystate(regs, current_regs)
#define up_savestate(regs) up_copystate(regs, (uint8_t*)current_regs)
#define up_restorestate(regs) (current_regs = regs)
/****************************************************************************

2
arch/hc/src/m9s12/m9s12_irq.c
View File

@ -60,7 +60,7 @@
* Public Data
****************************************************************************/
uint8_t *current_regs;
volatile uint8_t *current_regs;
/****************************************************************************
* Private Data

12
arch/sh/src/common/up_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/common/up_doirq.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -77,11 +77,14 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
#else
if ((unsigned)irq < NR_IRQS)
{
uint32_t *savestate;
/* Current regs non-zero indicates that we are processing
* an interrupt; current_regs is also used to manage
* interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt (if supported by the chip) */
@ -100,9 +103,12 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
regs = current_regs;
/* Indicate that we are no longer in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still
* disabled.

2
arch/sh/src/common/up_internal.h
View File

@ -98,7 +98,7 @@ typedef void (*up_vector_t)(void);
* interrupt processing.
*/
extern uint32_t *current_regs;
extern volatile uint32_t *current_regs;
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded

2
arch/sh/src/common/up_reprioritizertr.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/common/up_reprioritizertr.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without

4
arch/sh/src/m16c/m16c_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/m16c/m16c_irq.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -57,7 +57,7 @@
* structure. If is non-NULL only during interrupt processing.
*/
uint32_t *current_regs; /* Actually a pointer to the beginning of a uint8_t array */
volatile uint32_t *current_regs; /* Actually a pointer to the beginning of a uint8_t array */
/****************************************************************************
* Private Data

4
arch/sh/src/sh1/sh1_dumpstate.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/sh1/sh1_assert.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -113,7 +113,7 @@ static void sh1_stackdump(uint32_t sp, uint32_t stack_base)
static inline void sh1_registerdump(void)
{
uint32_t *ptr = current_regs;
uint32_t *ptr = (uint32_t*)current_regs;
/* Are user registers available from interrupt processing? */

4
arch/sh/src/sh1/sh1_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/sh1/sh1_irq.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -57,7 +57,7 @@
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/x86/src/common/up_assert.c
View File

@ -198,7 +198,7 @@ static void up_dumpstate(void)
if (current_regs != NULL)
{
up_registerdump(current_regs);
up_registerdump((uint32_t*)current_regs);
}
}
#else

2
arch/x86/src/common/up_internal.h
View File

@ -99,7 +99,7 @@ typedef void (*up_vector_t)(void);
* structure. If is non-NULL only during interrupt processing.
*/
extern uint32_t *current_regs;
extern volatile uint32_t *current_regs;
/* This is the beginning of heap as provided from up_head.S. This is the first
* address in DRAM after the loaded program+bss+idle stack. The end of the

2
arch/x86/src/i486/up_irq.c
View File

@ -72,7 +72,7 @@ static inline void up_idtinit(void);
* Public Data
****************************************************************************/
uint32_t *current_regs;
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data

2
arch/x86/src/i486/up_savestate.c
View File

@ -80,7 +80,7 @@ void up_savestate(uint32_t *regs)
/* First, just copy all of the registers */
up_copystate(regs, current_regs);
up_copystate(regs, (uint32_t*)current_regs);
/* The RES_SP and REG_SS values will not be saved by the interrupt handling
* logic if there is no change in privilege level. In that case, we will

13
arch/x86/src/qemu/qemu_handlers.c
View File

@ -86,6 +86,8 @@ static void idt_outb(uint8_t val, uint16_t addr)
#ifndef CONFIG_SUPPRESS_INTERRUPTS
static uint32_t *common_handler(int irq, uint32_t *regs)
{
uint32_t *savestate;
up_ledon(LED_INIRQ);
/* Nested interrupts are not supported in this implementation. If you want
@ -98,7 +100,7 @@ static uint32_t *common_handler(int irq, uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
DEBUGASSERT(current_regs == NULL);
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Deliver the IRQ */
@ -111,11 +113,14 @@ static uint32_t *common_handler(int irq, uint32_t *regs)
* switch occurred during interrupt processing.
*/
regs = current_regs;
regs = (uint32_t*)current_regs;
/* Indicate that we are no long in an interrupt handler */
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
current_regs = NULL;
current_regs = savestate;
return regs;
}
#endif

40
arch/z16/src/common/up_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* common/up_doirq.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -88,31 +88,37 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs)
#else
if ((unsigned)irq < NR_IRQS)
{
/* Current regs non-zero indicates that we are processing
* an interrupt; current_regs is also used to manage
* interrupt level context switches.
*/
FAR chipreg_t *savestate;
current_regs = regs;
/* Current regs non-zero indicates that we are processing
* an interrupt; current_regs is also used to manage
* interrupt level context switches.
*/
/* Mask and acknowledge the interrupt */
savestate = (uint32_t*)current_regs;
current_regs = regs;
up_maskack_irq(irq);
/* Mask and acknowledge the interrupt */
/* Deliver the IRQ */
up_maskack_irq(irq);
irq_dispatch(irq, regs);
/* Deliver the IRQ */
/* Indicate that we are no long in an interrupt handler */
irq_dispatch(irq, regs);
ret = current_regs;
current_regs = NULL;
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we
* are returning from a nested interrupt.
*/
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
ret = current_regs;
current_regs = savestate;
up_enable_irq(irq);
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
up_enable_irq(irq);
}
up_ledoff(LED_INIRQ);
#endif

4
arch/z16/src/common/up_initialize.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* common/up_initialize.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -68,7 +68,7 @@
* interrupt processing.
*/
FAR chipreg_t *current_regs;
volatile FAR chipreg_t *current_regs;
/****************************************************************************
* Private Types

6
arch/z16/src/common/up_internal.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* common/up_internal.h
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -74,7 +74,7 @@
/* Macros for portability */
#define IN_INTERRUPT (current_regs != NULL)
#define SAVE_IRQCONTEXT(tcb) up_copystate((tcb)->xcp.regs, current_regs)
#define SAVE_IRQCONTEXT(tcb) up_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs)
#define SET_IRQCONTEXT(tcb) do { current_regs = (tcb)->xcp.regs; } while (0)
#define SAVE_USERCONTEXT(tcb) up_saveusercontext((tcb)->xcp.regs)
#define RESTORE_USERCONTEXT(tcb) up_restoreusercontext((tcb)->xcp.regs)
@ -98,7 +98,7 @@ typedef void (*up_vector_t)(void);
* interrupt processing.
*/
extern FAR chipreg_t *current_regs;
extern voltile FAR chipreg_t *current_regs;
#endif
/****************************************************************************

2
arch/z80/src/common/up_doirq.c
View File

@ -84,6 +84,8 @@ FAR chipreg_t *up_doirq(uint8_t irq, FAR chipreg_t *regs)
#else
if (irq < NR_IRQS)
{
FAR chipreg_t *savestate;
/* Indicate that we have entered IRQ processing logic */
IRQ_ENTER(irq, regs);

2
arch/z80/src/ez80/ez80_irq.c
View File

@ -57,7 +57,7 @@
* structure. If is non-NULL only during interrupt processing.
*/
chipreg_t *current_regs;
volatile chipreg_t *current_regs;
/****************************************************************************
* Private Data

26
arch/z80/src/ez80/switch.h
View File

@ -2,7 +2,7 @@
* arch/z80/src/ez80/switch.h
* arch/z80/src/chip/switch.h
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -61,7 +61,7 @@
#define INIT_IRQCONTEXT() current_regs = NULL
/* IN_INTERRUPT returns true if the system is current operating in the interrupt
/* IN_INTERRUPT returns true if the system is currently operating in the interrupt
* context. IN_INTERRUPT is the inline equivalent of up_interrupt_context().
*/
@ -69,11 +69,15 @@
/* The following macro is used when the system enters interrupt handling logic */
#define IRQ_ENTER(irq, regs) current_regs = (regs)
#define IRQ_ENTER(irq, regs) \
do { \
savestate = (FAR chipreg_t *)current_regs; \
current_regs = (regs); \
} while (0)
/* The following macro is used when the system exits interrupt handling logic */
#define IRQ_LEAVE(irq) current_regs = NULL
#define IRQ_LEAVE(irq) current_regs = savestate
/* The following macro is used to sample the interrupt state (as a opaque handle) */
@ -81,11 +85,11 @@
/* Save the current IRQ context in the specified TCB */
#define SAVE_IRQCONTEXT(tcb) ez80_copystate((tcb)->xcp.regs, current_regs)
#define SAVE_IRQCONTEXT(tcb) ez80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs)
/* Set the current IRQ context to the state specified in the TCB */
#define SET_IRQCONTEXT(tcb) ez80_copystate(current_regs, (tcb)->xcp.regs)
#define SET_IRQCONTEXT(tcb) ez80_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs)
/* Save the user context in the specified TCB. User context saves can be simpler
* because only those registers normally saved in a C called need be stored.
@ -116,7 +120,7 @@
* If is non-NULL only during interrupt processing.
*/
extern chipreg_t *current_regs;
extern volatile chipreg_t *current_regs;
#endif
/************************************************************************************
@ -133,19 +137,19 @@ extern "C" {
/* Defined in ez80_copystate.c */
EXTERN void ez80_copystate(chipreg_t *dest, const chipreg_t *src);
EXTERN void ez80_copystate(FAR chipreg_t *dest, FAR const chipreg_t *src);
/* Defined in ez80_saveusercontext.asm */
EXTERN int ez80_saveusercontext(chipreg_t *regs);
EXTERN int ez80_saveusercontext(FAR chipreg_t *regs);
/* Defined in ez80_restorecontext.asm */
EXTERN void ez80_restorecontext(chipreg_t *regs);
EXTERN void ez80_restorecontext(FAR chipreg_t *regs);
/* Defined in ez80_sigsetup.c */
EXTERN void ez80_sigsetup(_TCB *tcb, sig_deliver_t sigdeliver, chipreg_t *regs);
EXTERN void ez80_sigsetup(FAR _TCB *tcb, sig_deliver_t sigdeliver, chipreg_t *regs);
/* Defined in ez80_registerdump.c */

14
arch/z80/src/z8/switch.h
View File

@ -2,7 +2,7 @@
* arch/z80/src/z8/switch.h
* arch/z80/src/chip/switch.h
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -105,7 +105,7 @@
g_z8irqstate.state = Z8_IRQSTATE_NONE; \
} while (0)
/* IN_INTERRUPT returns true if the system is current operating in the interrupt
/* IN_INTERRUPT returns true if the system is currently operating in the interrupt
* context. IN_INTERRUPT is the inline equivalent of up_interrupt_context().
*/
@ -114,8 +114,15 @@
/* The following macro is used when the system enters interrupt handling logic */
#define IRQ_SAVE(irq, regs) savestate = (FAR chipreg_t *)current_regs;
#define IRQ_ENTER(irq, regs) current_regs = (regs)
/* The following macro is used when the system exits interrupt handling logic */
#define IRQ_ENTER(irq, regs) \
do { \
savestate.state = g_z8irqstate.state; \
savestate.regs = g_z8irqstate.regs; \
g_z8irqstate.state = Z8_IRQSTATE_ENTRY; \
g_z8irqstate.regs = (regs); \
up_maskack_irq(irq); \
@ -125,7 +132,8 @@
#define IRQ_LEAVE(irq) \
do { \
g_z8irqstate.state = Z8_IRQSTATE_NONE; \
g_z8irqstate.state = savestate.state; \
g_z8irqstate.regs = savestate.regs; \
up_enable_irq(irq); \
} while (0)

25
arch/z80/src/z80/switch.h
View File

@ -2,7 +2,7 @@
* arch/z80/src/z80/switch.h
* arch/z80/src/chip/switch.h
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -68,11 +68,15 @@
/* The following macro is used when the system enters interrupt handling logic */
#define IRQ_ENTER(irq, regs) current_regs = (regs)
#define IRQ_ENTER(irq, regs) \
do { \
savestate = (FAR chipreg_t *)current_regs; \
current_regs = (regs); \
} while (0)
/* The following macro is used when the system exits interrupt handling logic */
#define IRQ_LEAVE(irq) current_regs = NULL
#define IRQ_LEAVE(irq) current_regs = savestate
/* The following macro is used to sample the interrupt state (as a opaque handle) */
@ -80,11 +84,11 @@
/* Save the current IRQ context in the specified TCB */
#define SAVE_IRQCONTEXT(tcb) z80_copystate((tcb)->xcp.regs, current_regs)
#define SAVE_IRQCONTEXT(tcb) z80_copystate((tcb)->xcp.regs, (FAR chipreg_t*)current_regs)
/* Set the current IRQ context to the state specified in the TCB */
#define SET_IRQCONTEXT(tcb) z80_copystate(current_regs, (tcb)->xcp.regs)
#define SET_IRQCONTEXT(tcb) z80_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs)
/* Save the user context in the specified TCB. User context saves can be simpler
* because only those registers normally saved in a C called need be stored.
@ -102,17 +106,20 @@
#define _REGISTER_DUMP() z80_registerdump()
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Variables
************************************************************************************/
#ifndef __ASSEMBLY__
/* This holds a references to the current interrupt level
* register storage structure. If is non-NULL only during
* interrupt processing.
/* This holds a references to the current interrupt level register storage structure.
* If is non-NULL only during interrupt processing.
*/
extern chipreg_t *current_regs;
extern volatile chipreg_t *current_regs;
#endif
/************************************************************************************

4
arch/z80/src/z80/z80_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/z80/src/z80/z80_irq.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -56,7 +56,7 @@
* structure. If is non-NULL only during interrupt processing.
*/
chipreg_t *current_regs;
volatile chipreg_t *current_regs;
/****************************************************************************
* Private Data

2
configs/ntosd-dm320/thttpd/appconfig
View File

@ -37,8 +37,8 @@
CONFIGURED_APPS += examples/thttpd
# Networking support
CONFIGURED_APPS += netutils/uiplib
CONFIGURED_APPS += netutils/thttpd