arch/x86_64: add support for FMA, AVX-2 and AVX-512
add support for FMA, AVX-2 and AVX-512 instruction sets for x86_64 Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit is contained in:
p-szafonimateusz
Xiang Xiao
parent
2192d83200
commit
bd73a915bd
@ -30,6 +30,9 @@ config ARCH_INTEL64
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select ARCH_HAVE_SSE41
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select ARCH_HAVE_SSE42
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select ARCH_HAVE_SSE4A
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select ARCH_HAVE_FMA if ARCH_X86_64_HAVE_XSAVE
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select ARCH_HAVE_AVX if ARCH_X86_64_HAVE_XSAVE
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select ARCH_HAVE_AVX512 if ARCH_X86_64_HAVE_XSAVE
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select ARCH_ICACHE
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select ARCH_DCACHE
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select ARCH_HAVE_IRQTRIGGER
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@ -78,6 +81,10 @@ config ARCH_HAVE_SSE4A
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bool
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default n
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config ARCH_HAVE_FMA
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bool
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default n
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config ARCH_HAVE_AVX
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bool
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default n
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@ -165,12 +165,14 @@
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#define X86_64_CPUID_CAP 0x01
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# define X86_64_CPUID_01_SSE3 (1 << 0)
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# define X86_64_CPUID_01_SSSE3 (1 << 9)
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# define X86_64_CPUID_01_FMA (1 << 12)
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# define X86_64_CPUID_01_PCID (1 << 17)
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# define X86_64_CPUID_01_SSE41 (1 << 19)
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# define X86_64_CPUID_01_SSE42 (1 << 20)
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# define X86_64_CPUID_01_X2APIC (1 << 21)
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# define X86_64_CPUID_01_TSCDEA (1 << 24)
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# define X86_64_CPUID_01_XSAVE (1 << 26)
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# define X86_64_CPUID_01_AVX (1 << 28)
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# define X86_64_CPUID_01_RDRAND (1 << 30)
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# define X86_64_CPUID_01_APICID(ebx) ((ebx) >> 24)
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#define X86_64_CPUID_EXTCAP 0x07
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@ -143,3 +143,43 @@ endif()
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if(CONFIG_ARCH_X86_64_SSE4A)
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add_compile_options(-msse4a)
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endif()
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if(CONFIG_ARCH_X86_64_AVX)
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add_compile_options(-mavx)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512)
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add_compile_options(-mavx512f)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512PF)
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add_compile_options(-mavx512pf)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512ER)
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add_compile_options(-mavx512er)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512CD)
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add_compile_options(-mavx512cd)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512VL)
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add_compile_options(-mavx512vl)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512BW)
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add_compile_options(-mavx512bw)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512DQ)
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add_compile_options(-mavx512dq)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512IFMA)
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add_compile_options(-mavx512ifma)
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endif()
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if(CONFIG_ARCH_X86_64_AVX512VBMI)
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add_compile_options(-mavx512vbmi)
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endif()
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@ -75,6 +75,11 @@ config ARCH_X86_64_SSE4A
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depends on ARCH_HAVE_SSE4A
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default n
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config ARCH_X86_64_FMA
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bool "FMA support"
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depends on ARCH_HAVE_FMA && ARCH_X86_64_AVX
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default n
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config ARCH_X86_64_AVX
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bool "AVX support"
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depends on ARCH_HAVE_AVX
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@ -85,4 +90,40 @@ config ARCH_X86_64_AVX512
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depends on ARCH_HAVE_AVX512
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default n
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if ARCH_X86_64_AVX512
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config ARCH_X86_64_AVX512PF
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bool "AVX512 Prefetch Instructions (AVX512PF)"
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default n
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config ARCH_X86_64_AVX512ER
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bool "AVX512 Exponential and Reciprocal Instructions (AVX512ER)"
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default n
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config ARCH_X86_64_AVX512CD
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bool "AVX512 Conflict Detection Instructions (AVX512CD)"
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default n
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config ARCH_X86_64_AVX512VL
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bool "AVX512 Vector Length Extensions (AVX512VL)"
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default n
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config ARCH_X86_64_AVX512BW
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bool "AVX512 Byte and Word Instructions (AVX512BW)"
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default n
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config ARCH_X86_64_AVX512DQ
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bool "AVX512 Doubleword and Quadword Instructions (AVX512DQ)"
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default n
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config ARCH_X86_64_AVX512IFMA
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bool "AVX512 Integer Fused Multiply-Add Instructions (AVX512IFMA)"
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default n
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config ARCH_X86_64_AVX512VBMI
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bool "AVX512 Vector Bit Manipulation Instructions (AVX512VBMI)"
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default n
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endif # ARCH_X86_64_AVX512
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endif
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@ -56,16 +56,6 @@ NM = $(CROSSDEV)nm
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OBJCOPY = $(CROSSDEV)objcopy
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OBJDUMP = $(CROSSDEV)objdump
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CFLAGS := $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
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CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
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AFLAGS := $(CFLAGS) -D__ASSEMBLY__
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ifeq ($(CONFIG_HOST_MACOS),y)
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AFLAGS += -Wa,--divide
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endif
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EXEEXT = .elf
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ifeq ($(CONFIG_ARCH_X86_64_SSE3),y)
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ARCHCPUFLAGS += -msse3
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endif
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@ -75,13 +65,67 @@ ifeq ($(CONFIG_ARCH_X86_64_SSSE3),y)
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endif
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ifeq ($(CONFIG_ARCH_X86_64_SSE41),y)
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ARCHCPUFLAGS += -msse41
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ARCHCPUFLAGS += -msse4.1
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endif
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ifeq ($(CONFIG_ARCH_X86_64_SSE42),y)
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ARCHCPUFLAGS += -msse42
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ARCHCPUFLAGS += -msse4.2
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endif
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ifeq ($(CONFIG_ARCH_X86_64_SSE4a),y)
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ifeq ($(CONFIG_ARCH_X86_64_SSE4A),y)
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ARCHCPUFLAGS += -msse4a
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endif
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ifeq ($(CONFIG_ARCH_X86_64_FMA),y)
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ARCHCPUFLAGS += -mfma
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX),y)
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ARCHCPUFLAGS += -mavx
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512),y)
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ARCHCPUFLAGS += -mavx512f
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512PF),y)
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ARCHCPUFLAGS += -mavx512pf
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512ER),y)
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ARCHCPUFLAGS += -mavx512er
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512CD),y)
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ARCHCPUFLAGS += -mavx512cd
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512VL),y)
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ARCHCPUFLAGS += -mavx512vl
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512BW),y)
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ARCHCPUFLAGS += -mavx512bw
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512DQ),y)
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ARCHCPUFLAGS += -mavx512dq
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512IFMA),y)
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ARCHCPUFLAGS += -mavx512ifma
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endif
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ifeq ($(CONFIG_ARCH_X86_64_AVX512VBMI),y)
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ARCHCPUFLAGS += -mavx512vbmi
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endif
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CFLAGS := $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
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CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
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AFLAGS := $(CFLAGS) -D__ASSEMBLY__
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ifeq ($(CONFIG_HOST_MACOS),y)
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AFLAGS += -Wa,--divide
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endif
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EXEEXT = .elf
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@ -58,9 +58,47 @@ void x86_64_check_and_enable_capability(void)
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{
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unsigned long ebx;
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unsigned long ecx;
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unsigned long require;
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unsigned long require = 0;
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require = X86_64_CPUID_01_X2APIC;
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/* Check SSE3 instructions availability */
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#ifdef CONFIG_ARCH_X86_64_SSE3
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require |= X86_64_CPUID_01_SSE3;
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#endif
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/* Check Suplement SSE3 instructions availability */
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#ifdef CONFIG_ARCH_X86_64_SSEE3
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require |= X86_64_CPUID_01_SSEE3;
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#endif
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/* Check Fused multiply-add (FMA) instructions availability */
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#ifdef CONFIG_ARCH_X86_64_FMA
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require |= X86_64_CPUID_01_FMA;
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#endif
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/* Check process context identifiers availability */
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#ifdef CONFIG_ARCH_INTEL64_HAVE_PCID
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require |= X86_64_CPUID_01_PCID;
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#endif
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/* Check SSE4.1 instructions availability */
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#ifdef CONFIG_ARCH_X86_64_SSE41
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require |= X86_64_CPUID_01_SSE41;
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#endif
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/* Check SSE4.2 instructions availability */
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#ifdef CONFIG_ARCH_X86_64_SSE42
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require |= X86_64_CPUID_01_SSE42;
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#endif
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/* Check x2APIC availability */
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require |= X86_64_CPUID_01_X2APIC;
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/* Check timer availability */
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@ -68,16 +106,22 @@ void x86_64_check_and_enable_capability(void)
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require |= X86_64_CPUID_01_TSCDEA;
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#endif
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#ifdef CONFIG_ARCH_INTEL64_HAVE_XSAVE
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/* Check XSAVE/XRSTOR availability */
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#ifdef CONFIG_ARCH_X86_64_HAVE_XSAVE
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require |= X86_64_CPUID_01_XSAVE;
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#endif
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#ifdef CONFIG_ARCH_INTEL64_HAVE_RDRAND
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require |= X86_64_CPUID_01_RDRAND;
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/* Check AVX instructions availability */
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#ifdef CONFIG_ARCH_X86_64_AVX
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require |= X86_64_CPUID_01_AVX;
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#endif
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#ifdef CONFIG_ARCH_INTEL64_HAVE_PCID
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require |= X86_64_CPUID_01_PCID;
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/* Check RDRAND feature availability */
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#ifdef CONFIG_ARCH_INTEL64_HAVE_RDRAND
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require |= X86_64_CPUID_01_RDRAND;
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#endif
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asm volatile("cpuid" : "=c" (ecx) : "a" (X86_64_CPUID_CAP)
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@ -94,6 +138,14 @@ void x86_64_check_and_enable_capability(void)
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require = 0;
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/* Check AVX512 Foundation instructions availability */
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#ifdef CONFIG_ARCH_X86_64_AVX512
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require |= X86_64_CPUID_07_AVX512F;
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#endif
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/* Check CLWB instruction availability */
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#ifdef CONFIG_ARCH_INTEL64_HAVE_CLWB
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require |= X86_64_CPUID_07_CLWB;
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#endif
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