stm32_hrtim: structures for deadtime and chopper, cosmetics
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@ -108,7 +108,7 @@
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#define STM32_HRTIM_CMN_ICR_OFFSET 0x000C /* HRTIM Interrupt Clear Register */
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#define STM32_HRTIM_CMN_IER_OFFSET 0x0010 /* HRTIM Interrupt Enable Register */
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#define STM32_HRTIM_CMN_OENR_OFFSET 0x0014 /* HRTIM Output Enable Register */
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#define STM32_HRTIM_CMN_DISR_OFFSET 0x0018 /* HRTIM Output Disable Register */
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#define STM32_HRTIM_CMN_ODISR_OFFSET 0x0018 /* HRTIM Output Disable Register */
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#define STM32_HRTIM_CMN_ODSR_OFFSET 0x001C /* HRTIM Output Disable Status Register */
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#define STM32_HRTIM_CMN_BMCR_OFFSET 0x0020 /* HRTIM Burst Mode Control Register */
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#define STM32_HRTIM_CMN_BMTRGR_OFFSET 0x0024 /* HRTIM Burst Mode Trigger Register */
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@ -61,6 +61,10 @@
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# error HRTIM ADC Triggering not supported yet
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#endif
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#ifdef CONFIG_STM32_HRTIM_DAC
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# error HRTIM DAC Triggering not supported yet
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#endif
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#ifdef CONFIG_STM32_HRTIM_FAULT
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# error HRTIM Faults not supported yet
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#endif
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@ -181,7 +185,10 @@ struct stm32_hrtim_timout_s
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#ifdef HRTIM_HAVE_CHOPPER
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struct stm32_hrtim_chopper_s
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{
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uint32_t reserved; /* reserved for future use */
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uint16_t start:4; /* Chopper start pulsewidth */
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uint16_t duty:3; /* Chopper duty cycle */
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uint16_t freq:4; /* Chopper carrier frequency value */
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uint16_t _res:5; /* Reserved */
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};
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#endif
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@ -190,7 +197,10 @@ struct stm32_hrtim_chopper_s
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#ifdef HRTIM_HAVE_DEADTIME
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struct stm32_hrtim_deadtime_s
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{
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uint32_t reserved; /* reserved for future use */
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uint8_t falling_lock:2; /* Deadtime falling value and sign lock */
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uint8_t rising_lock:2; /* Deadtime rising value and sign lock */
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uint8_t prescaler:3; /* Deadtime Prescaler */
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uint8_t _res:1; /* Reserved */
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};
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#endif
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@ -447,7 +457,6 @@ static uint16_t hrtim_per_get(FAR struct stm32_hrtim_s *priv, uint8_t timer);
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static uint16_t hrtim_cmp_get(FAR struct stm32_hrtim_s *priv, uint8_t timer,
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uint8_t index);
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/* Initialization */
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static int stm32_hrtimconfig(FAR struct stm32_hrtim_s *priv);
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@ -508,13 +517,17 @@ static struct stm32_hrtim_slave_priv_s g_tima_priv =
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#ifdef CONFIG_STM32_HRTIM_TIMA_CHOP
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.chp =
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{
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.reserved = 0
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.start_pulse = HRTIM_TIMA_CHOP_START,
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.duty = HRTIM_TIMA_CHOP_DUTY,
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.freq = HRTIM_TIMA_CHOP_FREQ
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},
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#endif
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#ifdef CONFIG_STM32_HRTIM_TIMA_DT
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.dt =
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{
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.reserved = 0
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.falling_lock = HRTIM_TIMA_DT_FLOCK,
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.rising_lock = HRTIM_TIMA_DT_RLOCK,
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.prescaler = HRTIM_TIMA_DT_PRESCALER,
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}
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#endif
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},
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@ -590,6 +603,7 @@ static struct stm32_hrtim_s g_hrtim1priv =
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struct hrtim_dev_s g_hrtim1dev =
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{
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.hd_priv = &g_hrtim1priv,
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.initialized = false,
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};
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/****************************************************************************
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@ -1723,7 +1737,7 @@ static void hrtim_preload_config(FAR struct stm32_hrtim_s *priv)
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*
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* Input parameters:
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* priv - A reference to the HRTIM block
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* timer - HRTIM Timer timer
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* timer - HRTIM Timer index
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* index - Compare register timer
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* cmp - New compare register value
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*
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@ -1781,7 +1795,7 @@ errout:
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*
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* Input parameters:
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* priv - A reference to the HRTIM block
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* timer - HRTIM Timer timer
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* timer - HRTIM Timer index
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* per - New period register value
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*
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* Returned Value:
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@ -1805,7 +1819,7 @@ static int hrtim_per_update(FAR struct stm32_hrtim_s *priv, uint8_t timer,
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*
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* Input parameters:
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* priv - A reference to the HRTIM block
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* timer - HRTIM Timer timer
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* timer - HRTIM Timer index
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure
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@ -1825,7 +1839,7 @@ static uint16_t hrtim_per_get(FAR struct stm32_hrtim_s *priv, uint8_t timer)
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*
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* Input parameters:
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* priv - A reference to the HRTIM block
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* timer - HRTIM Timer timer
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* timer - HRTIM Timer index
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* index - Compare register timer
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*
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* Returned Value:
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@ -2073,12 +2087,19 @@ FAR struct hrtim_dev_s* stm32_hrtiminitialize(void)
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hrtim = dev->hd_priv;
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ret = stm32_hrtimconfig(hrtim);
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if (ret < 0)
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/* configure HRTIM only once */
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if (dev->initialized)
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{
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tmrerr("ERROR: Failed to initialize HRTIM1: %d\n", ret);
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errno = -ret;
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return NULL;
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ret = stm32_hrtimconfig(hrtim);
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if (ret < 0)
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{
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tmrerr("ERROR: Failed to initialize HRTIM1: %d\n", ret);
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errno = -ret;
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return NULL;
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}
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dev->initialized = true;
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}
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return dev;
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@ -268,6 +268,89 @@ enum stm32_outputs_e
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HRTIM_OUT_TIME_CH2 = (1 << 9),
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};
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/* DAC synchronization event */
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enum stm32_hrtim_dacsync_e
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{
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HRTIM_DACSYNC_DIS,
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HRTIM_DACSYNC_1,
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HRTIM_DACSYNC_2,
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HRTIM_DACSYNC_3,
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};
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/* HRTIM Deadtime Locks */
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enum stm32_deadtime_lock_e
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{
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HRTIM_DT_VALUE_LOCK = (1 << 0), /* Lock Deadtime value */
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HRTIM_DT_SIGN_LOCK = (1 << 1) /* Lock Deadtime sign */
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};
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/* HRTIM Deadtime types */
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enum stm32_deadtime_edge_e
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{
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HRTIM_DT_RISING = 0,
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HRTIM_DT_FALLING = 1
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};
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/* Chopper start pulsewidth */
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enum stm32_chopper_start_e
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{
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HRTIM_CHP_START_16,
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HRTIM_CHP_START_32,
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HRTIM_CHP_START_48,
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HRTIM_CHP_START_64,
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HRTIM_CHP_START_80,
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HRTIM_CHP_START_96,
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HRTIM_CHP_START_112,
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HRTIM_CHP_START_128,
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HRTIM_CHP_START_144,
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HRTIM_CHP_START_160,
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HRTIM_CHP_START_176,
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HRTIM_CHP_START_192,
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HRTIM_CHP_START_208,
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HRTIM_CHP_START_224,
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HRTIM_CHP_START_256
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};
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/* Chopper duty cycle */
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enum stm32_chopper_duty_e
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{
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HRTIM_CHP_DUTY_0,
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HRTIM_CHP_DUTY_1,
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HRTIM_CHP_DUTY_2,
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HRTIM_CHP_DUTY_3,
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HRTIM_CHP_DUTY_4,
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HRTIM_CHP_DUTY_5,
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HRTIM_CHP_DUTY_6,
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HRTIM_CHP_DUTY_7 ,
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};
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/* Chopper carrier frequency */
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enum stm32_chopper_freq_e
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{
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HRTIM_CHP_FREQ_d16,
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HRTIM_CHP_FREQ_d32,
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HRTIM_CHP_FREQ_d48,
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HRTIM_CHP_FREQ_d64,
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HRTIM_CHP_FREQ_d80,
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HRTIM_CHP_FREQ_d96,
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HRTIM_CHP_FREQ_d112,
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HRTIM_CHP_FREQ_d128,
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HRTIM_CHP_FREQ_d144,
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HRTIM_CHP_FREQ_d160,
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HRTIM_CHP_FREQ_d176,
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HRTIM_CHP_FREQ_d192,
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HRTIM_CHP_FREQ_d208,
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HRTIM_CHP_FREQ_d224,
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HRTIM_CHP_FREQ_d240,
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HRTIM_CHP_FREQ_d256
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};
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/* */
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struct hrtim_dev_s
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@ -275,13 +358,14 @@ struct hrtim_dev_s
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#ifdef CONFIG_HRTIM
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/* Fields managed by common upper half HRTIM logic */
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uint8_t hd_ocount; /* The number of times the device has been opened */
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sem_t hd_closesem; /* Locks out new opens while close is in progress */
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uint8_t hd_ocount; /* The number of times the device has been opened */
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sem_t hd_closesem; /* Locks out new opens while close is in progress */
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#endif
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/* Fields provided by lower half HRTIM logic */
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FAR void *hd_priv; /* Used by the arch-specific logic */
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FAR void *hd_priv; /* Used by the arch-specific logic */
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bool initialized; /* true: HRTIM driver has been initialized */
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};
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/************************************************************************************
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