stm32_hrtim: structures for deadtime and chopper, cosmetics

arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h

@@ -108,7 +108,7 @@
 #define STM32_HRTIM_CMN_ICR_OFFSET      0x000C /* HRTIM Interrupt Clear Register */
 #define STM32_HRTIM_CMN_IER_OFFSET      0x0010 /* HRTIM Interrupt Enable Register */
 #define STM32_HRTIM_CMN_OENR_OFFSET     0x0014 /* HRTIM Output Enable Register */
-#define STM32_HRTIM_CMN_DISR_OFFSET     0x0018 /* HRTIM Output Disable Register */
+#define STM32_HRTIM_CMN_ODISR_OFFSET    0x0018 /* HRTIM Output Disable Register */
 #define STM32_HRTIM_CMN_ODSR_OFFSET     0x001C /* HRTIM Output Disable Status Register */
 #define STM32_HRTIM_CMN_BMCR_OFFSET     0x0020 /* HRTIM Burst Mode Control Register */
 #define STM32_HRTIM_CMN_BMTRGR_OFFSET   0x0024 /* HRTIM Burst Mode Trigger Register */

arch/arm/src/stm32/stm32_hrtim.c

@@ -61,6 +61,10 @@
 #  error HRTIM ADC Triggering not supported yet
 #endif
 
+#ifdef CONFIG_STM32_HRTIM_DAC
+#  error HRTIM DAC Triggering not supported yet
+#endif
+
 #ifdef CONFIG_STM32_HRTIM_FAULT
 #  error HRTIM Faults not supported yet
 #endif
@@ -181,7 +185,10 @@ struct stm32_hrtim_timout_s
 #ifdef HRTIM_HAVE_CHOPPER
 struct stm32_hrtim_chopper_s
 {
-  uint32_t reserved;             /* reserved for future use */
+  uint16_t start:4;              /* Chopper start pulsewidth */
+  uint16_t duty:3;               /* Chopper duty cycle */
+  uint16_t freq:4;               /* Chopper carrier frequency value */
+  uint16_t _res:5;               /* Reserved */
 };
 #endif
 
@@ -190,7 +197,10 @@ struct stm32_hrtim_chopper_s
 #ifdef HRTIM_HAVE_DEADTIME
 struct stm32_hrtim_deadtime_s
 {
-  uint32_t reserved;             /* reserved for future use */
+  uint8_t falling_lock:2;       /* Deadtime falling value and sign lock */
+  uint8_t rising_lock:2;        /* Deadtime rising value and sign lock */
+  uint8_t prescaler:3;          /* Deadtime Prescaler */
+  uint8_t _res:1;               /* Reserved */
 };
 #endif
 
@@ -447,7 +457,6 @@ static uint16_t hrtim_per_get(FAR struct stm32_hrtim_s *priv, uint8_t timer);
 static uint16_t hrtim_cmp_get(FAR struct stm32_hrtim_s *priv, uint8_t timer,
                          uint8_t index);
 
-
 /* Initialization */
 
 static int stm32_hrtimconfig(FAR struct stm32_hrtim_s *priv);
@@ -508,13 +517,17 @@ static struct stm32_hrtim_slave_priv_s g_tima_priv =
 #ifdef CONFIG_STM32_HRTIM_TIMA_CHOP
     .chp =
     {
-      .reserved = 0
+      .start_pulse = HRTIM_TIMA_CHOP_START,
+      .duty        = HRTIM_TIMA_CHOP_DUTY,
+      .freq        = HRTIM_TIMA_CHOP_FREQ
     },
 #endif
 #ifdef CONFIG_STM32_HRTIM_TIMA_DT
     .dt =
     {
-      .reserved = 0
+      .falling_lock = HRTIM_TIMA_DT_FLOCK,
+      .rising_lock  = HRTIM_TIMA_DT_RLOCK,
+      .prescaler    = HRTIM_TIMA_DT_PRESCALER,
     }
 #endif
   },
@@ -590,6 +603,7 @@ static struct stm32_hrtim_s g_hrtim1priv =
 struct hrtim_dev_s g_hrtim1dev =
 {
   .hd_priv  = &g_hrtim1priv,
+  .initialized = false,
 };
 
 /****************************************************************************
@@ -1723,7 +1737,7 @@ static void hrtim_preload_config(FAR struct stm32_hrtim_s *priv)
  *
  * Input parameters:
  *   priv   - A reference to the HRTIM block
- *   timer  - HRTIM Timer timer
+ *   timer  - HRTIM Timer index
  *   index  - Compare register timer
  *   cmp    - New compare register value
  *
@@ -1781,7 +1795,7 @@ errout:
  *
  * Input parameters:
  *   priv   - A reference to the HRTIM block
- *   timer  - HRTIM Timer timer
+ *   timer  - HRTIM Timer index
  *   per    - New period register value
  *
  * Returned Value:
@@ -1805,7 +1819,7 @@ static int hrtim_per_update(FAR struct stm32_hrtim_s *priv, uint8_t timer,
  *
  * Input parameters:
  *   priv   - A reference to the HRTIM block
- *   timer  - HRTIM Timer timer
+ *   timer  - HRTIM Timer index
  *
  * Returned Value:
  *   Zero on success; a negated errno value on failure
@@ -1825,7 +1839,7 @@ static uint16_t hrtim_per_get(FAR struct stm32_hrtim_s *priv, uint8_t timer)
  *
  * Input parameters:
  *   priv   - A reference to the HRTIM block
- *   timer  - HRTIM Timer timer
+ *   timer  - HRTIM Timer index
  *   index  - Compare register timer
  *
  * Returned Value:
@@ -2073,12 +2087,19 @@ FAR struct hrtim_dev_s* stm32_hrtiminitialize(void)
 
   hrtim = dev->hd_priv;
 
-  ret = stm32_hrtimconfig(hrtim);
+  /* configure HRTIM only once */
-  if (ret < 0)
+
+  if (dev->initialized)
     {
-      tmrerr("ERROR: Failed to initialize HRTIM1: %d\n", ret);
+      ret = stm32_hrtimconfig(hrtim);
-      errno = -ret;
+      if (ret < 0)
-      return NULL;
+        {
+          tmrerr("ERROR: Failed to initialize HRTIM1: %d\n", ret);
+          errno = -ret;
+          return NULL;
+        }
+
+      dev->initialized = true;
     }
 
   return dev;

arch/arm/src/stm32/stm32_hrtim.h

@@ -268,6 +268,89 @@ enum stm32_outputs_e
   HRTIM_OUT_TIME_CH2 = (1 << 9),
 };
 
+/* DAC synchronization event */
+
+enum stm32_hrtim_dacsync_e
+{
+  HRTIM_DACSYNC_DIS,
+  HRTIM_DACSYNC_1,
+  HRTIM_DACSYNC_2,
+  HRTIM_DACSYNC_3,
+};
+
+/* HRTIM Deadtime Locks */
+
+enum stm32_deadtime_lock_e
+{
+  HRTIM_DT_VALUE_LOCK = (1 << 0), /* Lock Deadtime value */
+  HRTIM_DT_SIGN_LOCK  = (1 << 1)  /* Lock Deadtime sign */
+};
+
+/* HRTIM Deadtime types  */
+
+enum stm32_deadtime_edge_e
+{
+  HRTIM_DT_RISING = 0,
+  HRTIM_DT_FALLING = 1
+};
+
+/* Chopper start pulsewidth */
+
+enum stm32_chopper_start_e
+{
+  HRTIM_CHP_START_16,
+  HRTIM_CHP_START_32,
+  HRTIM_CHP_START_48,
+  HRTIM_CHP_START_64,
+  HRTIM_CHP_START_80,
+  HRTIM_CHP_START_96,
+  HRTIM_CHP_START_112,
+  HRTIM_CHP_START_128,
+  HRTIM_CHP_START_144,
+  HRTIM_CHP_START_160,
+  HRTIM_CHP_START_176,
+  HRTIM_CHP_START_192,
+  HRTIM_CHP_START_208,
+  HRTIM_CHP_START_224,
+  HRTIM_CHP_START_256
+};
+
+/* Chopper duty cycle */
+
+enum stm32_chopper_duty_e
+{
+  HRTIM_CHP_DUTY_0,
+  HRTIM_CHP_DUTY_1,
+  HRTIM_CHP_DUTY_2,
+  HRTIM_CHP_DUTY_3,
+  HRTIM_CHP_DUTY_4,
+  HRTIM_CHP_DUTY_5,
+  HRTIM_CHP_DUTY_6,
+  HRTIM_CHP_DUTY_7 ,
+};
+
+/* Chopper carrier frequency */
+
+enum stm32_chopper_freq_e
+{
+  HRTIM_CHP_FREQ_d16,
+  HRTIM_CHP_FREQ_d32,
+  HRTIM_CHP_FREQ_d48,
+  HRTIM_CHP_FREQ_d64,
+  HRTIM_CHP_FREQ_d80,
+  HRTIM_CHP_FREQ_d96,
+  HRTIM_CHP_FREQ_d112,
+  HRTIM_CHP_FREQ_d128,
+  HRTIM_CHP_FREQ_d144,
+  HRTIM_CHP_FREQ_d160,
+  HRTIM_CHP_FREQ_d176,
+  HRTIM_CHP_FREQ_d192,
+  HRTIM_CHP_FREQ_d208,
+  HRTIM_CHP_FREQ_d224,
+  HRTIM_CHP_FREQ_d240,
+  HRTIM_CHP_FREQ_d256
+};
+
 /*  */
 
 struct hrtim_dev_s
@@ -275,13 +358,14 @@ struct hrtim_dev_s
 #ifdef CONFIG_HRTIM
   /* Fields managed by common upper half HRTIM logic */
 
-  uint8_t                 hd_ocount;    /* The number of times the device has been opened */
+  uint8_t hd_ocount; /* The number of times the device has been opened */
-  sem_t                   hd_closesem;  /* Locks out new opens while close is in progress */
+  sem_t hd_closesem; /* Locks out new opens while close is in progress */
 #endif
 
   /* Fields provided by lower half HRTIM logic */
 
-  FAR void                     *hd_priv; /* Used by the arch-specific logic */
+  FAR void *hd_priv; /* Used by the arch-specific logic */
+  bool initialized;  /* true: HRTIM driver has been initialized */
 };
 
 /************************************************************************************