Add interrupt initialization logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1501 42af7a65-404d-4744-a932-0658087f49c3
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@ -45,7 +45,7 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c \
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CHIP_ASRCS = m16c_vectors.S
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CHIP_ASRCS = m16c_vectors.S
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#CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c \
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#CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c \
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# m16c_timerisr.c m16c_serial.c
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# m16c_timerisr.c m16c_serial.c
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CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c
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CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_irq.c
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ifneq ($(CONFIG_DISABLE_SIGNALS),y)
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ifneq ($(CONFIG_DISABLE_SIGNALS),y)
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CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c
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CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c
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127
arch/sh/src/m16c/m16c_irq.c
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127
arch/sh/src/m16c/m16c_irq.c
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@ -0,0 +1,127 @@
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/****************************************************************************
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* arch/sh/src/m16c/m16c_irq.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include "up_internal.h"
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/****************************************************************************
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* Private Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* This holds a references to the current interrupt level register storage
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* structure. If is non-NULL only during interrupt processing.
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*/
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uint32 *current_regs; /* Actually a pointer to the beginning or a ubyte array */
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_irqinitialize
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****************************************************************************/
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void up_irqinitialize(void)
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{
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current_regs = NULL;
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/* And finally, enable interrupts */
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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asm("fset i");
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#endif
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}
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/****************************************************************************
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* Name: up_disable_irq
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*
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* Description:
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* On many architectures, there are three levels of interrupt enabling: (1)
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* at the global level, (2) at the level of the interrupt controller,
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* and (3) at the device level. In order to receive interrupts, they
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* must be enabled at all three levels.
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*
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* This function implements disabling of the device specified by 'irq'
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* at the interrupt controller level if supported by the architecture
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* (irqsave() supports the global level, the device level is hardware
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* specific).
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*
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****************************************************************************/
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#ifndef CONFIG_ARCH_NOINTC
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void up_disable_irq(int irq)
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{
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/* There are no ez80 interrupt controller settings to disable IRQs */
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}
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/****************************************************************************
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* Name: up_enable_irq
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*
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* Description:
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* This function implements enabling of the device specified by 'irq'
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* at the interrupt controller level if supported by the architecture
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* (irqsave() supports the global level, the device level is hardware
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* specific).
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*
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****************************************************************************/
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void up_enable_irq(int irq)
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{
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/* There are no ez80 interrupt controller settings to enable IRQs */
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}
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#endif /* CONFIG_ARCH_NOINTC */
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