From be2fee7d6effb76de20098097f304ffa3fa346bc Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Sat, 2 Apr 2022 05:16:48 +0800 Subject: [PATCH] arch/riscv: Rename riscv_exception_macros.S to riscv_macros.S since macro defined in this file is also used in the normal context Signed-off-by: Xiang Xiao --- arch/risc-v/src/common/riscv_exception_common.S | 2 +- .../src/common/{riscv_exception_macros.S => riscv_macros.S} | 4 ++-- arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename arch/risc-v/src/common/{riscv_exception_macros.S => riscv_macros.S} (98%) diff --git a/arch/risc-v/src/common/riscv_exception_common.S b/arch/risc-v/src/common/riscv_exception_common.S index f0603f951e..bc2cb9be32 100644 --- a/arch/risc-v/src/common/riscv_exception_common.S +++ b/arch/risc-v/src/common/riscv_exception_common.S @@ -28,7 +28,7 @@ #include #include -#include "riscv_exception_macros.S" +#include "riscv_macros.S" /**************************************************************************** * Pre-processor Definitions diff --git a/arch/risc-v/src/common/riscv_exception_macros.S b/arch/risc-v/src/common/riscv_macros.S similarity index 98% rename from arch/risc-v/src/common/riscv_exception_macros.S rename to arch/risc-v/src/common/riscv_macros.S index d2f3291503..2243698690 100644 --- a/arch/risc-v/src/common/riscv_exception_macros.S +++ b/arch/risc-v/src/common/riscv_macros.S @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/risc-v/src/common/supervisor/riscv_exception_macros.S + * arch/risc-v/src/common/riscv_macros.S * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,7 +18,7 @@ * ****************************************************************************/ -.file "riscv_exception_macros.S" +.file "riscv_macros.S" /**************************************************************************** * Included Files diff --git a/arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S b/arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S index ed8a635743..791048e3be 100644 --- a/arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S +++ b/arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S @@ -27,7 +27,7 @@ #include #include -#include "riscv_exception_macros.S" +#include "riscv_macros.S" /**************************************************************************** * Pre-processor Definitions