diff --git a/configs/olimex-strp711/README.txt b/configs/olimex-strp711/README.txt index cec7b70e61..d258e67c7f 100644 --- a/configs/olimex-strp711/README.txt +++ b/configs/olimex-strp711/README.txt @@ -1,3 +1,65 @@ +Olimex STR-P711 +^^^^^^^^^^^^^^^ + Features: + + - MCU: STR711FR2T6 16/32 bit ARM7TDMI™ with 256K Bytes Program Flash, + 64K Bytes RAM, USB 2.0, RTC, 12 bit ADC, 4x UARTs, 2x I2C,2x SPI, + 5x 32bit TIMERS, 2x PWM, 2x CCR, WDT, up to 50MHz operation + - Standard JTAG connector with ARM 2x10 pin layout for programming/debugging + with ARM-JTAG + - USB connector + - Two channel RS232 interface and drivers + - SD/MMC card connector + - Two buttons + - Trimpot connected to ADC + - Two status LEDs + - Buzzer + - UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, + RF2.4Ghz, RFID etc. modules + - 2x SPI connectors + - I2C connector + - On board voltage regulator 3.3V with up to 800mA current + - Single power supply: 6V AC or DC required, USB port can power the board + - Power supply LED + - Power supply filtering capacitor + - RESET circuit + - RESET button + - 4 Mhz crystal oscillator + - 32768 Hz crystal and RTC + + Power Supply + + 6V AC or DC (or powered from USB port) + + GIO with on-board connections (others available for prototyping): + + SIGNAL DESCRIPTION PIN + ------- --------------------- ----- + MISO1 BSPI0 to MMC/SD P0.4 + MOSI1 " " "" " " P0.5 + SCLK1 " " "" " " P0.6 + SS1 " " "" " " P0.7 + U0RX UART 0 P0.8 + U0TX " " " P0.9 + U1RX UART 1 P0.10 + U1TX " " " P0.11 + BUZZ Buzzer P0.13 + WAKE-UP Button P0.15 + AIN0 Potentiometer (AN_TR) P1.3 + LED1 LED 1 P1.8 + LED2 LED 2 P1.9 + WP MMC/SD write protect P1.10 + USBOP USB P1.11 + USBON " " P1.12 + BUT Button P1.13 + CP MMC/SD card present P1.15 + + Jumpers + STNBY Will pull pin 23 /STDBY low + +OpenOCD +^^^^^^^ + For a debug environment, I am using OpenOCD with a Wiggler-clone JTAG interface. The following steps worked for me with a 20081028 OpenOCD snapshot. @@ -62,3 +124,4 @@ GENERAL STEPS: type 'target remote localhost:3333' to connect to the target The same commands from the telnet interface can now be accessed through the 'monitor' command, e.g. 'monitor help' + diff --git a/configs/olimex-strp711/src/up_buttons.c b/configs/olimex-strp711/src/up_buttons.c index 108a5831cb..f6340026e9 100644 --- a/configs/olimex-strp711/src/up_buttons.c +++ b/configs/olimex-strp711/src/up_buttons.c @@ -50,13 +50,12 @@ /* The Olimex board has two buttons, one labled "BUT" and the other "WAKEUP" * - * P1.14: WAKEUP button + * P0.15: WAKEUP button * P1.13: BUT button */ #define STR71X_BUTBUTTON_GPIO1 (0x2000) -#define STR71X_WAKEUPBUTTON_GPIO1 (0x4000) -#define STR71X_BOTHBUTTONS_GPIO1 (STR71X_BUTBUTTON_GPIO1|STR71X_WAKEUPBUTTON_GPIO1) +#define STR71X_WAKEUPBUTTON_GPIO0 (0x8000) /**************************************************************************** * Private Data @@ -79,18 +78,30 @@ void up_buttoninit(void) { uint16 reg16; - /* Configure the GPIO pins as inputs */ + /* Configure the GPIO0 & 1 pins as inputs */ + + reg16 = getreg16(STR71X_GPIO0_PC0); + reg16 |= STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC0); + + reg16 = getreg16(STR71X_GPIO0_PC1); + reg16 &= ~STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC1); + + reg16 = getreg16(STR71X_GPIO0_PC2); + reg16 &= ~STR71X_WAKEUPBUTTON_GPIO0; + putreg16(reg16, STR71X_GPIO0_PC2); reg16 = getreg16(STR71X_GPIO1_PC0); - reg16 |= STR71X_BOTHBUTTONS_GPIO1; + reg16 |= STR71X_BUTBUTTON_GPIO1; putreg16(reg16, STR71X_GPIO1_PC0); reg16 = getreg16(STR71X_GPIO1_PC1); - reg16 &= ~STR71X_BOTHBUTTONS_GPIO1; + reg16 &= ~STR71X_BUTBUTTON_GPIO1; putreg16(reg16, STR71X_GPIO1_PC1); reg16 = getreg16(STR71X_GPIO1_PC2); - reg16 &= ~STR71X_BOTHBUTTONS_GPIO1; + reg16 &= ~STR71X_BUTBUTTON_GPIO1; putreg16(reg16, STR71X_GPIO1_PC2); } @@ -100,17 +111,18 @@ void up_buttoninit(void) ubyte up_buttons(void) { - uint16 reg16 = getreg16(STR71X_GPIO1_PD); ubyte ret = 0; - if ((reg16 & STR71X_BUTBUTTON_GPIO1) != 0) - { - ret |= BUT_BUTTON; - } - if ((reg16 & STR71X_WAKEUPBUTTON_GPIO1) != 0) + if ((getreg16(STR71X_GPIO0_PD) & STR71X_WAKEUPBUTTON_GPIO0) != 0) { ret |= WAKEUP_BUTTON; } + + if ((getreg16(STR71X_GPIO1_PD) & STR71X_BUTBUTTON_GPIO1) != 0) + { + ret |= BUT_BUTTON; + } + return ret; } #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/olimex-strp711/src/up_spi.c b/configs/olimex-strp711/src/up_spi.c index 707f7fa066..43a166b2ab 100644 --- a/configs/olimex-strp711/src/up_spi.c +++ b/configs/olimex-strp711/src/up_spi.c @@ -76,6 +76,10 @@ # define CONFIG_STR714X_BSPI1_RXFIFO_DEPTH 8 #endif +#if defined(CONFIG_STR71X_HDLC) && defined (CONFIG_STR71X_BSPI1) +# warning "BSPI1 GPIO usage conflicts with HDLC" +#endif + /**************************************************************************** * On the Olimex-STR-STR-P711, BSPI0 is not connected on board, but is * available on a header for use in the prototyping area. BSPI connects @@ -86,12 +90,12 @@ * PIN NORMAL ALTERNATE Olimex-STR-STR-P711 Connection * 123/52 P0.0 S0.MISO * UEXT-3 (Not connected on board) * 124/53 P0.1 S0.MOSI * UEXT-4 " " " " "" " " - * 125/54 P0.2 S0.SCLK * UEXT-5 " " " " "" " " + * 125/54 P0.2 S0.SCLK ** UEXT-5 " " " " "" " " * 126/55 P0.3 ~SO.SS ** UEXT-6 " " " " "" " " * * * Programming the AF function selects UART3 by default. BSPI must be * enabled with the SPI_EN bit in the BOOTCR register - * * Programming the AF function selects I2C1 by default. BSPI must be + * ** Programming the AF function selects I2C1 by default. BSPI must be * enabled with the SPI_EN bit in the BOOTCR register * * BSP1 @@ -101,20 +105,36 @@ * 141/61 P0.6 S1.SCLK SD_CARDBOT CLK/SCLK * 142/62 P0.7 ~S1.SS SD_CARDBOT CD/DAT/CS * + * Two GPIO pins also connect to the MMC/SD slot: + * + * PIN NORMAL ALTERNATE Olimex-STR-STR-P711 Connection + * 106/46 P1.10 USB clock MMC/SD write protect (WP) + * 111/49 P1.15 HDLC xmit MMC/SD card present (CP) + * ****************************************************************************/ #define BSPI0_GPIO0_MISO (0x0001) #define BSPI0_GPIO0_MOSI (0x0002) #define BSPI0_GPIO0_SCLK (0x0004) #define BSPI0_GPIO0_SS (0x0008) + +#define BSPIO_GPIO0-ALT (BSPI0_GPIO0_MISO|BSPI0_GPIO0_MOSI|BSPI0_GPIO0_SCLK) +#define BSPIO_GPIO0_OUT BSPI0_GPIO0_SS #define BSPIO_GPIO0_ALL (0x000f) #define BSPI1_GPIO0_MISO (0x0010) #define BSPI1_GPIO0_MOSI (0x0020) #define BSPI1_GPIO0_SCLK (0x0040) #define BSPI1_GPIO0_SS (0x0080) + +#define BSPI1_GPIO0-ALT (BSPI1_GPIO0_MISO|BSPI1_GPIO0_MOSI|BSPI1_GPIO0_SCLK) +#define BSPI1_GPIO0_OUT BSPI1_GPIO0_SS #define BSPI1_GPIO0_ALL (0x00f0) +#define MMCSD_GPIO1_WPIN (0x0400) +#define MMCSD_GPIO1_CPIN (0x8000) +#define MMCSD_GPIO1_ALL (MMCSD_GPIO1_WPIN|MMCSD_GPIO1_CPIN) + /* Configuration register settings ******************************************/ #if CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 1 @@ -477,11 +497,20 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) static ubyte spi_status(FAR struct spi_dev_s *dev) { - /* I don't think there is anyway to determine these things on the Olimex - * board. - */ + ubyte ret = 0; + uint16 reg16 = getreg16(STR71X_GPIO1_PD); - return SPI_STATUS_PRESENT; + if ((re16 & MMCSD_GPIO1_WPIN) != 0) + { + ret |= SPI_STATUS_WRPROTECTED; + } + + if ((re16 & MMCSD_GPIO1_CPIN) != 0) + { + ret |= SPI_STATUS_PRESENT; + } + + return ret; } /**************************************************************************** @@ -679,6 +708,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) reg16 = getreg16(STR71X_PCU_BOOTCR); reg16 |= STR71X_PCUBOOTCR_BSPIOEN; + putreg16(reg16, STR71X_PCU_BOOTCR); /* Configure all GPIO pins to their alternate function EXCEPT * for the SS pin .. will will configure that as an output @@ -690,8 +720,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port) putreg16(reg16, STR71X_GPIO0_PC0); reg16 = getreg16(STR71X_GPIO0_PC1); - reg16 |= BSPIO_GPIO0_ALL; - reg16 &= ~BSPI0_GPIO0_SS; + req16 &= ~BSPIO_GPIO0_ALL; + reg16 |= BSPIO_GPIO0_ALT; putreg16(reg16, STR71X_GPIO0_PC1); reg16 = getreg16(STR71X_GPIO0_PC2); @@ -706,7 +736,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) /* Set the clock divider to the maximum */ - putreg16(255, STR71X_BSPI1_CLK); + putreg16(255, STR71X_BSPI0_CLK); /* Set FIFO sizes and disable the BSP1. It won't be enabled * until the frequency is set. @@ -732,8 +762,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port) putreg16(reg16, STR71X_GPIO0_PC0); reg16 = getreg16(STR71X_GPIO0_PC1); - reg16 |= BSPI1_GPIO0_ALL; - reg16 &= ~BSPI1_GPIO0_SS; + req16 &= ~BSPI1_GPIO0_ALL; + reg16 |= BSPI1_GPIO0_ALT; putreg16(reg16, STR71X_GPIO0_PC1); reg16 = getreg16(STR71X_GPIO0_PC2); @@ -757,6 +787,20 @@ FAR struct spi_dev_s *up_spiinitialize(int port) putreg16(STR71X_BSPI1_CSR1DISABLE, STR71X_BSPI1_CSR1); putreg16(STR71X_BSPI1_CSR2VALUE, STR71X_BSPI1_CSR2); + /* Configure GPIO1 pins for WP/CP input */ + + reg16 = getreg16(STR71X_GPIO1_PC0); + reg16 |= MMCSD_GPIO1_ALL; + putreg16(reg16, STR71X_GPIO1_PC0); + + reg16 = getreg16(STR71X_GPIO1_PC1); + reg16 &= ~MMCSD_GPIO1_ALL; + putreg16(reg16, STR71X_GPIO1_PC1); + + reg16 = getreg16(STR71X_GPIO1_PC2); + reg16 &= ~MMCSD_GPIO1_ALL; + putreg16(reg16, STR71X_GPIO1_PC2); + ret = &g_spidev1.spidev; } else