i.MX6 Add more IOMUX logic
This commit is contained in:
Gregory Nutt
parent
2b0124b9f2
commit
be594b8932
@ -1756,27 +1756,48 @@
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/* Pad Control Registers */
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#define DRIVE_HIZ (0) /* HI-Z */
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#define DRIVE_260OHM (1) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
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#define DRIVE_130OHM (2) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
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#define DRIVE_90OHM (3) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
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#define DRIVE_60OHM (4) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
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#define DRIVE_50OHM (5) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
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#define DRIVE_40OHM (6) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
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#define DRIVE_33OHM (7) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
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#define SPEED_LOW (0) /* Low frequency (50 MHz) */
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#define SPEED_MEDIUM (1) /* Medium frequency (100, 150 MHz) */
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#define SPEED_MAX (3) /* Maximum frequency (100, 150, 200 MHz) */
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#define PULL_DOWN_100K (0) /* 100K Ohm Pull Down */
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#define PULL_UP_47K (1) /* 47K Ohm Pull Up */
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#define PULL_UP_100K (2) /* 100K Ohm Pull Up */
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#define PULL_UP_22K (3) /* 22K Ohm Pull Up */
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#define PADCTL_SRE (1 << 0) /* Bit 0: Slew Rate Field */
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#define PADCTL_DSE_SHIFT (3) /* Bits 3-5: Drive Strength Field */
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#define PADCTL_DSE_SHIFT (3) /* Bits 3-5: Drive Strength Field */
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#define PADCTL_DSE_MASK (7 << PADCTL_DSE_SHIFT)
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# define PADCTL_DS_HIZ (0 << PADCTL_DS_SHIFT) /* HI-Z */
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# define PADCTL_DS_260OHM (1 << PADCTL_DS_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
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# define PADCTL_DS_130OHM (2 << PADCTL_DS_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
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# define PADCTL_DS_90OHM (3 << PADCTL_DS_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
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# define PADCTL_DS_60OHM (4 << PADCTL_DS_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
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# define PADCTL_DS_50OHM (5 << PADCTL_DS_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
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# define PADCTL_DS_40OHM (6 << PADCTL_DS_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
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# define PADCTL_DS_33OHM (7 << PADCTL_DS_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
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#define PADCTL_SPEED_SHIFT (6) /* Bits 6-7: Speed Field */
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# define PADCTL_DSE(n) ((uint32_t)(n) << PADCTL_DSE_SHIFT) /* n=DRIVE_* */
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# define PADCTL_DSE_HIZ (0 << PADCTL_DSE_SHIFT) /* HI-Z */
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# define PADCTL_DSE_260OHM (1 << PADCTL_DSE_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
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# define PADCTL_DSE_130OHM (2 << PADCTL_DSE_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
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# define PADCTL_DSE_90OHM (3 << PADCTL_DSE_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
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# define PADCTL_DSE_60OHM (4 << PADCTL_DSE_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
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# define PADCTL_DSE_50OHM (5 << PADCTL_DSE_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
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# define PADCTL_DSE_40OHM (6 << PADCTL_DSE_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
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# define PADCTL_DSE_33OHM (7 << PADCTL_DSE_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
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#define PADCTL_SPEED_SHIFT (6) /* Bits 6-7: Speed Field */
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#define PADCTL_SPEED_MASK (3 << PADCTL_SPEED_SHIFT)
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# define PADCTL_SPEED(n) ((uint32_t)(n) << PADCTL_SPEED_SHIFT) /* n=SPEED_* */
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# define PADCTL_SPEED_LOW (0 << PADCTL_SPEED_SHIFT) /* Low frequency (50 MHz) */
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# define PADCTL_SPEED_MEDIUM (1 << PADCTL_SPEED_SHIFT) /* Medium frequency (100, 150 MHz) */
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# define PADCTL_SPEED_MAX (3 << PADCTL_SPEED_SHIFT) /* Maximum frequency (100, 150, 200 MHz) */
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#define PADCTL_ODE (1 << 11) /* Bit 11: Open Drain Enable Field */
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#define PADCTL_PKE (1 << 12) /* Bit 12: Pull / Keep Enable Field */
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#define PADCTL_PUE (1 << 13) /* Bit 13: Pull / Keep Select Field */
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#define PADCTL_PUS_SHIFT (14) /* Bits 14-15: Pull Up / Down Config. Field */
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#define PADCTL_PUS_SHIFT (14) /* Bits 14-15: Pull Up / Down Config. Field */
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#define PADCTL_PUS_MASK (3 << PADCTL_PUS_SHIFT)
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# define PADCTL_PUS(n) ((uint32_t)(n) << PADCTL_PUS_SHIFT) /* n=PULL_* */
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# define PADCTL_PUS_DOWN_100K (0 << PADCTL_PUS_SHIFT) /* 100K Ohm Pull Down */
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# define PADCTL_PUS_UP_47K (1 << PADCTL_PUS_SHIFT) /* 47K Ohm Pull Up */
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# define PADCTL_PUS_UP_100K (2 << PADCTL_PUS_SHIFT) /* 100K Ohm Pull Up */
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@ -413,6 +413,7 @@ static inline bool imx_gpio_getinput(int port, int pin)
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static inline int imx_gpio_configinput(gpio_pinset_t pinset, int port, int pin)
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{
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FAR const uint8_t *table;
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iomux_pinset_t ioset;
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uintptr_t regaddr;
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unsigned int index;
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@ -447,7 +448,8 @@ static inline int imx_gpio_configinput(gpio_pinset_t pinset, int port, int pin)
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}
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regaddr = IMX_PADCTL_ADDRESS(index);
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return imx_iomux_configure(regaddr, pinset);
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ioset = (iomux_pinset_t)((pinset & GPIO_IOMUX_MASK) >> GPIO_IOMUX_SHIFT);
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return imx_iomux_configure(regaddr, ioset);
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}
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/****************************************************************************
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@ -50,100 +50,35 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Encoding:
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/* 28-bit Encoding:
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*
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* ENCODING ...I RRRO DDDL SSVT GGGP PPPP
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* GPIO INPUT ...0 .... .... ...T GGGP PPPP
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* GPIO OUTPUT ...1 RRRO DDDL SSV. GGGP PPPP
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* ENCODING ..IV GGGP PPPP MMMM MMMM MMMM MMMM
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* GPIO INPUT ..0. GGGP PPPP MMMM MMMM MMMM MMMM
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* GPIO OUTPUT ..1V GGGP PPPP MMMM MMMM MMMM MMMM
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*/
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/* Input/Output Selection:
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*
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* ENCODING ...I .... .... .... .... ....
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* ENCODING ..I. .... .... .... .... .... ....
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*/
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#define GPIO_INPUT (0) /* Bit 20: 0=input */
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#define GPIO_OUTPUT (1 << 19) /* Bit 20: 1=output */
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/* Output Pull Up/Down:
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*
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* GPIO OUTPUT ...1 RRR. .... .... .... ....
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*/
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#define GPIO_PULL_SHIFT (17) /* Bits 17-19: Pull up/down selection */
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#define GPIO_PULL_MASK (7 << GPIO_PULL_SHIFT)
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# define GPIO_PULL_NONE (0 << GPIO_PULL_SHIFT) /* Pull/keeper disabled */
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# define GPIO_PULL_KEEP (1 << GPIO_PULL_SHIFT) /* Output determined by keeper */
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# define GPIO_PULL_UP_22K (2 << GPIO_PULL_SHIFT) /* Pull up with 22 KOhm resister */
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# define GPIO_PULL_UP_47K (3 << GPIO_PULL_SHIFT) /* Pull up with 47 KOhm resister */
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# define GPIO_PULL_UP_100K (4 << GPIO_PULL_SHIFT) /* Pull up with 100 KOhm resister */
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# define GPIO_PULL_DOWN_100K (5 << GPIO_PULL_SHIFT) /* Pull down with 100 KOhm resister */
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/* Open Drain Output:
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*
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* GPIO OUTPUT ...1 ...O .... .... .... ....
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*/
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#define GPIO_CMOS_OUTPUT (1 << 16) /* Bit 16: 0=CMOS output */
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#define GPIO_OPENDRAIN (1 << 16) /* Bit 16: 1=Enable open-drain output */
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/* Output Drive Strength:
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*
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* GPIO OUTPUT ...1 .... DDD. .... .... ....
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*/
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#define GPIO_DRIVE_SHIFT (13) /* Bits 13-15: Output Drive Strength */
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#define GPIO_DRIVE_MASK (7 << GPIO_DRIVE_SHIFT)
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# define GPIO_DRIVE_HIZ (0 << GPIO_DRIVE_SHIFT) /* HI-Z */
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# define GPIO_DRIVE_260OHM (1 << GPIO_DRIVE_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
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# define GPIO_DRIVE_130OHM (2 << GPIO_DRIVE_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
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# define GPIO_DRIVE_90OHM (3 << GPIO_DRIVE_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
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# define GPIO_DRIVE_60OHM (4 << GPIO_DRIVE_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
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# define GPIO_DRIVE_50OHM (5 << GPIO_DRIVE_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
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# define GPIO_DRIVE_40OHM (6 << GPIO_DRIVE_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
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# define GPIO_DRIVE_33OHM (7 << GPIO_DRIVE_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
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/* Output Slew Rate:
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*
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* GPIO OUTPUT ...1 .... ...L .... .... ....
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*/
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#define GPIO_SLEW_SLOW (0) /* Bit 12: 0=Slow Slew Rate */
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#define GPIO_SLEW_FAST (1 << 12) /* Bit 12: 1=Fast Slew Rate */
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/* Output Speed:
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*
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* GPIO OUTPUT ...1 .... .... SS.. .... ....
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*/
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#define GPIO_SPEED_SHIFT (10) /* Bits 10-11: Speed */
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#define GPIO_SPEED_MASK (3 << GPIO_SPEED_SHIFT)
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# define GPIO_SPEED_LOW (0 << GPIO_SPEED_SHIFT) /* Low frequency (50 MHz) */
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# define GPIO_SPEED_MEDIUM (1 << GPIO_SPEED_SHIFT) /* Medium frequency (100, 150 MHz) */
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# define GPIO_SPEED_MAX (3 << GPIO_SPEED_SHIFT) /* Maximum frequency (100, 150, 200 MHz) */
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#define GPIO_INPUT (0) /* Bit 25: 0=input */
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#define GPIO_OUTPUT (1 << 25) /* Bit 25: 1=output */
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/* Initial Ouptut Value:
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*
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* GPIO OUTPUT ...1 .... .... ..V. .... ....
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* GPIO OUTPUT ..1V .... .... .... .... .... ....
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*/
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#define GPIO_OUTPUT_ZERO (0) /* Bit 9: 0=Initial output is low */
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#define GPIO_OUTPUT_ONE (1 << 9) /* Bit 9: 1=Initial output is high */
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/* Input Schmitt Trigger:
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*
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* GPIO INPUT ...0 .... .... ...T .... ....
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*/
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#define GPIO_CMOS_INPUT (0) /* Bit 8: 0=CMOS input */
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#define GPIO_SCHMITT_TRIGGER (1 << 8) /* Bit 8: 1=Enable Schmitt trigger if input */
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#define GPIO_OUTPUT_ZERO (0) /* Bit 24: 0=Initial output is low */
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#define GPIO_OUTPUT_ONE (1 << 24) /* Bit 24: 1=Initial output is high */
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/* GPIO Port Number
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*
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* ENCODING .... .... .... .... GGG. ....
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* ENCODING .... GGG. .... .... .... .... ....
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*/
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#define GPIO_PORT_SHIFT (5) /* Bits 5-7: Speed */
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#define GPIO_PORT_SHIFT (21) /* Bits 21-23: GPIO port index */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORT1 (0 << GPIO_PORT_SHIFT) /* GPIO1 */
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# define GPIO_PORT2 (1 << GPIO_PORT_SHIFT) /* GPIO2 */
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@ -155,10 +90,10 @@
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/* GPIO Pin Number:
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*
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* ENCODING .... .... .... .... ...P PPPP
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* ENCODING .... ...P PPPP .... .... .... ....
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*/
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#define GPIO_PIN_SHIFT (5) /* Bits 0-4: Speed */
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#define GPIO_PIN_SHIFT (16) /* Bits 16-20: GPIO pin number */
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#define GPIO_PIN_MASK (15 << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) /* Pin 0 */
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) /* Pin 1 */
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@ -193,6 +128,16 @@
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# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) /* Pin 30 */
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# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) /* Pin 31 */
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/* IOMUX Pin Configuration:
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*
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* ENCODING .... .... .... MMMM MMMM MMMM MMMM
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*
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* See imx_iomuxc.h for detailed content.
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*/
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#define GPIO_IOMUX_SHIFT (0) /* Bits 9-15: IOMUX pin configuration */
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#define GPIO_IOMUX_MASK (0xffff << GPIO_IOMUX_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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@ -43,6 +43,7 @@
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#include <assert.h>
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#include <errno.h>
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#include "up_arch.h"
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#include "imx_iomuxc.h"
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/****************************************************************************
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@ -53,7 +54,9 @@
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*
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* REVISIT: This could be greatly simplified: The Pad Control registers
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* map 1-to-1 with the Pad Mux registers except for two regions where
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* there are no corresponding Pad Mux registers.
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* there are no corresponding Pad Mux registers. The entire table could be
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* replaced to two range checks and the appropriate offset added to the Pad
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* Mux Register index.
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*/
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static const uint8_t g_mux2ctl_map[IMX_PADMUX_NREGISTERS] =
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@ -360,6 +363,66 @@ unsigned int imx_padmux_map(unsigned int padmux)
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int imx_iomux_configure(uintptr_t padctl, iomux_pinset_t ioset)
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{
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#warning Missing logic
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return -ENOSYS;
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uint32_t regval = 0;
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uint32_t value;
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/* Select CMOS input or Schmitt Trigger input */
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if ((ioset & IOMUX_SCHMITT_TRIGGER) != 0)
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{
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regval |= PADCTL_SRE;
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}
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/* Select drive strength */
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value = (ioset & PADCTL_DSE_MASK) >> PADCTL_DSE_SHIFT;
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regval |= PADCTL_DSE(value);
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/* Select spped */
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value = (ioset & IOMUX_SPEED_MASK) >> IOMUX_SPEED_SHIFT;
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regval |= PADCTL_SPEED(value);
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/* Select CMOS output or Open Drain outpout */
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if ((ioset & IOMUX_OPENDRAIN) != 0)
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{
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regval |= PADCTL_ODE;
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}
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/* Handle pull/keep selection */
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switch (ioset & _IOMUX_PULLTYPE_MASK)
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{
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default:
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case _IOMUX_PULL_NONE:
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break;
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case _IOMUX_PULL_KEEP:
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{
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regval |= PADCTL_PKE;
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}
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break;
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case _IOMUX_PULL_ENABLE:
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{
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regval |= (PADCTL_PKE | PADCTL_PUE);
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value = (ioset & _IOMUX_PULLDESC_MASK) >> _IOMUX_PULLDESC_SHIFT;
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regval |= PADCTL_PUS(value);
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}
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break;
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}
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/* Select slow/fast slew rate */
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if ((ioset & IOMUX_SLEW_FAST) != 0)
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{
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regval |= PADCTL_HYS;
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}
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/* Write the result to the specified Pad Control register */
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putreg32(regval, padctl);
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return OK;
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}
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@ -49,6 +49,88 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* 16-bit Encoding:
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*
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* .... RRRR ODDD LSST
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*/
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/* Output Pull Up/Down:
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*
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* .... RRRR .... ....
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*/
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#define _IOMUX_PULLTYPE_SHIFT (8) /* Bits 8-9: Pull up/down type */
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#define _IOMUX_PULLTYPE_MASK (3 << _IOMUX_PULLTYPE_SHIFT)
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# define _IOMUX_PULL_NONE (0 << _IOMUX_PULLTYPE_SHIFT) /* Pull/keeper disabled */
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# define _IOMUX_PULL_KEEP (1 << _IOMUX_PULLTYPE_SHIFT) /* Output determined by keeper */
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# define _IOMUX_PULL_ENABLE (2 << _IOMUX_PULLTYPE_SHIFT) /* Output pulled up or down */
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#define _IOMUX_PULLDESC_SHIFT (10) /* Bits 10-11: Pull up/down description */
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#define _IOMUX_PULLDESC_MASK (3 << _IOMUX_PULLDESC_SHIFT)
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# define _IOMUX_PULL_UP_22K (PULL_UP_22K << _IOMUX_PULLDESC_SHIFT) /* Pull up with 22 KOhm resister */
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# define _IOMUX_PULL_UP_47K (PULL_UP_47K << _IOMUX_PULLDESC_SHIFT) /* Pull up with 47 KOhm resister */
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# define _IOMUX_PULL_UP_100K (PULL_UP_100K << _IOMUX_PULLDESC_SHIFT) /* Pull up with 100 KOhm resister */
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# define _IOMUX_PULL_DOWN_100K (PULL_DOWN_100K << _IOMUX_PULLDESC_SHIFT) /* Pull down with 100 KOhm resister */
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#define IOMUX_PULL_SHIFT (8) /* Bits 8-11: Pull up/down selection */
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#define IOMUX_PULL_MASK (15 << IOMUX_PULL_SHIFT)
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# define IOMUX_PULL_NONE _IOMUX_PULL_NONE
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# define IOMUX_PULL_KEEP _IOMUX_PULL_KEEP
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# define IOMUX_PULL_UP_22K (_IOMUX_PULL_ENABLE | _IOMUX_PULL_UP_22K)
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# define IOMUX_PULL_UP_47K (_IOMUX_PULL_ENABLE | _IOMUX_PULL_UP_47K)
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# define IOMUX_PULL_UP_100K (_IOMUX_PULL_ENABLE | _IOMUX_PULL_UP_100K)
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# define IOMUX_PULL_DOWN_100K (_IOMUX_PULL_ENABLE | _IOMUX_PULL_DOWN_100K)
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/* Open Drain Output:
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*
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* .... .... O... ....
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*/
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#define IOMUX_CMOS_OUTPUT (1 << 7) /* Bit 7: 0=CMOS output */
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#define IOMUX_OPENDRAIN (1 << 7) /* Bit 7: 1=Enable open-drain output */
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/* Output Drive Strength:
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*
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* .... .... .DDD ....
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*/
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#define IOMUX_DRIVE_SHIFT (4) /* Bits 4-6: Output Drive Strength */
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#define IOMUX_DRIVE_MASK (7 << IOMUX_DRIVE_SHIFT)
|
||||
# define IOMUX_DRIVE_HIZ (DRIVE_HIZ << IOMUX_DRIVE_SHIFT) /* HI-Z */
|
||||
# define IOMUX_DRIVE_260OHM (DRIVE_260OHM << IOMUX_DRIVE_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_130OHM (DRIVE_130OHM << IOMUX_DRIVE_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_90OHM (DRIVE_90OHM << IOMUX_DRIVE_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_60OHM (DRIVE_60OHM << IOMUX_DRIVE_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_50OHM (DRIVE_50OHM << IOMUX_DRIVE_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_40OHM (DRIVE_40OHM << IOMUX_DRIVE_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
|
||||
# define IOMUX_DRIVE_33OHM (DRIVE_33OHM << IOMUX_DRIVE_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
|
||||
|
||||
/* Output Slew Rate:
|
||||
*
|
||||
* .... .... .... L...
|
||||
*/
|
||||
|
||||
#define IOMUX_SLEW_SLOW (0) /* Bit 3: 0=Slow Slew Rate */
|
||||
#define IOMUX_SLEW_FAST (1 << 3) /* Bit 3: 1=Fast Slew Rate */
|
||||
|
||||
/* Output Speed:
|
||||
*
|
||||
* .... .... .... .SS.
|
||||
*/
|
||||
|
||||
#define IOMUX_SPEED_SHIFT (2) /* Bits 2-3: Speed */
|
||||
#define IOMUX_SPEED_MASK (3 << IOMUX_SPEED_SHIFT)
|
||||
# define IOMUX_SPEED_LOW (SPEED_LOW << IOMUX_SPEED_SHIFT) /* Low frequency (50 MHz) */
|
||||
# define IOMUX_SPEED_MEDIUM (SPEED_MEDIUM << IOMUX_SPEED_SHIFT) /* Medium frequency (100, 150 MHz) */
|
||||
# define IOMUX_SPEED_MAX (SPEED_MAX << IOMUX_SPEED_SHIFT) /* Maximum frequency (100, 150, 200 MHz) */
|
||||
|
||||
/* Input Schmitt Trigger:
|
||||
*
|
||||
* .... .... .... ...T
|
||||
*/
|
||||
|
||||
#define IOMUX_CMOS_INPUT (0) /* Bit 0: 0=CMOS input */
|
||||
#define IOMUX_SCHMITT_TRIGGER (1 << 0) /* Bit 0: 1=Enable Schmitt trigger if input */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
|
||||
Loading…
Reference in New Issue
Block a user