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arm/src/kinetis: Correct some Ethernet PHY register bit tests for the KSZ8081 PHY.

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Stewart 2018-02-01 07:24:36 -06:00 committed by Gregory Nutt
parent d87b54099a
commit be81893b55
2 changed files with 9 additions and 5 deletions
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12
arch/arm/src/kinetis/kinetis_enet.c
View File

@ -158,19 +158,21 @@
# define BOARD_PHYID1 MII_PHYID1_KSZ8041 # define BOARD_PHYID1 MII_PHYID1_KSZ8041
# define BOARD_PHYID2 MII_PHYID2_KSZ8041 # define BOARD_PHYID2 MII_PHYID2_KSZ8041
# define BOARD_PHY_STATUS MII_KSZ8041_PHYCTRL2 # define BOARD_PHY_STATUS MII_KSZ8041_PHYCTRL2
# define BOARD_PHY_10BASET(s) (((s) & MII_PHYCTRL2_MODE_10HDX) != 0)
# define BOARD_PHY_100BASET(s) (((s) & MII_PHYCTRL2_MODE_100HDX) != 0)
# define BOARD_PHY_ISDUPLEX(s) (((s) & MII_PHYCTRL2_MODE_DUPLEX) != 0)
#elif defined(CONFIG_ETH0_PHY_KSZ8081) #elif defined(CONFIG_ETH0_PHY_KSZ8081)
# define BOARD_PHY_NAME "KSZ8081" # define BOARD_PHY_NAME "KSZ8081"
# define BOARD_PHYID1 MII_PHYID1_KSZ8081 # define BOARD_PHYID1 MII_PHYID1_KSZ8081
# define BOARD_PHYID2 MII_PHYID2_KSZ8081 # define BOARD_PHYID2 MII_PHYID2_KSZ8081
# define BOARD_PHY_STATUS MII_KSZ8081_PHYCTRL2 # define BOARD_PHY_STATUS MII_KSZ8081_PHYCTRL1
# define BOARD_PHY_10BASET(s) (((s) & MII_PHYCTRL1_MODE_10HDX) != 0)
# define BOARD_PHY_100BASET(s) (((s) & MII_PHYCTRL1_MODE_100HDX) != 0)
# define BOARD_PHY_ISDUPLEX(s) (((s) & MII_PHYCTRL1_MODE_DUPLEX) != 0)
#else #else
# error "Unrecognized or missing PHY selection" # error "Unrecognized or missing PHY selection"
#endif #endif
#define BOARD_PHY_10BASET(s) (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
#define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
#define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
/* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz, /* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz,
based on the internal module (ENET) clock: based on the internal module (ENET) clock:
* *

2
include/nuttx/net/mii.h
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@ -583,6 +583,7 @@
# define MII_PHYCTRL2_MODE_BUSY (0 << MII_PHYCTRL2_MODE_SHIFT) /* Still in autonegotiation */ # define MII_PHYCTRL2_MODE_BUSY (0 << MII_PHYCTRL2_MODE_SHIFT) /* Still in autonegotiation */
# define MII_PHYCTRL2_MODE_10HDX (1 << MII_PHYCTRL2_MODE_SHIFT) /* 10Base-T half-duplex */ # define MII_PHYCTRL2_MODE_10HDX (1 << MII_PHYCTRL2_MODE_SHIFT) /* 10Base-T half-duplex */
# define MII_PHYCTRL2_MODE_100HDX (2 << MII_PHYCTRL2_MODE_SHIFT) /* 100Base-T half-duplex */ # define MII_PHYCTRL2_MODE_100HDX (2 << MII_PHYCTRL2_MODE_SHIFT) /* 100Base-T half-duplex */
# define MII_PHYCTRL2_MODE_DUPLEX (4 << MII_PHYCTRL2_MODE_SHIFT) /* Full duplex */
# define MII_PHYCTRL2_MODE_10FDX (5 << MII_PHYCTRL2_MODE_SHIFT) /* 10Base-T full-duplex */ # define MII_PHYCTRL2_MODE_10FDX (5 << MII_PHYCTRL2_MODE_SHIFT) /* 10Base-T full-duplex */
# define MII_PHYCTRL2_MODE_100FDX (6 << MII_PHYCTRL2_MODE_SHIFT) /* 100Base-T full-duplex */ # define MII_PHYCTRL2_MODE_100FDX (6 << MII_PHYCTRL2_MODE_SHIFT) /* 100Base-T full-duplex */
#define MII_PHYCTRL2_SEQTEST (1 << 1) /* Bit 1: Enable SQE test */ #define MII_PHYCTRL2_SEQTEST (1 << 1) /* Bit 1: Enable SQE test */
@ -602,6 +603,7 @@
# define MII_PHYCTRL1_MODE_BUSY (0 << MII_PHYCTRL1_MODE_SHIFT) /* Still in autonegotiation */ # define MII_PHYCTRL1_MODE_BUSY (0 << MII_PHYCTRL1_MODE_SHIFT) /* Still in autonegotiation */
# define MII_PHYCTRL1_MODE_10HDX (1 << MII_PHYCTRL1_MODE_SHIFT) /* 10Base-T half-duplex */ # define MII_PHYCTRL1_MODE_10HDX (1 << MII_PHYCTRL1_MODE_SHIFT) /* 10Base-T half-duplex */
# define MII_PHYCTRL1_MODE_100HDX (2 << MII_PHYCTRL1_MODE_SHIFT) /* 100Base-T half-duplex */ # define MII_PHYCTRL1_MODE_100HDX (2 << MII_PHYCTRL1_MODE_SHIFT) /* 100Base-T half-duplex */
# define MII_PHYCTRL1_MODE_DUPLEX (4 << MII_PHYCTRL1_MODE_SHIFT) /* Full duplex */
# define MII_PHYCTRL1_MODE_10FDX (5 << MII_PHYCTRL1_MODE_SHIFT) /* 10Base-T full-duplex */ # define MII_PHYCTRL1_MODE_10FDX (5 << MII_PHYCTRL1_MODE_SHIFT) /* 10Base-T full-duplex */
# define MII_PHYCTRL1_MODE_100FDX (6 << MII_PHYCTRL1_MODE_SHIFT) /* 100Base-T full-duplex */ # define MII_PHYCTRL1_MODE_100FDX (6 << MII_PHYCTRL1_MODE_SHIFT) /* 100Base-T full-duplex */