diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index b70a689f4a..50e66ea705 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -401,10 +401,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(KINETIS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(KINETIS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   kinetis_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  kinetis_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/lpc2378/lpc23xx_io.c b/arch/arm/src/lpc2378/lpc23xx_io.c
index 8dd17f8d36..94e7f99c54 100644
--- a/arch/arm/src/lpc2378/lpc23xx_io.c
+++ b/arch/arm/src/lpc2378/lpc23xx_io.c
@@ -53,11 +53,11 @@
  ****************************************************************************/
 
 /****************************************************************************
-* Name: IO_Init()
-*
-* Descriptions: Initialize the target board before running the main()
-*
-************************************************************************/
+ * Name: IO_Init()
+ *
+ * Descriptions: Initialize the target board before running the main()
+ *
+ ****************************************************************************/
 
 void IO_Init(void)
 {
diff --git a/arch/arm/src/lpc31xx/lpc31_spi.c b/arch/arm/src/lpc31xx/lpc31_spi.c
index 6b64863d05..3556b3597c 100644
--- a/arch/arm/src/lpc31xx/lpc31_spi.c
+++ b/arch/arm/src/lpc31xx/lpc31_spi.c
@@ -606,7 +606,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
   uint16_t setbits;
   uint16_t clrbits;
 
-/* Has the mode changed? */
+  /* Has the mode changed? */
 
   if (mode != priv->mode)
     {
diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c
index aec78c7b5a..c36c87f9c0 100644
--- a/arch/arm/src/lpc43xx/lpc43_ethernet.c
+++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c
@@ -2975,7 +2975,8 @@ static int lpc43_ioctl(struct net_driver_s *dev, int cmd, long arg)
  * Function: lpc43_phyintenable
  *
  * Description:
-*  Enable link up/down PHY interrupts.  The interrupt protocol is like this:
+ *  Enable link up/down PHY interrupts.  The interrupt protocol is like
+ *  this:
  *
  *  - Interrupt status is cleared when the interrupt is enabled.
  *  - Interrupt occurs.  Interrupt is disabled (at the processor level) when
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index bb78263abd..c8178474a4 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -376,10 +376,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(LPC43_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(LPC43_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   lpc43_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  lpc43_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index efc2ad38f5..54ba87ff88 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -437,10 +437,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index 772a2b2550..928a7d3b73 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -437,10 +437,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index 0013a2e622..ba51754330 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -384,10 +384,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index 15a690068d..bbab860e0e 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -471,10 +471,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/tiva/tiva_gpio.c b/arch/arm/src/tiva/tiva_gpio.c
index 112e6b33d9..4291d0b67a 100644
--- a/arch/arm/src/tiva/tiva_gpio.c
+++ b/arch/arm/src/tiva/tiva_gpio.c
@@ -461,7 +461,7 @@ static inline void tiva_gpiopadstrength(uint32_t base, uint32_t pin,
   modifyreg32(base + TIVA_GPIO_SLR_OFFSET,  slrclr,  slrset);
 
 #ifdef CONFIG_ARCH_CHIP_TM4C129
-/* TODO: Add TM4C129 registers (TIVA_GPIO_DR12R) */
+  /* TODO: Add TM4C129 registers (TIVA_GPIO_DR12R) */
 #  if 0
   /* Set the 12-mA drive select register.  This register only appears in
    * TM4E111 and later device classes, but is a harmless write on older
diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c
index d399f8ac03..a1434e307b 100644
--- a/arch/arm/src/tiva/tiva_irq.c
+++ b/arch/arm/src/tiva/tiva_irq.c
@@ -455,10 +455,10 @@ void up_irqinitialize(void)
   /* Set the priority of the SVCall interrupt */
 
 #ifdef CONFIG_ARCH_IRQPRIO
-/* up_prioritize_irq(TIVA_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
+  /* up_prioritize_irq(TIVA_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   tiva_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+  tiva_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management