Add SPI, I2C, RTC, and watchdog
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1684 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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bf1a49a064
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************************************************************************************/
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#include "imx_memorymap.h"
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#include "imx_wdog.h"
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#include "imx_timer.h"
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#include "imx_rtc.h"
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#include "imx_uart.h"
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#include "imx_dma.h"
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#include "imx_usbd.h"
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#include "imx_i2c.h"
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#include "imx_cspi.h"
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#include "imx_aitc.h"
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/************************************************************************************
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* Definitions
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88
arch/arm/src/imx/imx_cspi.h
Executable file
88
arch/arm/src/imx/imx_cspi.h
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/************************************************************************************
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* arch/arm/src/imx/imx_cspi.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_CSPI_H
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#define __ARCH_ARM_IMX_CSPI_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* CSPI Register Offsets ************************************************************/
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#define CSPI_SPIRXD_OFFSET 0x0000
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#define CSPI_SPITXD_OFFSET 0x0004
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#define CSPI_SPICONT1_OFFSET 0x0008
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#define CSPI_INTCS_OFFSET 0x000c
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#define CSPI_SPITEST_OFFSET 0x0010
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#define CSPI_SPISPCR_OFFSET 0x0014
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#define CSPI_SPIDMA_OFFSET 0x0018
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#define CSPI_SPIRESET_OFFSET 0x001c
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/* CSPI Register Addresses **********************************************************/
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/* CSPI1 */
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#define IMX_CSPI1_SPIRXD (IMX_CSPI1_VBASE + CSPI_SPIRXD_OFFSET)
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#define IMX_CSPI1_SPITXD (IMX_CSPI1_VBASE + CSPI_SPITXD_OFFSET)
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#define IMX_CSPI1_SPICONT1 (IMX_CSPI1_VBASE + CSPI_SPICONT1_OFFSET)
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#define IMX_CSPI1_INTCS (IMX_CSPI1_VBASE + CSPI_INTCS_OFFSET)
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#define IMX_CSPI1_SPITEST (IMX_CSPI1_VBASE + CSPI_SPITEST_OFFSET)
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#define IMX_CSPI1_SPISPCR (IMX_CSPI1_VBASE + CSPI_SPISPCR_OFFSET)
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#define IMX_CSPI1_SPIDMA (IMX_CSPI1_VBASE + CSPI_SPIDMA_OFFSET)
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#define IMX_CSPI1_SPIRESET (IMX_CSPI1_VBASE + CSPI_SPIRESET_OFFSET)
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/* CSPI1 */
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#define IMX_CSPI2_SPIRXD (IMX_CSPI2_VBASE + CSPI_SPIRXD_OFFSET)
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#define IMX_CSPI2_SPITXD (IMX_CSPI2_VBASE + CSPI_SPITXD_OFFSET)
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#define IMX_CSPI2_SPICONT1 (IMX_CSPI2_VBASE + CSPI_SPICONT1_OFFSET)
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#define IMX_CSPI2_INTCS (IMX_CSPI2_VBASE + CSPI_INTCS_OFFSET)
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#define IMX_CSPI2_SPITEST (IMX_CSPI2_VBASE + CSPI_SPITEST_OFFSET)
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#define IMX_CSPI2_SPISPCR (IMX_CSPI2_VBASE + CSPI_SPISPCR_OFFSET)
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#define IMX_CSPI2_SPIDMA (IMX_CSPI2_VBASE + CSPI_SPIDMA_OFFSET)
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#define IMX_CSPI2_SPIRESET (IMX_CSPI2_VBASE + CSPI_SPIRESET_OFFSET)
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/* CSPI Register Bit Definitions ****************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_CSPI_H */
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69
arch/arm/src/imx/imx_i2c.h
Executable file
69
arch/arm/src/imx/imx_i2c.h
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/************************************************************************************
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* arch/arm/src/imx/imx_i2c.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_I2C_H
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#define __ARCH_ARM_IMX_I2C_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* I2C Register Offsets *************************************************************/
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#define I2C_IADR_OFFSET 0x0000
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#define I2C_IFDR_OFFSET 0x0004
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#define I2C_I2CR_OFFSET 0x0008
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#define I2C_I2SR_OFFSET 0x000c
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#define I2C_I2DR_OFFSET 0x0010
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/* I2C Register Addresses ***********************************************************/
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#define IMX_I2C_IADR (IMX_I2C_VBASE + I2C_IADR_OFFSET)
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#define IMX_I2C_IFDR (IMX_I2C_VBASE + I2C_IFDR_OFFSET)
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#define IMX_I2C_I2CR (IMX_I2C_VBASE + I2C_I2CR_OFFSET)
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#define IMX_I2C_I2SR (IMX_I2C_VBASE + I2C_I2SR_OFFSET)
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#define IMX_I2C_I2DR (IMX_I2C_VBASE + I2C_I2DR_OFFSET)
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/* I2C Register Bit Definitions *****************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_I2C_H */
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85
arch/arm/src/imx/imx_rtc.h
Executable file
85
arch/arm/src/imx/imx_rtc.h
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/************************************************************************************
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* arch/arm/src/imx/imx_rtc.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_RTC_H
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#define __ARCH_ARM_IMX_RTC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* RTC Register Offsets *************************************************************/
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#define RTC_HOURMIN_OFFSET 0x0000
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#define RTC_SECOND_OFFSET 0x0004
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#define RTC_ALRM_HM_OFFSET 0x0008
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#define RTC_ALRM_SEC_OFFSET 0x000c
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#define RTC_RTCCTL_OFFSET 0x0010
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#define RTC_RTCISR_OFFSET 0x0014
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#define RTC_RTCIENR_OFFSET 0x0018
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#define RTC_STPWCH_OFFSET 0x001c
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#define RTC_DAYR_OFFSET 0x0020
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#define RTC_DAYALARM_OFFSET 0x0024
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#define RTC_TEST1_OFFSET 0x0028
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#define RTC_TEST2_OFFSET 0x002c
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#define RTC_TEST3_OFFSET 0x0030
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/* RTC Register Addresses ***********************************************************/
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#define IMX_RTC_HOURMIN (IMX_RTC_VBASE + RTC_HOURMIN_OFFSET)
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#define IMX_RTC_SECOND (IMX_RTC_VBASE + RTC_SECOND_OFFSET)
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#define IMX_RTC_ALRM_HM (IMX_RTC_VBASE + RTC_ALRM_HM_OFFSET)
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#define IMX_RTC_ALRM_SEC (IMX_RTC_VBASE + RTC_ALRM_SEC_OFFSET)
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#define IMX_RTC_RTCCTL (IMX_RTC_VBASE + RTC_RTCCTL_OFFSET)
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#define IMX_RTC_RTCISR (IMX_RTC_VBASE + RTC_RTCISR_OFFSET)
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#define IMX_RTC_RTCIENR (IMX_RTC_VBASE + RTC_RTCIENR_OFFSET)
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#define IMX_RTC_STPWCH (IMX_RTC_VBASE + RTC_STPWCH_OFFSET)
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#define IMX_RTC_DAYR (IMX_RTC_VBASE + RTC_DAYR_OFFSET)
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#define IMX_RTC_DAYALARM (IMX_RTC_VBASE + RTC_DAYALARM_OFFSET)
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#define IMX_RTC_TEST1 (IMX_RTC_VBASE + RTC_TEST1_OFFSET)
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#define IMX_RTC_TEST2 (IMX_RTC_VBASE + RTC_TEST2_OFFSET)
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#define IMX_RTC_TEST3 (IMX_RTC_VBASE + RTC_TEST3_OFFSET)
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/* RTC Register Bit Definitions *****************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_RTC_H */
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arch/arm/src/imx/imx_wdog.h
Executable file
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arch/arm/src/imx/imx_wdog.h
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/************************************************************************************
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* arch/arm/src/imx/imx_wdog.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_WDOG_H
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#define __ARCH_ARM_IMX_WDOG_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* WDOG Register Offsets ************************************************************/
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#define WDOG_WCR_OFFSET 0x0000 /* Watchdog Control Register */
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#define WDOG_WSR_OFFSET 0x0004 /* Watchdog Service Register */
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#define WDOG_WSTR_OFFSET 0x0008 /* Watchdog Status Register */
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/* WDOG Register Addresses **********************************************************/
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#define IMX_WDOG_WCR (IMX_WDOG_VBASE + WDOG_WCR_OFFSET)
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#define IMX_WDOG_WSR (IMX_WDOG_VBASE + WDOG_WSR_OFFSET)
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#define IMX_WDOG_WSTRT (IMX_WDOG_VBASE + WDOG_WSTR_OFFSET)
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/* WDOG Register Bit Definitions ****************************************************/
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/* Watchdog Control Register */
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#define WDOG_WCR_WDE (1 << 0) /* Bit 0: Watchdog Enable */
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#define WDOG_WCR_WDEC (1 << 1) /* Bit 1: Watchdog Enable Control */
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#define WDOG_WCR_SWR (1 << 2) /* Bit 2: Software Reset Enable */
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#define WDOG_WCR_TMD (1 << 3) /* Bit 3: Test Mode Enable */
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#define WDOG_WCR_WIE (1 << 4) /* Bit 4: Watchdog Interrupt Enable */
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#define WDOG_WCR_WT_SHIFT 8 /* Bit 8-14: Watchdog Timeout */
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#define WDOG_WCR_WT_MASK (0x7f << WDOG_WCR_WT_SHIFT)
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#define WDOG_WCR_WHALT (1 << 15) /* Bit 15: Watchdog Halt */
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/* Watchdog Service Register */
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#define WDOG_WSR_SHIFT 0 /* Bit 0-15: Watchdog Service Register */
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#define WDOG_WT_MASK (0xffff << WDOG_WSR_SHIFT)
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_WDOG_H */
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