configs/z8f64200100kit/ostest at same level as ez80 configurations; nuttx/arch/arm/src/lpc17xx/lpc17_i2c.cuninitialization fix
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5392 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
5b81a279ca
commit
bf4bee0b1e
@ -67,7 +67,6 @@
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#include "up_internal.h"
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#include "os_internal.h"
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#include "lpc17_internal.h"
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#include "lpc17_syscon.h"
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#include "lpc17_pinconn.h"
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@ -79,12 +78,15 @@
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1
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#endif
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#ifndef CONFIG_I2C0_FREQ
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#define CONFIG_I2C0_FREQ 100000
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#endif
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#ifndef CONFIG_I2C1_FREQ
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#define CONFIG_I2C1_FREQ 100000
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#endif
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#ifndef CONFIG_I2C2_FREQ
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#define CONFIG_I2C2_FREQ 100000
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#endif
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@ -93,44 +95,46 @@
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* Definitions
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*******************************************************************************/
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/****************************************************************************
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/*******************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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*******************************************************************************/
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#define I2C_TIMEOUT ((20 * CLK_TCK) / 1000) /* 20 mS */
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/****************************************************************************
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/*******************************************************************************
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* Private Data
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****************************************************************************/
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*******************************************************************************/
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struct lpc17_i2cdev_s
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{
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struct i2c_dev_s dev; /* Generic I2C device */
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struct i2c_msg_s msg; /* a single message for legacy read/write */
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unsigned int base; /* Base address of registers */
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uint16_t irqid; /* IRQ for this device */
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struct i2c_dev_s dev; /* Generic I2C device */
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struct i2c_msg_s msg; /* a single message for legacy read/write */
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unsigned int base; /* Base address of registers */
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uint16_t irqid; /* IRQ for this device */
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sem_t mutex; /* Only one thread can access at a time */
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sem_t wait; /* Place to wait for state machine completion */
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volatile uint8_t state; /* State of state machine */
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WDOG_ID timeout; /* watchdog to timeout when bus hung */
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sem_t mutex; /* Only one thread can access at a time */
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sem_t wait; /* Place to wait for state machine completion */
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volatile uint8_t state; /* State of state machine */
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WDOG_ID timeout; /* watchdog to timeout when bus hung */
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uint16_t wrcnt; /* number of bytes sent to tx fifo */
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uint16_t rdcnt; /* number of bytes read from rx fifo */
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uint16_t wrcnt; /* number of bytes sent to tx fifo */
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uint16_t rdcnt; /* number of bytes read from rx fifo */
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};
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static struct lpc17_i2cdev_s i2cdevices[3];
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/****************************************************************************
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/*******************************************************************************
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* Private Functions
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****************************************************************************/
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static int i2c_start (struct lpc17_i2cdev_s *priv);
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static void i2c_stop (struct lpc17_i2cdev_s *priv);
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static int i2c_interrupt (int irq, FAR void *context);
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static void i2c_timeout (int argc, uint32_t arg, ...);
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*******************************************************************************/
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/****************************************************************************
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static int i2c_start(struct lpc17_i2cdev_s *priv);
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static void i2c_stop(struct lpc17_i2cdev_s *priv);
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static int i2c_interrupt(int irq, FAR void *context);
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static void i2c_timeout(int argc, uint32_t arg, ...);
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/*******************************************************************************
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* I2C device operations
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****************************************************************************/
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*******************************************************************************/
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static uint32_t i2c_setfrequency(FAR struct i2c_dev_s *dev, uint32_t frequency);
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static int i2c_setaddress(FAR struct i2c_dev_s *dev, int addr, int nbits);
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@ -140,12 +144,12 @@ static int i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
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struct i2c_ops_s lpc17_i2c_ops =
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{
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.setfrequency = i2c_setfrequency,
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.setaddress = i2c_setaddress,
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.write = i2c_write,
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.read = i2c_read,
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.setfrequency = i2c_setfrequency,
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.setaddress = i2c_setaddress,
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.write = i2c_write,
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.read = i2c_read,
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#ifdef CONFIG_I2C_TRANSFER
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.transfer = i2c_transfer
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.transfer = i2c_transfer
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#endif
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};
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@ -159,23 +163,26 @@ struct i2c_ops_s lpc17_i2c_ops =
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static uint32_t i2c_setfrequency(FAR struct i2c_dev_s *dev, uint32_t frequency)
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{
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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if (frequency > 100000)
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if (frequency > 100000)
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{
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/* asymetric per 400Khz I2C spec */
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putreg32 ( LPC17_CCLK / (83 + 47) * 47 / frequency, priv->base + LPC17_I2C_SCLH_OFFSET);
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putreg32 ( LPC17_CCLK / (83 + 47) * 83 / frequency, priv->base + LPC17_I2C_SCLL_OFFSET);
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/* asymetric per 400Khz I2C spec */
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putreg32(LPC17_CCLK / (83 + 47) * 47 / frequency, priv->base + LPC17_I2C_SCLH_OFFSET);
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putreg32(LPC17_CCLK / (83 + 47) * 83 / frequency, priv->base + LPC17_I2C_SCLL_OFFSET);
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}
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else
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else
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{
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/* 50/50 mark space ratio */
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putreg32 (LPC17_CCLK / 100 * 50 / frequency, priv->base + LPC17_I2C_SCLH_OFFSET);
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putreg32 (LPC17_CCLK / 100 * 50 / frequency, priv->base + LPC17_I2C_SCLL_OFFSET);
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/* 50/50 mark space ratio */
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putreg32(LPC17_CCLK / 100 * 50 / frequency, priv->base + LPC17_I2C_SCLH_OFFSET);
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putreg32(LPC17_CCLK / 100 * 50 / frequency, priv->base + LPC17_I2C_SCLL_OFFSET);
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}
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/* FIXME: This function should return the actual selected frequency */
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return frequency;
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/* FIXME: This function should return the actual selected frequency */
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return frequency;
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}
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/*******************************************************************************
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@ -185,17 +192,18 @@ static uint32_t i2c_setfrequency(FAR struct i2c_dev_s *dev, uint32_t frequency)
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* Set the I2C slave address for a subsequent read/write
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*
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*******************************************************************************/
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static int i2c_setaddress(FAR struct i2c_dev_s *dev, int addr, int nbits)
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{
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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DEBUGASSERT(dev != NULL);
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DEBUGASSERT(nbits == 7 );
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DEBUGASSERT(dev != NULL);
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DEBUGASSERT(nbits == 7 );
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priv->msg.addr = addr<<1;
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priv->msg.flags = 0 ;
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priv->msg.addr = addr<<1;
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priv->msg.flags = 0 ;
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return OK;
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return OK;
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}
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/*******************************************************************************
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@ -206,22 +214,23 @@ static int i2c_setaddress(FAR struct i2c_dev_s *dev, int addr, int nbits)
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* frequency and slave address.
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*
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*******************************************************************************/
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static int i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer, int buflen)
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{
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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int ret;
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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int ret;
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DEBUGASSERT (dev != NULL);
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DEBUGASSERT(dev != NULL);
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priv->wrcnt=0;
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priv->rdcnt=0;
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priv->msg.addr &= ~0x01;
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priv->msg.buffer = (uint8_t*)buffer;
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priv->msg.length = buflen;
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ret = i2c_start (priv);
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priv->wrcnt = 0;
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priv->rdcnt = 0;
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priv->msg.addr &= ~0x01;
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priv->msg.buffer = (uint8_t*)buffer;
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priv->msg.length = buflen;
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ret = i2c_start(priv);
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return ret >0 ? OK : -ETIMEDOUT;
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return ret > 0 ? OK : -ETIMEDOUT;
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}
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/*******************************************************************************
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@ -232,22 +241,23 @@ static int i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer, int bufle
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* frequency and slave address.
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*
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*******************************************************************************/
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static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
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{
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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int ret;
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
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int ret;
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DEBUGASSERT (dev != NULL);
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DEBUGASSERT(dev != NULL);
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priv->wrcnt=0;
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priv->rdcnt=0;
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priv->msg.addr |= 0x01;
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priv->msg.buffer = buffer;
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priv->msg.length = buflen;
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priv->wrcnt = 0;
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priv->rdcnt = 0;
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priv->msg.addr |= 0x01;
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priv->msg.buffer = buffer;
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priv->msg.length = buflen;
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ret = i2c_start (priv);
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ret = i2c_start(priv);
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return ret >0 ? OK : -ETIMEDOUT;
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return ret > 0 ? OK : -ETIMEDOUT;
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}
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/*******************************************************************************
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@ -257,24 +267,31 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
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* Perform a I2C transfer start
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*
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*******************************************************************************/
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static int i2c_start (struct lpc17_i2cdev_s *priv)
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static int i2c_start(struct lpc17_i2cdev_s *priv)
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{
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int ret=-1;
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sem_wait (&priv->mutex);
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int ret = -1;
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putreg32(I2C_CONCLR_STAC|I2C_CONCLR_SIC,priv->base+LPC17_I2C_CONCLR_OFFSET);
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putreg32(I2C_CONSET_STA,priv->base+LPC17_I2C_CONSET_OFFSET);
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sem_wait(&priv->mutex);
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wd_start (priv->timeout, I2C_TIMEOUT, i2c_timeout, 1, (uint32_t)priv);
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sem_wait(&priv->wait);
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wd_cancel (priv->timeout);
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sem_post (&priv->mutex);
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putreg32(I2C_CONCLR_STAC|I2C_CONCLR_SIC, priv->base+LPC17_I2C_CONCLR_OFFSET);
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putreg32(I2C_CONSET_STA, priv->base+LPC17_I2C_CONSET_OFFSET);
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if( priv-> state == 0x18 || priv->state == 0x28)
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ret=priv->wrcnt;
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else if( priv-> state == 0x50 || priv->state == 0x58)
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ret=priv->rdcnt;
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return ret;
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wd_start(priv->timeout, I2C_TIMEOUT, i2c_timeout, 1, (uint32_t)priv);
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sem_wait(&priv->wait);
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wd_cancel(priv->timeout);
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sem_post(&priv->mutex);
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if (priv-> state == 0x18 || priv->state == 0x28)
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{
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ret = priv->wrcnt;
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}
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else if (priv-> state == 0x50 || priv->state == 0x58)
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{
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ret = priv->rdcnt;
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}
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return ret;
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}
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/*******************************************************************************
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@ -284,11 +301,15 @@ static int i2c_start (struct lpc17_i2cdev_s *priv)
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* Perform a I2C transfer stop
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*
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*******************************************************************************/
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static void i2c_stop (struct lpc17_i2cdev_s *priv)
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static void i2c_stop(struct lpc17_i2cdev_s *priv)
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{
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if(priv->state!=0x38)
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putreg32(I2C_CONSET_STO|I2C_CONSET_AA,priv->base+LPC17_I2C_CONSET_OFFSET);
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sem_post (&priv->wait);
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if (priv->state != 0x38)
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{
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putreg32(I2C_CONSET_STO|I2C_CONSET_AA,priv->base+LPC17_I2C_CONSET_OFFSET);
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}
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sem_post(&priv->wait);
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}
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/*******************************************************************************
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@ -299,14 +320,14 @@ static void i2c_stop (struct lpc17_i2cdev_s *priv)
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*
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*******************************************************************************/
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static void i2c_timeout (int argc, uint32_t arg, ...)
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static void i2c_timeout(int argc, uint32_t arg, ...)
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{
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) arg;
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struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) arg;
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irqstate_t flags = irqsave();
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priv->state = 0xff;
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sem_post (&priv->wait);
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irqrestore (flags);
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irqstate_t flags = irqsave();
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priv->state = 0xff;
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sem_post(&priv->wait);
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irqrestore(flags);
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}
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/*******************************************************************************
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@ -317,90 +338,109 @@ static void i2c_timeout (int argc, uint32_t arg, ...)
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*
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*******************************************************************************/
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static int i2c_interrupt (int irq, FAR void *context)
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static int i2c_interrupt(int irq, FAR void *context)
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{
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struct lpc17_i2cdev_s *priv;
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struct lpc17_i2cdev_s *priv;
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uint32_t state;
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#ifdef CONFIG_LPC17_I2C0
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if (irq == LPC17_IRQ_I2C0)
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if (irq == LPC17_IRQ_I2C0)
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{
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priv=&i2cdevices[0];
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priv=&i2cdevices[0];
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}
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else
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else
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#endif
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#ifdef CONFIG_LPC17_I2C1
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if (irq == LPC17_IRQ_I2C1)
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if (irq == LPC17_IRQ_I2C1)
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{
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priv=&i2cdevices[1];
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priv=&i2cdevices[1];
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}
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else
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else
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#endif
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#ifdef CONFIG_LPC17_I2C2
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if (irq == LPC17_IRQ_I2C2)
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if (irq == LPC17_IRQ_I2C2)
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{
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priv=&i2cdevices[2];
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priv=&i2cdevices[2];
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}
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else
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#endif
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{
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PANIC(OSERR_INTERNAL);
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}
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/*
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* refrence UM10360 19.10.5
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*/
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uint32_t state = getreg32(priv->base+LPC17_I2C_STAT_OFFSET);
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putreg32(I2C_CONCLR_SIC,priv->base+LPC17_I2C_CONCLR_OFFSET);
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priv->state=state;
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state &=0xf8;
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switch (state)
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{
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case 0x00: //Bus Error
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case 0x20:
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case 0x30:
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case 0x38:
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case 0x48:
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i2c_stop(priv);
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break;
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case 0x08: //START
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case 0x10: //Repeat START
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putreg32(priv->msg.addr,priv->base+LPC17_I2C_DAT_OFFSET);
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putreg32(I2C_CONCLR_STAC,priv->base+LPC17_I2C_CONCLR_OFFSET);
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break;
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case 0x18:
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priv->wrcnt=0;
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putreg32(priv->msg.buffer[0],priv->base+LPC17_I2C_DAT_OFFSET);
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break;
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case 0x28:
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priv->wrcnt++;
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if(priv->wrcnt<priv->msg.length)
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putreg32(priv->msg.buffer[priv->wrcnt],priv->base+LPC17_I2C_DAT_OFFSET);
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else
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i2c_stop(priv);
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break;
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case 0x40:
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priv->rdcnt=-1;
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putreg32(I2C_CONSET_AA,priv->base+LPC17_I2C_CONSET_OFFSET);
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break;
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case 0x50:
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priv->rdcnt++;
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if(priv->rdcnt<priv->msg.length)
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priv->msg.buffer[priv->rdcnt]=getreg32(priv->base+LPC17_I2C_BUFR_OFFSET);
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if(priv->rdcnt>=priv->msg.length-1)
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putreg32(I2C_CONCLR_AAC|I2C_CONCLR_SIC,priv->base+LPC17_I2C_CONCLR_OFFSET);
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break;
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case 0x58:
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i2c_stop(priv);
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break;
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default:
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i2c_stop(priv);
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break;
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}
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return OK;
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/* Reference UM10360 19.10.5 */
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state = getreg32(priv->base+LPC17_I2C_STAT_OFFSET);
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putreg32(I2C_CONCLR_SIC, priv->base+LPC17_I2C_CONCLR_OFFSET);
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priv->state = state;
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state &= 0xf8;
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switch (state)
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{
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case 0x00: // Bus Error
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case 0x20:
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case 0x30:
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case 0x38:
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case 0x48:
|
||||
i2c_stop(priv);
|
||||
break;
|
||||
|
||||
case 0x08: // START
|
||||
case 0x10: // Repeat START
|
||||
putreg32(priv->msg.addr, priv->base+LPC17_I2C_DAT_OFFSET);
|
||||
putreg32(I2C_CONCLR_STAC, priv->base+LPC17_I2C_CONCLR_OFFSET);
|
||||
break;
|
||||
|
||||
case 0x18:
|
||||
priv->wrcnt = 0;
|
||||
putreg32(priv->msg.buffer[0], priv->base+LPC17_I2C_DAT_OFFSET);
|
||||
break;
|
||||
|
||||
case 0x28:
|
||||
priv->wrcnt++;
|
||||
if (priv->wrcnt<priv->msg.length)
|
||||
{
|
||||
putreg32(priv->msg.buffer[priv->wrcnt],priv->base+LPC17_I2C_DAT_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
i2c_stop(priv);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x40:
|
||||
priv->rdcnt = -1;
|
||||
putreg32(I2C_CONSET_AA, priv->base+LPC17_I2C_CONSET_OFFSET);
|
||||
break;
|
||||
|
||||
case 0x50:
|
||||
priv->rdcnt++;
|
||||
if (priv->rdcnt < priv->msg.length)
|
||||
{
|
||||
priv->msg.buffer[priv->rdcnt] = getreg32(priv->base+LPC17_I2C_BUFR_OFFSET);
|
||||
}
|
||||
|
||||
if (priv->rdcnt>=priv->msg.length-1)
|
||||
{
|
||||
putreg32(I2C_CONCLR_AAC|I2C_CONCLR_SIC, priv->base+LPC17_I2C_CONCLR_OFFSET);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x58:
|
||||
i2c_stop(priv);
|
||||
break;
|
||||
|
||||
default:
|
||||
i2c_stop(priv);
|
||||
break;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
/*******************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Name: up_i2cinitialize
|
||||
@ -412,116 +452,117 @@ static int i2c_interrupt (int irq, FAR void *context)
|
||||
|
||||
struct i2c_dev_s *up_i2cinitialize(int port)
|
||||
{
|
||||
struct lpc17_i2cdev_s *priv;
|
||||
struct lpc17_i2cdev_s *priv;
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
if (port>2)
|
||||
if (port > 2)
|
||||
{
|
||||
dbg("lpc I2C Only support 0,1,2\n");
|
||||
return NULL;
|
||||
dbg("lpc I2C Only support 0,1,2\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
flags = irqsave();
|
||||
|
||||
flags = irqsave();
|
||||
|
||||
priv= &i2cdevices[port];
|
||||
priv= &i2cdevices[port];
|
||||
#ifdef CONFIG_LPC17_I2C0
|
||||
if (port==0)
|
||||
if (port == 0)
|
||||
{
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[0];
|
||||
priv->base = LPC17_I2C0_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C0;
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[0];
|
||||
priv->base = LPC17_I2C0_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C0;
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C0;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C0;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL0);
|
||||
regval &= ~SYSCON_PCLKSEL0_I2C0_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL0_I2C0_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL0);
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL0);
|
||||
regval &= ~SYSCON_PCLKSEL0_I2C0_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL0_I2C0_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL0);
|
||||
|
||||
lpc17_configgpio(GPIO_I2C0_SCL);
|
||||
lpc17_configgpio(GPIO_I2C0_SDA);
|
||||
lpc17_configgpio(GPIO_I2C0_SCL);
|
||||
lpc17_configgpio(GPIO_I2C0_SDA);
|
||||
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C0_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C0_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C0_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C0_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
}
|
||||
else
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_LPC17_I2C1
|
||||
if(port==1)
|
||||
if (port == 1)
|
||||
{
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[1];
|
||||
priv->base = LPC17_I2C1_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C1;
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[1];
|
||||
priv->base = LPC17_I2C1_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C1;
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C1;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C1;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL1);
|
||||
regval &= ~SYSCON_PCLKSEL1_I2C1_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL1_I2C1_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL1);
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL1);
|
||||
regval &= ~SYSCON_PCLKSEL1_I2C1_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL1_I2C1_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL1);
|
||||
|
||||
lpc17_configgpio(GPIO_I2C1_SCL);
|
||||
lpc17_configgpio(GPIO_I2C1_SDA);
|
||||
lpc17_configgpio(GPIO_I2C1_SCL);
|
||||
lpc17_configgpio(GPIO_I2C1_SDA);
|
||||
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C1_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C1_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C1_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C1_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
}
|
||||
else
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_LPC17_I2C2
|
||||
if(port==2)
|
||||
if (port == 2)
|
||||
{
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[2];
|
||||
priv->base = LPC17_I2C2_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C2;
|
||||
priv= (FAR struct lpc17_i2cdev_s *)&i2cdevices[2];
|
||||
priv->base = LPC17_I2C2_BASE;
|
||||
priv->irqid = LPC17_IRQ_I2C2;
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C2;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
regval = getreg32(LPC17_SYSCON_PCONP);
|
||||
regval |= SYSCON_PCONP_PCI2C2;
|
||||
putreg32(regval, LPC17_SYSCON_PCONP);
|
||||
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL1);
|
||||
regval &= ~SYSCON_PCLKSEL1_I2C2_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL1_I2C2_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL1);
|
||||
regval = getreg32(LPC17_SYSCON_PCLKSEL1);
|
||||
regval &= ~SYSCON_PCLKSEL1_I2C2_MASK;
|
||||
regval |= (SYSCON_PCLKSEL_CCLK << SYSCON_PCLKSEL1_I2C2_SHIFT);
|
||||
putreg32(regval, LPC17_SYSCON_PCLKSEL1);
|
||||
|
||||
lpc17_configgpio(GPIO_I2C2_SCL);
|
||||
lpc17_configgpio(GPIO_I2C2_SDA);
|
||||
lpc17_configgpio(GPIO_I2C2_SCL);
|
||||
lpc17_configgpio(GPIO_I2C2_SDA);
|
||||
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C2_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32 (LPC17_CCLK/CONFIG_I2C2_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C2_FREQ/2, priv->base + LPC17_I2C_SCLH_OFFSET);
|
||||
putreg32(LPC17_CCLK/CONFIG_I2C2_FREQ/2, priv->base + LPC17_I2C_SCLL_OFFSET);
|
||||
}
|
||||
else
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return NULL;
|
||||
return NULL;
|
||||
}
|
||||
putreg32(I2C_CONSET_I2EN,priv->base+LPC17_I2C_CONSET_OFFSET);
|
||||
|
||||
sem_init (&priv->mutex, 0, 1);
|
||||
sem_init (&priv->wait, 0, 0);
|
||||
putreg32(I2C_CONSET_I2EN, priv->base+LPC17_I2C_CONSET_OFFSET);
|
||||
|
||||
/* Allocate a watchdog timer */
|
||||
priv->timeout = wd_create();
|
||||
sem_init(&priv->mutex, 0, 1);
|
||||
sem_init(&priv->wait, 0, 0);
|
||||
|
||||
DEBUGASSERT(priv->timeout != 0);
|
||||
/* Allocate a watchdog timer */
|
||||
|
||||
/* Attach Interrupt Handler */
|
||||
irq_attach (priv->irqid, i2c_interrupt);
|
||||
priv->timeout = wd_create();
|
||||
DEBUGASSERT(priv->timeout != 0);
|
||||
|
||||
/* Enable Interrupt Handler */
|
||||
up_enable_irq(priv->irqid);
|
||||
/* Attach Interrupt Handler */
|
||||
|
||||
/* Install our operations */
|
||||
priv->dev.ops = &lpc17_i2c_ops;
|
||||
irq_attach(priv->irqid, i2c_interrupt);
|
||||
|
||||
return &priv->dev;
|
||||
/* Enable Interrupt Handler */
|
||||
|
||||
up_enable_irq(priv->irqid);
|
||||
|
||||
/* Install our operations */
|
||||
|
||||
priv->dev.ops = &lpc17_i2c_ops;
|
||||
return &priv->dev;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@ -534,12 +575,30 @@ struct i2c_dev_s *up_i2cinitialize(int port)
|
||||
|
||||
int up_i2cuninitialize(FAR struct i2c_dev_s * dev)
|
||||
{
|
||||
struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
|
||||
|
||||
putreg32(I2C_CONCLRT_I2ENC,priv->base+LPC17_I2C_CONCLR_OFFSET);
|
||||
up_disable_irq(priv->irqid);
|
||||
irq_detach (priv->irqid);
|
||||
return OK;
|
||||
struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *) dev;
|
||||
|
||||
/* Disable I2C */
|
||||
|
||||
putreg32(I2C_CONCLRT_I2ENC, priv->base+LPC17_I2C_CONCLR_OFFSET);
|
||||
|
||||
/* Reset data structures */
|
||||
|
||||
sem_destroy(&priv->mutex);
|
||||
sem_destroy(&priv->wait);
|
||||
|
||||
/* Free the watchdog timer */
|
||||
|
||||
wd_delete(priv->timeout);
|
||||
priv->timeout = NULL;
|
||||
|
||||
/* Disable interrupts */
|
||||
|
||||
up_disable_irq(priv->irqid);
|
||||
|
||||
/* Detach Interrupt Handler */
|
||||
|
||||
irq_detach(priv->irqid);
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user