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arm64/qemu_boot: add arm64 pci io memory map

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and rename other pci region name to make them more
readable

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
This commit is contained in:
Bowen Wang 2024-05-06 15:17:27 +08:00 committed by Xiang Xiao
parent b12fa7f760
commit bf5c571098
2 changed files with 15 additions and 9 deletions
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11
arch/arm64/include/qemu/chip.h
View File

@ -61,11 +61,14 @@
#define CONFIG_DEVICEIO_BASEADDR 0x7000000 #define CONFIG_DEVICEIO_BASEADDR 0x7000000
#define CONFIG_DEVICEIO_SIZE MB(512) #define CONFIG_DEVICEIO_SIZE MB(512)
#define CONFIG_DEVICEPCIE_BASEADDR 0x4010000000 #define CONFIG_PCI_CFG_BASEADDR 0x4010000000
#define CONFIG_DEVICEPCIE_SIZE MB(256) #define CONFIG_PCI_CFG_SIZE MB(256)
#define CONFIG_PCI_BASEADDR 0x8000000000 #define CONFIG_PCI_MEM_BASEADDR 0x8000000000
#define CONFIG_PCI_SIZE GB(512) #define CONFIG_PCI_MEM_SIZE GB(512)
#define CONFIG_PCI_IO_BASEADDR 0x3eff0000
#define CONFIG_PCI_IO_SIZE KB(64)
#define CONFIG_LOAD_BASE 0x40280000 #define CONFIG_LOAD_BASE 0x40280000

13
arch/arm64/src/qemu/qemu_boot.c
View File

@ -63,13 +63,16 @@ static const struct arm_mmu_region g_mmu_regions[] =
CONFIG_RAMBANK1_ADDR, CONFIG_RAMBANK1_SIZE, CONFIG_RAMBANK1_ADDR, CONFIG_RAMBANK1_SIZE,
MT_NORMAL | MT_RW | MT_SECURE), MT_NORMAL | MT_RW | MT_SECURE),
MMU_REGION_FLAT_ENTRY("PCI-E", MMU_REGION_FLAT_ENTRY("PCI_CFG",
CONFIG_DEVICEPCIE_BASEADDR, CONFIG_PCI_CFG_BASEADDR, CONFIG_PCI_CFG_SIZE,
CONFIG_DEVICEPCIE_SIZE,
MT_NORMAL | MT_RW | MT_SECURE), MT_NORMAL | MT_RW | MT_SECURE),
MMU_REGION_FLAT_ENTRY("PCI", MMU_REGION_FLAT_ENTRY("PCI_MEM",
CONFIG_PCI_BASEADDR, CONFIG_PCI_SIZE, CONFIG_PCI_MEM_BASEADDR, CONFIG_PCI_MEM_SIZE,
MT_NORMAL | MT_RW | MT_SECURE),
MMU_REGION_FLAT_ENTRY("PCI_IO",
CONFIG_PCI_IO_BASEADDR, CONFIG_PCI_IO_SIZE,
MT_NORMAL | MT_RW | MT_SECURE), MT_NORMAL | MT_RW | MT_SECURE),
}; };