z20x: Fixes related to W25 boot configurations.
arch/z80/src/ez80/ez80_timerisr.c: Correct a mismatch between the programmed reload value and the timer input clock frequency. arch/z80/src/ez80/ez80f92.h: Correct error in timer input clock divider: Bits 2-3, not bits 3-4. boards/z80/ez80/z20x/src/w25_main.c: Correct an uninitialized return value; private function was not declard static.
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@ -29,11 +29,56 @@
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#include <arch/io.h>
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#include <nuttx/arch.h>
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#include <nuttx/clock.h>
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#include "chip.h"
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#include "clock/clock.h"
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#include "z80_internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Select a clock divider. Choices are 4, 16, 64, or 256 */
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#define CLOCK_DIVIDER 16
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/* Given that:
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*
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* reload_value = (timer_period * system_clock_frequency) / clock_divider
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* = system_clock_frequency / DENOMINATOR
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*
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* Where:
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*
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* DENOMINATOR = clock_divider / timer_period
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*
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* The system timer period is given by CONFIG_USEC_PER_TICK which is usually
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* 10,000 corresponding to 100Hz.
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*
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*
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* DENOMINATOR = clock_divider / CONFIG_USEC_PER_TICK / USEC_PER_SEC
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* = (USEC_PER_SEC * clock_divider) / CONFIG_USEC_PER_TICK
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*
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* So for the usual value of CONFIG_USEC_PER_TICK (10,000) and a divider of
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* 16, the DENOMINATOR would be 1,600
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*/
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#define DENOMINATOR ((USEC_PER_SEC * CLOCK_DIVIDER) / CONFIG_USEC_PER_TICK)
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/* Pick clock divider register setting */
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#if CLOCK_DIVIDER == 4
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# define EZ80_TMRCLKDIV EZ80_TMRCLKDIV_4
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#elif CLOCK_DIVIDER == 16
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# define EZ80_TMRCLKDIV EZ80_TMRCLKDIV_16
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#elif CLOCK_DIVIDER == 64
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# define EZ80_TMRCLKDIV EZ80_TMRCLKDIV_64
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#elif CLOCK_DIVIDER == 256
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# define EZ80_TMRCLKDIV EZ80_TMRCLKDIV_256
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#else
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# error Invalid clock divider
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -108,29 +153,30 @@ void up_timer_initialize(void)
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* In continuous mode:
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*
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* timer_period = reload_value x clock_divider / system_clock_frequency
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*
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* or
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*
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* reload_value = (timer_period * system_clock_frequency) / clock_divider
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* = system_clock_frequency / DENOMINATOR
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*
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* Where:
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*
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* DENOMINATOR = clock_divider / timer_period
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*
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* eZ80F91:
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* For timer_period=10mS, and clock_divider=16, that would yield:
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*
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* reload_value = system_clock_frequency / 1600
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*
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* For a system timer of 50,000,000, that would result in a reload value
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* of 31,250.
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* For timer_period=10mS, and clock_divider=16, that would yield a
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* DENOMINATOR of 1600. For a system timer of 50,000,000, that would
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* result in a reload value of 31,250.
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*
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* eZ80F92:
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* For timer_period=10mS, and clock_divider=4, that would yield:
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*
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* reload_value = system_clock_frequency / 400
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*
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* For a system timer of 20,000,000, * divider of 4, that would result
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* in a reload value of 50,000.
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* For timer_period=10mS, and clock_divider=4, that would yield a
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* DENOMINATOR of 1600. For a system timer of 20,000,000, that would
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* result in a reload value of 50,000.
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*
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* NOTE: The system clock frequency value is defined in the board.h file
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*/
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reload = (uint16_t)(ez80_systemclock / 1600);
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reload = (uint16_t)(ez80_systemclock / DENOMINATOR);
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outp(EZ80_TMR0_RRH, (uint8_t)(reload >> 8));
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outp(EZ80_TMR0_RRL, (uint8_t)(reload));
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@ -157,11 +203,11 @@ void up_timer_initialize(void)
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/* EZ80_TMRCTL_TIMEN: Bit 0: The programmable reload timer is enabled
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* EZ80_TMRCTL_RLD: Bit 1: Force reload
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* EZ80_TMRCTL_TIMCONT: Bit 2: The timer operates in CONTINUOUS mode.
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* EZ80_TMRCLKDIV_16: Bits 3-4: System clock divider = 16
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* EZ80_TMRCLKDIV: Bits 2-3: Timer input clock divider
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*/
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outp(EZ80_TMR0_CTL, (EZ80_TMRCTL_TIMEN | EZ80_TMRCTL_RLD |
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EZ80_TMRCTL_TIMCONT | EZ80_TMRCLKDIV_16));
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EZ80_TMRCTL_TIMCONT | EZ80_TMRCLKDIV));
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/* Enable timer end-of-count interrupts */
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@ -171,13 +217,13 @@ void up_timer_initialize(void)
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defined(CONFIG_ARCH_CHIP_EZ80F93)
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/* EZ80_TMRCTL_TIMEN: Bit 0: Programmable reload timer enabled.
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* EZ80_TMRCTL_RSTEN: Bit 1: Reload and start function enabled.
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* EZ80_TMRCLKDIV_4: Bits 2-3: Timer input clock divided by 4 (5Mhz)
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* EZ80_TMRCLKDIV: Bits 2-3: Timer input clock divider
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* EZ80_TMRCTL_TIMCONT: Bit 4: Continuous mode
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* EZ80_TMRCTL_EN: Bit 6: Enable timer interrupt requests
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*/
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outp(EZ80_TMR0_CTL, (EZ80_TMRCTL_TIMEN | EZ80_TMRCTL_RSTEN |
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EZ80_TMRCLKDIV_4 | EZ80_TMRCTL_TIMCONT |
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EZ80_TMRCLKDIV | EZ80_TMRCTL_TIMCONT |
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EZ80_TMRCTL_EN));
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#endif
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@ -101,9 +101,9 @@
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#define EZ80_TMRCTL_TIMCONT 0x10 /* Bit 4: Continuous mode */
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#define EZ80_TMRCTL_CLKDIV 0x18 /* Bits 2-3: Timer input clock divider */
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# define EZ80_TMRCLKDIV_4 0x00 /* 00: 4 */
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# define EZ80_TMRCLKDIV_16 0x08 /* 01: 16 */
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# define EZ80_TMRCLKDIV_64 0x10 /* 10: 64 */
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# define EZ80_TMRCLKDIV_256 0x18 /* 11: 256 */
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# define EZ80_TMRCLKDIV_16 0x04 /* 01: 16 */
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# define EZ80_TMRCLKDIV_64 0x08 /* 10: 64 */
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# define EZ80_TMRCLKDIV_256 0x0c /* 11: 256 */
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#define EZ80_TMRCTL_RSTEN 0x02 /* Bit 1: Reload and start function enabled */
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#define EZ80_TMRCTL_TIMEN 0x01 /* Bit 0: Programmable reload timer enabled */
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@ -317,6 +317,31 @@ Configuration Subdirectories
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The boot loader source is located at boards/z20x/src/w25_main.c.
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When starting, you may see one of two things, depending upon whether or
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not there is a valid, bootable image in the W25 FLASH partition:
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1. If there is a bootable image in FLASH, you should see something like:
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Verifying 203125 bytes in the W25 Serial FLASH
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Successfully verified 203125 bytes in the W25 Serial FLASH
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[L]oad [B]oot
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.........
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The program will wait up to 5 seconds for you to provide a response:
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B to load the program program from the W25 and start it, or L to
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download a new program from serial and write it to FLASH.
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If nothing is pressed in within the 5 second delay, the program will
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continue to boot the program just as though B were pressed.
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If L is pressed, then you should see the same dialog as for the case
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where there is no valid binary image in FLASH.
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2. If there is no valid program in FLASH (or if L is pressed), you will
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be asked to :
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Send HEX file now.
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NOTES:
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1. A large UART1 Rx buffer (4Kb), a slow UART1 BAUD (2400), and a very
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@ -346,3 +371,8 @@ Configuration Subdirectories
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Things worth trying: 4800 BAUD, smaller Rx buffer, large Rx FIFO
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trigger level.
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2. Booting large programs from the serial FLASH is unbearably slow;
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you will think that the system is simply not booting at all. There
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is probably some bug contributing to this probably (maybe the timer
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interrupt rate?)
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@ -287,6 +287,7 @@ static int w25_read_binary(FAR struct prog_header_s *hdr)
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fd = open(W25_CHARDEV, O_RDONLY);
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if (fd < 0)
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{
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ret = -get_errno();
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return ret;
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}
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@ -342,18 +343,22 @@ errout:
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*
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****************************************************************************/
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uint24_t w25_crc24(uint32_t len)
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static uint24_t w25_crc24(uint32_t len)
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{
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FAR const uint8_t *src = (FAR const uint8_t *)PROGSTART;
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uint32_t crc = 0;
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int i;
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int j;
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/* Loop for each byte in the binary image */
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for (i = 0; i < len; i++)
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{
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uint8_t val = *src++;
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crc ^= (uint32_t)val << 16;
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/* Loop for each bit in each byte */
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for (j = 0; j < 8; j++)
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{
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crc <<= 1;
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@ -548,7 +553,7 @@ static int w25_wait_keypress(FAR char *keyset, int nseconds)
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{
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char tmpch;
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/* Read handling retries. We get out of this loop if a key is press*/
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/* Read handling retries. We get out of this loop if a key is press. */
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for (; ; )
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{
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