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SAMA5: Add support for DBGU. Xplained board now uses DBGU for the serial console

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This commit is contained in:
Gregory Nutt 2014-04-01 11:24:15 -06:00
parent cec5d575c0
commit c0bf638798
8 changed files with 914 additions and 56 deletions
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1
arch/arm/src/calypso/Kconfig
View File

@ -96,6 +96,7 @@ endmenu
choice
prompt "Serial Console Selection"
default SERIAL_CONSOLE_NONE
depends on DEV_CONSOLE
# See drivers/Kconfig
config USE_SERCOMM_CONSOLE

37
arch/arm/src/sama5/Kconfig
View File

@ -345,6 +345,43 @@ config SAMA5_PIOE_IRQ
endif # PIO_IRQ
menu "DBGU Configuration"
depends on SAMA5_DBGU
config SAMA5_DBGU_CONSOLE
bool "DBGU serial console"
---help---
Select to use the DBGU as the serial console.
config SAMA5_DBGU_RXBUFSIZE
int "Receive buffer size"
default 256
---help---
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config SAMA5_DBGU_TXBUFSIZE
int "Transmit buffer size"
default 256
---help---
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config SAMA5_DBGU_BAUD
int "BAUD rate"
default 115200
---help---
The configured BAUD of the UART.
config SAMA5_DBGU_PARITY
int "Parity setting"
default 0
range 0 2
---help---
0=no parity, 1=odd parity, 2=even parity
endmenu #DBGU Configuration
if SAMA5_LCDC
menu "LCDC Configuration"

4
arch/arm/src/sama5/Make.defs
View File

@ -119,6 +119,10 @@ ifeq ($(CONFIG_SAMA5_WDT),y)
CHIP_CSRCS += sam_wdt.c
endif
ifeq ($(CONFIG_SAMA5_DBGU),y)
CHIP_CSRCS += sam_dbgu.c
endif
ifeq ($(CONFIG_SAMA5_TRNG),y)
CHIP_CSRCS += sam_trng.c
endif

631
arch/arm/src/sama5/sam_dbgu.c Normal file
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@ -0,0 +1,631 @@
/****************************************************************************
* arch/arm/src/sama5/sam_dbgu.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <semaphore.h>
#include <string.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/serial/serial.h>
#include <arch/serial.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "os_internal.h"
#include "chip.h"
#include "chip/sam_dbgu.h"
#include "chip/sam_pinmap.h"
#include "sam_pio.h"
#include "sam_dbgu.h"
#ifdef CONFIG_SAMA5_DBGU
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
#ifdef USE_SERIALDRIVER
struct dbgu_dev_s
{
uint32_t sr; /* Saved status bits */
};
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int dbgu_setup(struct uart_dev_s *dev);
#ifdef USE_SERIALDRIVER
static void dbgu_shutdown(struct uart_dev_s *dev);
static int dbgu_attach(struct uart_dev_s *dev);
static void dbgu_detach(struct uart_dev_s *dev);
static int dbgu_interrupt(int irq, void *context);
static int dbgu_ioctl(struct file *filep, int cmd, unsigned long arg);
static int dbgu_receive(struct uart_dev_s *dev, uint32_t *status);
static void dbgu_rxint(struct uart_dev_s *dev, bool enable);
static bool dbgu_rxavailable(struct uart_dev_s *dev);
static void dbgu_send(struct uart_dev_s *dev, int ch);
static void dbgu_txint(struct uart_dev_s *dev, bool enable);
static bool dbgu_txready(struct uart_dev_s *dev);
static bool dbgu_txempty(struct uart_dev_s *dev);
/****************************************************************************
* Private Variables
****************************************************************************/
static const struct uart_ops_s g_uart_ops =
{
.setup = dbgu_setup,
.shutdown = dbgu_shutdown,
.attach = dbgu_attach,
.detach = dbgu_detach,
.ioctl = dbgu_ioctl,
.receive = dbgu_receive,
.rxint = dbgu_rxint,
.rxavailable = dbgu_rxavailable,
.send = dbgu_send,
.txint = dbgu_txint,
.txready = dbgu_txready,
.txempty = dbgu_txempty,
};
/* DBGU I/O buffers */
static char g_dbgu_rxbuffer[CONFIG_SAMA5_DBGU_RXBUFSIZE];
static char g_dbgu_txbuffer[CONFIG_SAMA5_DBGU_TXBUFSIZE];
/* This describes the private state of the DBGU port */
static struct dbgu_dev_s g_dbgu_priv;
/* This describes the state of the DBGU port as is visible from the upper
* half serial driver.
*/
static uart_dev_t g_dbgu_port =
{
.recv =
{
.size = CONFIG_SAMA5_DBGU_RXBUFSIZE,
.buffer = g_dbgu_rxbuffer,
},
.xmit =
{
.size = CONFIG_SAMA5_DBGU_TXBUFSIZE,
.buffer = g_dbgu_txbuffer,
},
.ops = &g_uart_ops,
.priv = &g_dbgu_priv,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: dbgu_configure
*
* Description:
* Configure the DBGU baud, bits, parity, etc. This method is called the
* first time that the serial port is opened.
*
****************************************************************************/
static void dbgu_configure(void)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
uint32_t regval;
/* Set up the mode register. Start with normal DBGU mode and the MCK
* as the timing source
*/
regval = DBGU_MR_CHMODE_NORMAL;
/* OR in settings for the selected parity */
#if CONFIG_SAMA5_DBGU_PARITY == 1
regval |= DBGU_MR_PAR_ODD;
#elif CONFIG_SAMA5_DBGU_PARITY == 2
regval |= DBGU_MR_PAR_EVEN;
#else
regval |= DBGU_MR_PAR_NONE;
#endif
/* And save the new mode register value */
putreg32(regval, SAM_DBGU_MR);
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
* This may limit BAUD rates for lower DBGU clocks.
*/
regval = (BOARD_MCK_FREQUENCY + (CONFIG_SAMA5_DBGU_BAUD << 3)) /
(CONFIG_SAMA5_DBGU_BAUD << 4);
putreg32(regval, SAM_DBGU_BRGR);
/* Enable receiver & transmitter */
putreg32((DBGU_CR_RXEN|DBGU_CR_TXEN), SAM_DBGU_CR);
#endif
}
/****************************************************************************
* Name: dbgu_setup
*
* Description:
* Configure the DBGU baud, bits, parity, etc. This method is called the
* first time that the serial port is opened.
*
****************************************************************************/
static int dbgu_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
/* The shutdown method will put the DBGU in a known, disabled state */
dbgu_shutdown(dev);
/* Then configure the DBGU */
dbgu_configure();
#endif
return OK;
}
/****************************************************************************
* Name: dbgu_shutdown
*
* Description:
* Disable the DBGU. This method is called when the serial
* port is closed
*
****************************************************************************/
static void dbgu_shutdown(struct uart_dev_s *dev)
{
irqstate_t flags;
/* The following must be atomic */
flags = irqsave();
/* Reset and disable receiver and transmitter */
putreg32((DBGU_CR_RSTRX|DBGU_CR_RSTTX|DBGU_CR_RXDIS|DBGU_CR_TXDIS), SAM_DBGU_CR);
/* Disable all interrupts */
putreg32(DBGU_INT_ALLINTS, SAM_DBGU_IDR);
irqrestore(flags);
}
/****************************************************************************
* Name: dbgu_attach
*
* Description:
* Configure the DBGU to operation in interrupt driven mode. This method is
* called when the serial port is opened. Normally, this is just after the
* the setup() method is called, however, the serial console may operate in
* a non-interrupt driven mode during the boot phase.
*
* RX and TX interrupts are not enabled when by the attach method (unless the
* hardware supports multiple levels of interrupt enabling). The RX and TX
* interrupts are not enabled until the txint() and rxint() methods are called.
*
****************************************************************************/
static int dbgu_attach(struct uart_dev_s *dev)
{
int ret;
/* Attach and enable the IRQ */
ret = irq_attach(SAM_IRQ_DBGU, dbgu_interrupt);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the DBGU
*/
up_enable_irq(SAM_IRQ_DBGU);
}
return ret;
}
/****************************************************************************
* Name: dbgu_detach
*
* Description:
* Detach DBGU interrupts. This method is called when the serial port is
* closed normally just before the shutdown method is called. The exception
* is the serial console which is never shutdown.
*
****************************************************************************/
static void dbgu_detach(struct uart_dev_s *dev)
{
up_disable_irq(SAM_IRQ_DBGU);
irq_detach(SAM_IRQ_DBGU);
}
/****************************************************************************
* Name: dbgu_interrupt
*
* Description:
* This is the DBGU interrupt handler. It will be invoked when an
* interrupt received on the 'irq' It should call uart_transmitchars or
* uart_receivechar to perform the appropriate data transfers. The
* interrupt handling logic must be able to map the 'irq' number into the
* appropriate uart_dev_s structure in order to call these functions.
*
****************************************************************************/
static int dbgu_interrupt(int irq, void *context)
{
struct uart_dev_s *dev = &g_dbgu_port;
struct dbgu_dev_s *priv = (struct dbgu_dev_s*)dev->priv;
uint32_t pending;
uint32_t imr;
int passes;
bool handled;
/* Loop until there are no characters to be transferred or, until we have
* been looping for a long time.
*/
handled = true;
for (passes = 0; passes < 256 && handled; passes++)
{
handled = false;
/* Get the DBGU/DBGU status (we are only interested in the unmasked interrupts). */
priv->sr = getreg32(SAM_DBGU_SR); /* Save for error reporting */
imr = getreg32(SAM_DBGU_IMR); /* Interrupt mask */
pending = priv->sr & imr; /* Mask out disabled interrupt sources */
/* Handle an incoming, receive byte. RXRDY: At least one complete character
* has been received and US_RHR has not yet been read.
*/
if ((pending & DBGU_INT_RXRDY) != 0)
{
/* Received data ready... process incoming bytes */
uart_recvchars(dev);
handled = true;
}
/* Handle outgoing, transmit bytes. XRDY: There is no character in the
* US_THR.
*/
if ((pending & DBGU_INT_TXRDY) != 0)
{
/* Transmit data register empty ... process outgoing bytes */
uart_xmitchars(dev);
handled = true;
}
}
return OK;
}
/****************************************************************************
* Name: dbgu_ioctl
*
* Description:
* All ioctl calls will be routed through this method
*
****************************************************************************/
static int dbgu_ioctl(struct file *filep, int cmd, unsigned long arg)
{
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
int ret = OK;
switch (cmd)
{
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct dbgu_dev_s *user = (struct dbgu_dev_s*)arg;
if (!user)
{
ret = -EINVAL;
}
else
{
memcpy(user, dev, sizeof(struct dbgu_dev_s));
}
}
break;
#endif
default:
ret = -ENOTTY;
break;
}
return ret;
}
/****************************************************************************
* Name: dbgu_receive
*
* Description:
* Called (usually) from the interrupt level to receive one
* character from the DBGU. Error bits associated with the
* receipt are provided in the return 'status'.
*
****************************************************************************/
static int dbgu_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct dbgu_dev_s *priv = (struct dbgu_dev_s*)dev->priv;
/* Return the error information in the saved status */
*status = priv->sr;
priv->sr = 0;
/* Then return the actual received byte */
return (int)(getreg32(SAM_DBGU_RHR) & 0xff);
}
/****************************************************************************
* Name: dbgu_rxint
*
* Description:
* Call to enable or disable RXRDY interrupts
*
****************************************************************************/
static void dbgu_rxint(struct uart_dev_s *dev, bool enable)
{
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
* timeout occurs).
*/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
putreg32(DBGU_INT_RXRDY, SAM_DBGU_IER);
#endif
}
else
{
putreg32(DBGU_INT_RXRDY, SAM_DBGU_IDR);
}
}
/****************************************************************************
* Name: dbgu_rxavailable
*
* Description:
* Return true if the receive holding register is not empty
*
****************************************************************************/
static bool dbgu_rxavailable(struct uart_dev_s *dev)
{
return ((getreg32(SAM_DBGU_SR) & DBGU_INT_RXRDY) != 0);
}
/****************************************************************************
* Name: dbgu_send
*
* Description:
* This method will send one byte on the DBGU/DBGU
*
****************************************************************************/
static void dbgu_send(struct uart_dev_s *dev, int ch)
{
putreg32((uint32_t)ch, SAM_DBGU_THR);
}
/****************************************************************************
* Name: dbgu_txint
*
* Description:
* Call to enable or disable TX interrupts
*
****************************************************************************/
static void dbgu_txint(struct uart_dev_s *dev, bool enable)
{
irqstate_t flags;
flags = irqsave();
if (enable)
{
/* Set to receive an interrupt when the TX holding register register
* is empty
*/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
putreg32(DBGU_INT_TXRDY, SAM_DBGU_IER);
/* Fake a TX interrupt here by just calling uart_xmitchars() with
* interrupts disabled (note this may recurse).
*/
uart_xmitchars(dev);
#endif
}
else
{
/* Disable the TX interrupt */
putreg32(DBGU_INT_TXRDY, SAM_DBGU_IDR);
}
irqrestore(flags);
}
/****************************************************************************
* Name: dbgu_txready
*
* Description:
* Return true if the transmit holding register is empty (TXRDY)
*
****************************************************************************/
static bool dbgu_txready(struct uart_dev_s *dev)
{
return ((getreg32(SAM_DBGU_SR) & DBGU_INT_TXRDY) != 0);
}
/****************************************************************************
* Name: dbgu_txempty
*
* Description:
* Return true if the transmit holding and shift registers are empty
*
****************************************************************************/
static bool dbgu_txempty(struct uart_dev_s *dev)
{
return ((getreg32(SAM_DBGU_SR) & DBGU_INT_TXEMPTY) != 0);
}
/****************************************************************************
* Name: sam_dbgu_devinitialize
*
* Description:
* Performs the low level DBGU initialization early in debug so that the
* DBGU console will be available during bootup. This must be called
* before getreg32it.
*
****************************************************************************/
void sam_dbgu_devinitialize(void)
{
/* Disable all DBGU interrupts */
putreg32(DBGU_INT_ALLINTS, SAM_DBGU_IDR);
#ifdef CONFIG_SAMA5_DBGU_CONSOLE
/* Configuration the DBGU as the the console */
g_dbgu_port.isconsole = true;
dbgu_configure();
#endif
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_dbgu_register
*
* Description:
* Register DBBU console and serial port. This assumes that
* sam_dbgu_initialize() was called previously.
*
****************************************************************************/
void sam_dbgu_register(void)
{
/* Register the console */
#ifdef CONFIG_SAMA5_DBGU_CONSOLE
(void)uart_register("/dev/console", &g_dbgu_port);
#endif
/* Register the DBGU serial device */
(void)uart_register("/dev/ttyDBGU", &g_dbgu_port);
}
#endif /* USE_SERIALDRIVER */
/****************************************************************************
* Name: sam_dbgu_initialize
*
* Description:
* Performs the low level DBGU initialization early in debug so that the
* DBGU console will be available during bootup. This must be called
* before getreg32it.
*
****************************************************************************/
void sam_dbgu_initialize(void)
{
/* Initialize DBGU pins */
(void)sam_configpio(PIO_DBGU_DRXD);
(void)sam_configpio(PIO_DBGU_DTXD);
#if defined(USE_SERIALDRIVER)
/* Initialize the DBGU device driver */
sam_dbgu_devinitialize();
#elif defined(CONFIG_SAMA5_DBGU_CONSOLE)
sam_dbgu_configure();
#endif
}
#endif /* CONFIG_SAMA5_DBGU */

109
arch/arm/src/sama5/sam_dbgu.h Normal file
View File

@ -0,0 +1,109 @@
/****************************************************************************
* arch/arm/src/sama5/sam_dbgu.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_SAM_DBGU_H
#define __ARCH_ARM_SRC_SAMA5_SAM_DBGU_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#ifdef CONFIG_SAMA5_DBGU
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_dbgu_initialize
*
* Description:
* Performs the low level DBGU initialization early in debug so that the
* DBGU console will be available during bootup.
*
****************************************************************************/
void sam_dbgu_initialize(void);
/****************************************************************************
* Name: sam_dbgu_register
*
* Description:
* Register DBBU console and serial port. This assumes that
* sam_dbgu_initialize() was called previously.
*
****************************************************************************/
void sam_dbgu_register(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_SAMA5_DBGU */
#endif /* __ARCH_ARM_SRC_SAMA5_SAM_DBGU_H */

81
arch/arm/src/sama5/sam_lowputc.c
View File

@ -49,9 +49,11 @@
#include "sam_pio.h"
#include "sam_periphclks.h"
#include "sam_dbgu.h"
#include "sam_lowputc.h"
#include "chip/sam_uart.h"
#include "chip/sam_dbgu.h"
#include "chip/sam_pinmap.h"
/**************************************************************************
@ -79,57 +81,72 @@
/* Is there a serial console? It could be on UART0-1 or USART0-3 */
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART0)
#if defined(CONFIG_SAMA5_DBGU_CONSOLE) && defined(CONFIG_SAMA5_DBGU)
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# undef HAVE_UART_CONSOLE
#elif defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART0)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART1)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART0)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART1)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART2)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART3)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#else
# warning "No valid CONFIG_USARTn_SERIAL_CONSOLE Setting"
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef HAVE_CONSOLE
# undef HAVE_UART_CONSOLE
#endif
/* The UART/USART modules are driven by the main clock (MCK). */
@ -139,7 +156,13 @@
/* Select USART parameters for the selected console */
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
#if defined(CONFIG_SAMA5_DBGU_CONSOLE)
# define SAM_CONSOLE_VBASE SAM_DBGU_VBASE
# define SAM_CONSOLE_BAUD CONFIG_SAMA5_DBGU_BAUD
# define SAM_CONSOLE_BITS 8
# define SAM_CONSOLE_PARITY CONFIG_SAMA5_DBGU_PARITY
# define SAM_CONSOLE_2STOP 0
#elif defined(CONFIG_UART0_SERIAL_CONSOLE)
# define SAM_CONSOLE_VBASE SAM_UART0_VBASE
# define SAM_CONSOLE_BAUD CONFIG_UART0_BAUD
# define SAM_CONSOLE_BITS CONFIG_UART0_BITS
@ -247,7 +270,7 @@
void up_lowputc(char ch)
{
#ifdef HAVE_CONSOLE
#if defined(HAVE_UART_CONSOLE)
irqstate_t flags;
for (;;)
@ -272,6 +295,31 @@ void up_lowputc(char ch)
return;
}
irqrestore(flags);
}
#elif defined(CONFIG_SAMA5_DBGU_CONSOLE)
irqstate_t flags;
for (;;)
{
/* Wait for the transmitter to be available */
while ((getreg32(SAM_DBGU_SR) & DBGU_INT_TXEMPTY) == 0);
/* Disable interrupts so that the test and the transmission are
* atomic.
*/
flags = irqsave();
if ((getreg32(SAM_DBGU_SR) & DBGU_INT_TXEMPTY) != 0)
{
/* Send the character */
putreg32((uint32_t)ch, SAM_DBGU_THR);
irqrestore(flags);
return;
}
irqrestore(flags);
}
#endif
@ -287,7 +335,7 @@ void up_lowputc(char ch)
int up_putc(int ch)
{
#ifdef HAVE_CONSOLE
#if defined(HAVE_UART_CONSOLE) || defined(CONFIG_SAMA5_DBGU_CONSOLE)
/* Check for LF */
if (ch == '\n')
@ -298,9 +346,9 @@ int up_putc(int ch)
}
up_lowputc(ch);
#endif
return ch;
}
#endif
/**************************************************************************
* Name: sam_lowsetup
@ -392,7 +440,8 @@ void sam_lowsetup(void)
#endif
/* Configure the console (only) */
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
/* Reset and disable receiver and transmitter */
putreg32((UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS),
@ -418,4 +467,10 @@ void sam_lowsetup(void)
putreg32((UART_CR_RXEN | UART_CR_TXEN),
SAM_CONSOLE_VBASE + SAM_UART_CR_OFFSET);
#endif
#ifdef CONFIG_SAMA5_DBGU
/* Initialize the DBGU (might be the serial console) */
sam_dbgu_initialize();
#endif
}

106
arch/arm/src/sama5/sam_serial.c
View File

@ -61,9 +61,11 @@
#include "chip.h"
#include "chip/sam_uart.h"
#include "sam_dbgu.h"
#include "sam_serial.h"
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/* Some sanity checks *******************************************************/
@ -87,10 +89,8 @@
/* Is there a USART/USART enabled? */
#if !defined(CONFIG_SAMA5_UART0) && !defined(CONFIG_SAMA5_UART1) && \
!defined(CONFIG_SAMA5_USART0) && !defined(CONFIG_SAMA5_USART1) && \
!defined(CONFIG_SAMA5_USART2) && !defined(CONFIG_SAMA5_USART3)
# error "No USARTs enabled"
#if defined(CONFIG_SAMA5_UART0) || defined(CONFIG_SAMA5_UART1)
# define HAVE_UART
#endif
#if defined(CONFIG_SAMA5_USART0) || defined(CONFIG_SAMA5_USART1) ||\
@ -100,57 +100,72 @@
/* Is there a serial console? It could be on UART0-1 or USART0-3 */
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART0)
#if defined(CONFIG_SAMA5_DBGU_CONSOLE) && defined(CONFIG_SAMA5_DBGU)
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# undef HAVE_UART_CONSOLE
#elif defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART0)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_UART1)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART0)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART1)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART2)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_SAMA5_USART3)
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# define HAVE_CONSOLE 1
# define HAVE_UART_CONSOLE 1
#else
# warning "No valid CONFIG_USARTn_SERIAL_CONSOLE Setting"
# undef CONFIG_SAMA5_DBGU_CONSOLE
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef HAVE_CONSOLE
# undef HAVE_UART_CONSOLE
#endif
/* If we are not using the serial driver for the console, then we still must
@ -159,6 +174,15 @@
#ifdef USE_SERIALDRIVER
#undef HAVE_UART_CONSOLE
#undef TTYS1_DEV
#undef TTYS2_DEV
#undef TTYS3_DEV
#undef TTYS4_DEV
#undef TTYS5_DEV
#if defined(HAVE_UART) || defined(HAVE_USART)
/* Which UART/USART with be tty0/console and which tty1? tty2? tty3? tty4? tty5? */
/* First pick the console and ttys0. This could be any of UART0-1, USART0-3 */
@ -588,34 +612,17 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t valu
putreg32(value, priv->usartbase + offset);
}
/****************************************************************************
* Name: up_restoreusartint
****************************************************************************/
static inline void up_restoreusartint(struct up_dev_s *priv, uint32_t imr)
{
/* Restore the previous interrupt state */
up_serialout(priv, SAM_UART_IMR_OFFSET, imr);
}
/****************************************************************************
* Name: up_disableallints
****************************************************************************/
static void up_disableallints(struct up_dev_s *priv, uint32_t *imr)
static void up_disableallints(struct up_dev_s *priv)
{
irqstate_t flags;
/* The following must be atomic */
flags = irqsave();
if (imr)
{
/* Return the current interrupt mask */
*imr = up_serialin(priv, SAM_UART_IMR_OFFSET);
}
/* Disable all interrupts */
@ -748,7 +755,7 @@ static void up_shutdown(struct uart_dev_s *dev)
/* Disable all interrupts */
up_disableallints(priv, NULL);
up_disableallints(priv);
}
/****************************************************************************
@ -782,6 +789,7 @@ static int up_attach(struct uart_dev_s *dev)
up_enable_irq(priv->irq);
}
return ret;
}
@ -810,7 +818,7 @@ static void up_detach(struct uart_dev_s *dev)
* interrupt received on the 'irq' It should call uart_transmitchars or
* uart_receivechar to perform the appropriate data transfers. The
* interrupt handling logic must be able to map the 'irq' number into the
* approprite uart_dev_s structure in order to call these functions.
* appropriate uart_dev_s structure in order to call these functions.
*
****************************************************************************/
@ -1081,7 +1089,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
* Name: up_txready
*
* Description:
* Return true if the tranmsit holding register is empty (TXRDY)
* Return true if the transmit holding register is empty (TXRDY)
*
****************************************************************************/
@ -1105,6 +1113,8 @@ static bool up_txempty(struct uart_dev_s *dev)
return ((up_serialin(priv, SAM_UART_SR_OFFSET) & UART_INT_TXEMPTY) != 0);
}
#endif /* HAVE_UART || HAVE_USART */
/****************************************************************************
* Public Functions
****************************************************************************/
@ -1127,26 +1137,28 @@ void sam_earlyserialinit(void)
/* Disable all USARTS */
up_disableallints(TTYS0_DEV.priv, NULL);
#ifdef TTYS0_DEV
up_disableallints(TTYS0_DEV.priv);
#endif
#ifdef TTYS1_DEV
up_disableallints(TTYS1_DEV.priv, NULL);
up_disableallints(TTYS1_DEV.priv);
#endif
#ifdef TTYS2_DEV
up_disableallints(TTYS2_DEV.priv, NULL);
up_disableallints(TTYS2_DEV.priv);
#endif
#ifdef TTYS3_DEV
up_disableallints(TTYS3_DEV.priv, NULL);
up_disableallints(TTYS3_DEV.priv);
#endif
#ifdef TTYS4_DEV
up_disableallints(TTYS4_DEV.priv, NULL);
up_disableallints(TTYS4_DEV.priv);
#endif
#ifdef TTYS5_DEV
up_disableallints(TTYS5_DEV.priv, NULL);
up_disableallints(TTYS5_DEV.priv);
#endif
/* Configuration whichever one is the console */
#ifdef HAVE_CONSOLE
#ifdef HAVE_UART_CONSOLE
CONSOLE_DEV.isconsole = true;
up_setup(&CONSOLE_DEV);
#endif
@ -1165,13 +1177,15 @@ void up_serialinit(void)
{
/* Register the console */
#ifdef HAVE_CONSOLE
#ifdef HAVE_UART_CONSOLE
(void)uart_register("/dev/console", &CONSOLE_DEV);
#endif
/* Register all USARTs */
/* Register all UARTs/USARTs */
#ifdef TTYS0_DEV
(void)uart_register("/dev/ttyS0", &TTYS0_DEV);
#endif
#ifdef TTYS1_DEV
(void)uart_register("/dev/ttyS1", &TTYS1_DEV);
#endif
@ -1187,6 +1201,12 @@ void up_serialinit(void)
#ifdef TTYS5_DEV
(void)uart_register("/dev/ttyS5", &TTYS5_DEV);
#endif
/* Register the DBGU as well */
#ifdef CONFIG_SAMA5_DBGU
sam_dbgu_register();
#endif
}
#endif /* USE_SERIALDRIVER */

1
arch/z80/src/z180/Kconfig
View File

@ -236,6 +236,7 @@ endmenu
choice
prompt "Serial console"
default NO_SERIAL_CONSOLE
depends on DEV_CONSOLE
config Z180_UART0_SERIAL_CONSOLE
bool "UART0"