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STM32 CAN driver now compiles

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4210 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-21 23:31:03 +00:00
parent 7762e7fc16
commit c0db417435
2 changed files with 61 additions and 0 deletions
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35
configs/stm3240g-eval/README.txt
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@ -15,6 +15,7 @@ Contents
- LEDs
- Ethernet
- PWM
- CAN
- Configurations
Development Environment
@ -220,6 +221,40 @@ FSMC must be disabled in this case! PD13 is available at:
TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
CAN
===
Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2.
JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver
JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver
CAN signals are then available on CN10 pins:
CN10 Pin 7 = CANH
CN10 Pin 2 = CANL
Mapping to STM32 GPIO pins:
PD0 = FSMC_D2 & CAN1_RX
PD1 = FSMC_D3 & CAN1_TX
PB13 = ULPI_D6 & CAN2_TX
PB5 = ULPI_D7 & CAN2_RX
Configuration Options:
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_STM32_CAN1 - Enable support for CAN1
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
CONFIG_STM32_CAN2 - Enable support for CAN1
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
STM3240G-EVAL-specific Configuration Options
============================================

26
configs/stm3240g-eval/include/board.h
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@ -301,6 +301,32 @@
#define GPIO_TIM4_CH2 GPIO_TIM4_CH2_2
/* CAN
*
* Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2.
*
* JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver
* JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver
*
* CAN signals are then available on CN10 pins:
*
* CN10 Pin 7 = CANH
* CN10 Pin 2 = CANL
*
* Mapping to STM32 GPIO pins:
*
* PD0 = FSMC_D2 & CAN1_RX
* PD1 = FSMC_D3 & CAN1_TX
* PB13 = ULPI_D6 & CAN2_TX
* PB5 = ULPI_D7 & CAN2_RX
*/
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN2_RX GPIO_CAN2_RX_2
#define GPIO_CAN2_TX GPIO_CAN2_TX_1
/************************************************************************************
* Public Data
************************************************************************************/