From c0e40fc19f71b13b07108c92a9001a44ee0fee55 Mon Sep 17 00:00:00 2001 From: liaoao Date: Tue, 19 Sep 2023 21:24:00 +0800 Subject: [PATCH] coresight:add tpiu device support Signed-off-by: liaoao --- drivers/coresight/CMakeLists.txt | 4 + drivers/coresight/Kconfig | 4 + drivers/coresight/Make.defs | 4 + drivers/coresight/coresight_tpiu.c | 236 +++++++++++++++++++++++ include/nuttx/coresight/coresight_tpiu.h | 74 +++++++ 5 files changed, 322 insertions(+) create mode 100644 drivers/coresight/coresight_tpiu.c create mode 100644 include/nuttx/coresight/coresight_tpiu.h diff --git a/drivers/coresight/CMakeLists.txt b/drivers/coresight/CMakeLists.txt index 531b0ce795..9c3ca5a7a3 100644 --- a/drivers/coresight/CMakeLists.txt +++ b/drivers/coresight/CMakeLists.txt @@ -29,5 +29,9 @@ if(CONFIG_CORESIGHT) list(APPEND SRCS coresight_replicator.c) endif() + if(CONFIG_CORESIGHT_TPIU) + list(APPEND SRCS coresight_tpiu.c) + endif() + target_sources(drivers PRIVATE ${SRCS}) endif() diff --git a/drivers/coresight/Kconfig b/drivers/coresight/Kconfig index 775b8964e1..be00792361 100644 --- a/drivers/coresight/Kconfig +++ b/drivers/coresight/Kconfig @@ -27,4 +27,8 @@ config CORESIGHT_REPLICATOR bool "Replicator coresight device support" default n +config CORESIGHT_TPIU + bool "TPIU coresight device support" + default n + endif # CORESIGHT diff --git a/drivers/coresight/Make.defs b/drivers/coresight/Make.defs index 5bc0b0a64a..a71e0ac72e 100644 --- a/drivers/coresight/Make.defs +++ b/drivers/coresight/Make.defs @@ -32,6 +32,10 @@ ifeq ($(CONFIG_CORESIGHT_REPLICATOR),y) CSRCS += coresight_replicator.c endif +ifeq ($(CONFIG_CORESIGHT_TPIU),y) +CSRCS += coresight_tpiu.c +endif + DEPPATH += --dep-path coresight VPATH += :coresight CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)drivers$(DELIM)coresight diff --git a/drivers/coresight/coresight_tpiu.c b/drivers/coresight/coresight_tpiu.c new file mode 100644 index 0000000000..6685d2a006 --- /dev/null +++ b/drivers/coresight/coresight_tpiu.c @@ -0,0 +1,236 @@ +/**************************************************************************** + * drivers/coresight/coresight_tpiu.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#include + +#include "coresight_common.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* TPIU registers */ + +#define TPIU_SUPP_PORTSZ 0x000 +#define TPIU_CURR_PORTSZ 0x004 +#define TPIU_SUPP_TRIGMODES 0x100 +#define TPIU_TRIG_CNTRVAL 0x104 +#define TPIU_TRIG_MULT 0x108 +#define TPIU_SUPP_TESTPATM 0x200 +#define TPIU_CURR_TESTPATM 0x204 +#define TPIU_TEST_PATREPCNTR 0x208 +#define TPIU_FFSR 0x300 +#define TPIU_FFCR 0x304 +#define TPIU_FSYNC_CNTR 0x308 +#define TPIU_EXTCTL_INPORT 0x400 +#define TPIU_EXTCTL_OUTPORT 0x404 +#define TPIU_ITTRFLINACK 0xee4 +#define TPIU_ITTRFLIN 0xee8 +#define TPIU_ITATBDATA0 0xeec +#define TPIU_ITATBCTR2 0xef0 +#define TPIU_ITATBCTR1 0xef4 +#define TPIU_ITATBCTR0 0xef8 + +/* FFSR - 0x300 */ + +#define TPIU_FFSR_FT_STOPPED BIT(1) + +/* FFCR - 0x304 */ + +#define TPIU_FFCR_FON_MAN BIT(6) +#define TPIU_FFCR_STOP_FI BIT(12) + +/**************************************************************************** + * Private Functions Prototypes + ****************************************************************************/ + +static int tpiu_enable(FAR struct coresight_dev_s *csdev); +static void tpiu_disable(FAR struct coresight_dev_s *csdev); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct coresight_sink_ops_s g_tpiu_sink_ops = +{ + .enable = tpiu_enable, + .disable = tpiu_disable, +}; + +static const struct coresight_ops_s g_tpiu_ops = +{ + .sink_ops = &g_tpiu_sink_ops, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tpiu_hw_enable + ****************************************************************************/ + +static int tpiu_hw_enable(FAR struct coresight_tpiu_dev_s *tpiudev) +{ + return coresight_claim_device(tpiudev->csdev.addr); +} + +/**************************************************************************** + * Name: tpiu_hw_disable + ****************************************************************************/ + +static void tpiu_hw_disable(FAR struct coresight_tpiu_dev_s *tpiudev) +{ + uint32_t ffcr; + + coresight_unlock(tpiudev->csdev.addr); + + /* Trigger a formatter stop event. */ + + ffcr = coresight_get32(tpiudev->csdev.addr + TPIU_FFCR); + ffcr |= TPIU_FFCR_STOP_FI; + coresight_put32(ffcr, tpiudev->csdev.addr + TPIU_FFCR); + ffcr |= TPIU_FFCR_FON_MAN; + coresight_put32(ffcr, tpiudev->csdev.addr + TPIU_FFCR); + if (coresight_timeout(tpiudev->csdev.addr, TPIU_FFCR, + TPIU_FFCR_FON_MAN, 0) < 0) + { + cserr("timeout while waiting for completion of Manual Flush\n"); + } + + if (coresight_timeout(tpiudev->csdev.addr, TPIU_FFSR, + TPIU_FFSR_FT_STOPPED, TPIU_FFSR_FT_STOPPED) < 0) + { + cserr("timeout while waiting for Formatter to Stop\n"); + } + + coresight_lock(tpiudev->csdev.addr); + coresight_disclaim_device(tpiudev->csdev.addr); +} + +/**************************************************************************** + * Name: tpiu_enable + ****************************************************************************/ + +static int tpiu_enable(FAR struct coresight_dev_s *csdev) +{ + FAR struct coresight_tpiu_dev_s *tpiudev = + (FAR struct coresight_tpiu_dev_s *)csdev; + int ret = 0; + + if (tpiudev->refcnt++ == 0) + { + ret = tpiu_hw_enable(tpiudev); + if (ret < 0) + { + tpiudev->refcnt--; + cserr("tpiu %s enabled failed\n", csdev->name); + } + } + + return ret; +} + +/**************************************************************************** + * Name: tpiu_disable + ****************************************************************************/ + +static void tpiu_disable(FAR struct coresight_dev_s *csdev) +{ + FAR struct coresight_tpiu_dev_s *tpiudev = + (FAR struct coresight_tpiu_dev_s *)csdev; + + if (--tpiudev->refcnt == 0) + { + tpiu_hw_disable(tpiudev); + csinfo("tpiu %s disabled\n", csdev->name); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tpiu_register + * + * Description: + * Register a tpiu devices. + * + * Input Parameters: + * desc - A description of this coresight device. + * + * Returned Value: + * Pointer to a tpiu device on success; NULL on failure. + * + ****************************************************************************/ + +FAR struct coresight_tpiu_dev_s * +tpiu_register(FAR const struct coresight_desc_s *desc) +{ + FAR struct coresight_tpiu_dev_s *tpiudev; + FAR struct coresight_dev_s *csdev; + int ret; + + tpiudev = kmm_zalloc(sizeof(struct coresight_tpiu_dev_s)); + if (tpiudev == NULL) + { + cserr("%s:malloc failed!\n", desc->name); + return NULL; + } + + csdev = &tpiudev->csdev; + csdev->ops = &g_tpiu_ops; + ret = coresight_register(csdev, desc); + if (ret < 0) + { + kmm_free(tpiudev); + cserr("%s:register failed\n", desc->name); + return NULL; + } + + return tpiudev; +} + +/**************************************************************************** + * Name: tpiu_unregister + * + * Description: + * Unregister a tpiu devices. + * + * Input Parameters: + * fundev - Pointer to the tpiu device. + * + ****************************************************************************/ + +void tpiu_unregister(FAR struct coresight_tpiu_dev_s *tpiudev) +{ + coresight_unregister(&tpiudev->csdev); + kmm_free(tpiudev); +} diff --git a/include/nuttx/coresight/coresight_tpiu.h b/include/nuttx/coresight/coresight_tpiu.h new file mode 100644 index 0000000000..9a947aedae --- /dev/null +++ b/include/nuttx/coresight/coresight_tpiu.h @@ -0,0 +1,74 @@ +/**************************************************************************** + * include/nuttx/coresight/coresight_tpiu.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_CORESIGHT_CORESIGHT_TPIU_H +#define __INCLUDE_NUTTX_CORESIGHT_CORESIGHT_TPIU_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct coresight_tpiu_dev_s +{ + struct coresight_dev_s csdev; + uint8_t refcnt; +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: tpiu_register + * + * Description: + * Register a tpiu devices. + * + * Input Parameters: + * desc - A description of this coresight device. + * + * Returned Value: + * Pointer to a tpiu device on success; NULL on failure. + * + ****************************************************************************/ + +FAR struct coresight_tpiu_dev_s * +tpiu_register(FAR const struct coresight_desc_s *desc); + +/**************************************************************************** + * Name: tpiu_unregister + * + * Description: + * Unregister a tpiu devices. + * + * Input Parameters: + * tpiudev - Pointer to the tpiu device. + * + ****************************************************************************/ + +void tpiu_unregister(FAR struct coresight_tpiu_dev_s *tpiudev); + +#endif //__INCLUDE_NUTTX_CORESIGHT_CORESIGHT_TPIU_H