Add more nops after enabling MMU for Cortex-A8

This commit is contained in:
Gregory Nutt 2014-01-07 08:38:00 -06:00
parent 25abb10ef3
commit c131e94d04
2 changed files with 7 additions and 17 deletions

View File

@ -505,14 +505,9 @@ __start:
/* Then write the configured control register */
mcr CP15_SCTLR(r0) /* Write control reg */
/* Read the Main ID register. This will be available in R1 after
* MMU trampoline (not currently used)
*/
mrc CP15_MIDR(r1) /* Read main id reg */
mov r1, r1 /* Null-avoiding nop */
mov r1, r1 /* Null-avoiding nop */
.rept 12 /* Cortex A8 wants lots of NOPs here */
nop
.endr
/* And "jump" to .Lvstart in the newly mapped virtual address space */

View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_pghead.S
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -491,14 +491,9 @@ __start:
/* Then write the configured control register */
mcr CP15_SCTLR(r0) /* Write control reg */
/* Read the Main ID register. This will be available in R1 after
* MMU trampoline (not currently used)
*/
mrc CP15_MIDR(r1) /* Read main id reg */
mov r1, r1 /* Null-avoiding nop */
mov r1, r1 /* Null-avoiding nop */
.rept 12 /* Cortex A8 wants lots of NOPs here */
nop
.endr
/* And "jump" to .Lvstart in the newly mapped virtual address space */