Update README and TODO list
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@ -82,6 +82,8 @@
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* Yields:
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*
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* PLLACK = 25 * 12MHz / 1 = 300MHz
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*
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* REVISIT: Isn't the actual multiplier = MUL+1? Is this being overclocked at 312MHz?
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*/
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#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST
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