diff --git a/arch/arm/src/armv7-r/arm_fullcontextrestore.S b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
index b23f613354..06daa22182 100644
--- a/arch/arm/src/armv7-r/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
@@ -60,7 +60,6 @@
 	.cpu	cortex-r4f
 #endif
 	.syntax	unified
-	.file	"arm_fullcontextrestore.S"
 
 /****************************************************************************
  * Public Functions
@@ -160,6 +159,7 @@ up_fullcontextrestore:
 	msr		spsr_cxsf, r1				/* Set the SPSR */
 
 	/* Now recover r0-r1, pc and cpsr, destroying the stack frame */
+
 	ldmia		sp!, {r0-r1, pc}^
 #endif
 
diff --git a/arch/arm/src/armv7-r/arm_vectors.S b/arch/arm/src/armv7-r/arm_vectors.S
index 0f088b7358..bea7c927bc 100644
--- a/arch/arm/src/armv7-r/arm_vectors.S
+++ b/arch/arm/src/armv7-r/arm_vectors.S
@@ -202,7 +202,7 @@ arm_vectorirq:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr_cxsf, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the
@@ -331,7 +331,7 @@ arm_vectorsvc:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr_cxsf, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the
@@ -913,7 +913,7 @@ arm_vectorfiq:
 	/* Restore the CPSR, SVC mode registers and return */
 
 	ldr		r1, [r0, #(4*REG_CPSR)]	/* Fetch the return SPSR */
-	msr		spsr_cxsf, r1				/* Set the return mode SPSR */
+	msr		spsr_cxsf, r1			/* Set the return mode SPSR */
 
 #ifdef CONFIG_BUILD_PROTECTED
 	/* Are we leaving in user mode?  If so then we need to restore the