stm32/stm32_foc.c: add the lower-half FOC device support
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@ -10664,3 +10664,187 @@ config STM32_QENCODER_SAMPLE_EVENT_8
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endchoice
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endmenu
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menuconfig STM32_FOC
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bool "STM32 lower-half FOC support"
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default n
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select ARCH_IRQPRIO
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select STM32_PWM_MULTICHAN
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select STM32_PWM_LL_OPS
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select STM32_ADC_LL_OPS
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select STM32_ADC_CHANGE_SAMPLETIME
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select STM32_ADC_NO_STARTUP_CONV
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select STM32_ADC_FORCE_SCAN if STM32_HAVE_IP_ADC_V1
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if STM32_FOC
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config STM32_FOC_FOC0
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bool "FOC0 device (TIM1 for PWM modulation)"
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default n
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depends on STM32_HAVE_TIM1
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select STM32_FOC_USE_TIM1
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---help---
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Enable support for FOC0 device that uses TIM1 for PWM modulation
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config STM32_FOC_FOC1
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bool "FOC1 device (TIM8 for PWM modulation)"
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default n
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depends on STM32_HAVE_TIM8
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select STM32_FOC_USE_TIM8
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---help---
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Enable support for FOC1 device that uses TIM8 for PWM modulation
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choice
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prompt "FOC ADC trigger selection"
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default STM32_FOC_ADC_TRGO
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config STM32_FOC_ADC_CCR4
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bool "FOC uses CCR4 as ADC trigger"
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---help---
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This option uses the software frequency prescaler and is
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not possible for 4-phase output.
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config STM32_FOC_ADC_TRGO
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bool "FOC uses TRGO as ADC trigger"
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depends on STM32_HAVE_IP_ADC_V2 || (STM32_HAVE_IP_ADC_V1 && !STM32_FOC_FOC1)
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select STM32_PWM_TRGO
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---help---
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This option allows you to use higher PWM frequency and works for 4-phase output.
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It is not possible for ADC IPv1 if FOC1 enabled (no T8TRGO in JEXTSEL).
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endchoice # "FOC ADC trigger selection"
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if STM32_FOC_FOC0
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choice
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prompt "FOC0 device ADC selection"
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default STM32_FOC_FOC0_ADC1
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config STM32_FOC_FOC0_ADC1
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bool "FOC0 uses ADC1"
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depends on STM32_HAVE_ADC1
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select STM32_FOC_USE_ADC1
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config STM32_FOC_FOC0_ADC2
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bool "FOC0 uses ADC2"
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depends on STM32_HAVE_ADC2
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select STM32_FOC_USE_ADC2
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config STM32_FOC_FOC0_ADC3
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bool "FOC0 uses ADC3"
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depends on STM32_HAVE_ADC3
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select STM32_FOC_USE_ADC3
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config STM32_FOC_FOC0_ADC4
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bool "FOC0 uses ADC4"
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depends on STM32_HAVE_ADC4
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select STM32_FOC_USE_ADC4
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endchoice # "FOC0 device ADC selection"
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endif # STM32_FOC_FOC0
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if STM32_FOC_FOC1
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choice
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prompt "FOC1 device ADC selection"
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default STM32_FOC_FOC1_ADC2
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config STM32_FOC_FOC1_ADC1
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bool "FOC1 uses ADC1"
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depends on STM32_HAVE_ADC1
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select STM32_FOC_USE_ADC1
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config STM32_FOC_FOC1_ADC2
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bool "FOC1 uses ADC2"
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depends on STM32_HAVE_ADC2
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select STM32_FOC_USE_ADC2
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config STM32_FOC_FOC1_ADC3
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bool "FOC1 uses ADC3"
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depends on STM32_HAVE_ADC3
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select STM32_FOC_USE_ADC3
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config STM32_FOC_FOC1_ADC4
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bool "FOC1 uses ADC4"
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depends on STM32_HAVE_ADC4
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select STM32_FOC_USE_ADC4
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endchoice # "FOC0 device ADC selection"
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endif # STM32_FOC_FOC1
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config STM32_FOC_HAS_PWM_COMPLEMENTARY
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bool "FOC PWM has complementary outputs"
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default n
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---help---
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Enable complementary outputs for the FOC PWM (sometimes called 6-PWM mode)
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# hiden variables and automatic configuration
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config STM32_FOC_USE_TIM1
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bool
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default n
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select STM32_TIM1
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select STM32_TIM1_PWM
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select STM32_TIM1_CHANNEL1
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select STM32_TIM1_CHANNEL2
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select STM32_TIM1_CHANNEL3
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select STM32_TIM1_CHANNEL4 if STM32_FOC_ADC_CCR4
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select STM32_TIM1_CH1OUT
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select STM32_TIM1_CH2OUT
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select STM32_TIM1_CH3OUT
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select STM32_TIM1_CH4OUT if STM32_FOC_ADC_CCR4
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select STM32_TIM1_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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select STM32_TIM1_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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select STM32_TIM1_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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---help---
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The TIM1 generates PWM for the FOC
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config STM32_FOC_USE_TIM8
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bool
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default n
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select STM32_TIM8
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select STM32_TIM8_PWM
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select STM32_TIM8_CHANNEL1
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select STM32_TIM8_CHANNEL2
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select STM32_TIM8_CHANNEL3
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select STM32_TIM8_CHANNEL4 if STM32_FOC_ADC_CCR4
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select STM32_TIM8_CH1OUT
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select STM32_TIM8_CH2OUT
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select STM32_TIM8_CH3OUT
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select STM32_TIM8_CH4OUT if STM32_FOC_ADC_CCR4
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select STM32_TIM8_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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select STM32_TIM8_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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select STM32_TIM8_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
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---help---
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The TIM8 generates PWM for the FOC
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config STM32_FOC_USE_ADC1
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bool
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default n
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select STM32_ADC1
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select STM32_ADC1_SCAN if STM32_HAVE_IP_ADC_V1
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select STM32_ADC1_JEXTSEL
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config STM32_FOC_USE_ADC2
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bool
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default n
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select STM32_ADC2
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select STM32_ADC2_SCAN if STM32_HAVE_IP_ADC_V1
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select STM32_ADC2_JEXTSEL
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config STM32_FOC_USE_ADC3
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bool
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default n
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select STM32_ADC3
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select STM32_ADC3_SCAN if STM32_HAVE_IP_ADC_V1
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select STM32_ADC3_JEXTSEL
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config STM32_FOC_USE_ADC4
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bool
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default n
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select STM32_ADC4
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select STM32_ADC3_JEXTSEL
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endif #STM32_FOC
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@ -269,3 +269,7 @@ endif
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ifeq ($(CONFIG_STM32_FSMC),y)
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CHIP_CSRCS += stm32_fsmc.c
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endif
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ifeq ($(CONFIG_STM32_FOC),y)
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CHIP_CSRCS += stm32_foc.c
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endif
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2271
arch/arm/src/stm32/stm32_foc.c
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2271
arch/arm/src/stm32/stm32_foc.c
Normal file
File diff suppressed because it is too large
Load Diff
188
arch/arm/src/stm32/stm32_foc.h
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188
arch/arm/src/stm32/stm32_foc.h
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@ -0,0 +1,188 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_foc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_FOC_H
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#define __ARCH_ARM_SRC_STM32_FOC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdio.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "stm32_adc.h"
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#include <nuttx/motor/foc/foc_lower.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* ADC configuration for the FOC device */
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struct stm32_foc_adc_s
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{
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/* ADC interface used by the FOC */
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uint8_t intf;
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/* The number of ADC channels (regular + injected) */
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uint8_t nchan;
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/* The number of auxliary regular channles (only for DMA transfer) */
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uint8_t regch;
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/* The list of ADC channels (regular first, then injected) */
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FAR uint8_t *chan;
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/* The list of ADC pins */
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FAR uint32_t *pins;
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/* The list of ADC channels sample time configuration */
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FAR adc_channel_t *stime;
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};
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/* Board-specific operations.
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*
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* These are calls from the lower-half to the board-specific logic.
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* They must be provided by board-specific logic even if not used.
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*/
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struct stm32_foc_board_ops_s
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{
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/* Board-specific setup */
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CODE int (*setup)(FAR struct foc_dev_s *dev);
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/* Board-specific shutdown */
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CODE int (*shutdown)(FAR struct foc_dev_s *dev);
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/* Board-specific calibration setup */
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CODE int (*calibration)(FAR struct foc_dev_s *dev, bool state);
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/* Board-specific fault clear */
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CODE int (*fault_clear)(FAR struct foc_dev_s *dev);
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/* Board-specific PWM start */
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CODE int (*pwm_start)(FAR struct foc_dev_s *dev, bool state);
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/* Get phase currents */
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CODE int (*current_get)(FAR struct foc_dev_s *dev, FAR int16_t *curr_raw,
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FAR foc_current_t *curr);
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#ifdef CONFIG_MOTOR_FOC_TRACE
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/* FOC trace interface setup */
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CODE int (*trace_init)(FAR struct foc_dev_s *dev);
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/* FOC trace */
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CODE void (*trace)(FAR struct foc_dev_s *dev, int type, bool state);
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#endif
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};
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/* Board-specific FOC data */
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struct stm32_foc_board_data_s
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{
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/* ADC configuration */
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FAR struct stm32_foc_adc_s *adc_cfg;
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/* PWM deadtime register value */
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uint8_t pwm_dt;
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/* PWM deadtime in ns */
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uint16_t pwm_dt_ns;
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/* PWM max supported duty cycle */
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foc_duty_t duty_max;
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};
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/* Board-specific FOC configuration */
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struct stm32_foc_board_s
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{
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/* Board-specific FOC operations */
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FAR struct stm32_foc_board_ops_s *ops;
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/* Board-specific FOC data */
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FAR struct stm32_foc_board_data_s *data;
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: stm32_foc_initialize
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****************************************************************************/
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FAR struct foc_dev_s *
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stm32_foc_initialize(int inst, FAR struct stm32_foc_board_s *board);
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/****************************************************************************
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* Name: stm32_foc_adcget
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****************************************************************************/
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FAR struct adc_dev_s *stm32_foc_adcget(FAR struct foc_dev_s *dev);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32_FOC_H */
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