From c1ea37742bd4e91ef13ce477b709ccd55dde6f26 Mon Sep 17 00:00:00 2001 From: Oki Minabe Date: Thu, 17 Feb 2022 00:01:00 +0900 Subject: [PATCH] fix arm FPSCR typos in comments. --- arch/arm/src/armv7-a/arm_fullcontextrestore.S | 4 ++-- arch/arm/src/armv7-a/arm_restorefpu.S | 4 ++-- arch/arm/src/armv7-a/arm_savefpu.S | 4 ++-- arch/arm/src/armv7-a/arm_saveusercontext.S | 4 ++-- arch/arm/src/armv7-m/gnu/arm_fpu.S | 14 +++++++------- arch/arm/src/armv7-r/arm_fullcontextrestore.S | 4 ++-- arch/arm/src/armv7-r/arm_restorefpu.S | 4 ++-- arch/arm/src/armv7-r/arm_savefpu.S | 4 ++-- arch/arm/src/armv7-r/arm_saveusercontext.S | 4 ++-- arch/arm/src/armv8-m/arm_fpu.S | 14 +++++++------- libs/libc/machine/arm/armv7-m/gnu/arch_setjmp.S | 6 +++--- libs/libc/machine/arm/armv8-m/gnu/arch_setjmp.S | 6 +++--- 12 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/src/armv7-a/arm_fullcontextrestore.S b/arch/arm/src/armv7-a/arm_fullcontextrestore.S index fded879383..2902e39820 100644 --- a/arch/arm/src/armv7-a/arm_fullcontextrestore.S +++ b/arch/arm/src/armv7-a/arm_fullcontextrestore.S @@ -87,11 +87,11 @@ arm_fullcontextrestore: #endif /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #endif #ifdef CONFIG_BUILD_KERNEL diff --git a/arch/arm/src/armv7-a/arm_restorefpu.S b/arch/arm/src/armv7-a/arm_restorefpu.S index b3eb162a69..33f6be3586 100644 --- a/arch/arm/src/armv7-a/arm_restorefpu.S +++ b/arch/arm/src/armv7-a/arm_restorefpu.S @@ -80,11 +80,11 @@ arm_restorefpu: #endif /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ bx lr .size arm_restorefpu, .-arm_restorefpu diff --git a/arch/arm/src/armv7-a/arm_savefpu.S b/arch/arm/src/armv7-a/arm_savefpu.S index 76ae123a3e..5abc77658f 100644 --- a/arch/arm/src/armv7-a/arm_savefpu.S +++ b/arch/arm/src/armv7-a/arm_savefpu.S @@ -84,10 +84,10 @@ arm_savefpu: #endif /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ bx lr diff --git a/arch/arm/src/armv7-a/arm_saveusercontext.S b/arch/arm/src/armv7-a/arm_saveusercontext.S index 0025cf5a4a..a994de964c 100644 --- a/arch/arm/src/armv7-a/arm_saveusercontext.S +++ b/arch/arm/src/armv7-a/arm_saveusercontext.S @@ -115,10 +115,10 @@ arm_saveusercontext: #endif /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #endif diff --git a/arch/arm/src/armv7-m/gnu/arm_fpu.S b/arch/arm/src/armv7-m/gnu/arm_fpu.S index 641632f189..cf63f642f7 100644 --- a/arch/arm/src/armv7-m/gnu/arm_fpu.S +++ b/arch/arm/src/armv7-m/gnu/arm_fpu.S @@ -87,10 +87,10 @@ arm_savefpu: vstmia r1!, {s0-s31} /* Save the full FP context */ /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #else /* Store all floating point registers */ @@ -150,7 +150,7 @@ arm_savefpu: /* Store the floating point control and status register */ - fmrx r2, fpscr /* Fetch the FPCSR */ + fmrx r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #endif bx lr @@ -193,11 +193,11 @@ arm_restorefpu: vldmia r1!, {s0-s31} /* Restore the full FP context */ /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #else /* Load all floating point registers Registers are loaded in numeric order, * s0, s1, ... in increasing address order. @@ -257,11 +257,11 @@ arm_restorefpu: #endif /* Load the floating point control and status register. r1 points t - * the address of the FPCSR register. + * the address of the FPSCR register. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - fmxr fpscr, r2 /* Restore the FPCSR */ + fmxr fpscr, r2 /* Restore the FPSCR */ #endif bx lr diff --git a/arch/arm/src/armv7-r/arm_fullcontextrestore.S b/arch/arm/src/armv7-r/arm_fullcontextrestore.S index 7824a8fa18..1d806be2e4 100644 --- a/arch/arm/src/armv7-r/arm_fullcontextrestore.S +++ b/arch/arm/src/armv7-r/arm_fullcontextrestore.S @@ -86,11 +86,11 @@ arm_fullcontextrestore: #endif /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #endif #ifdef CONFIG_BUILD_PROTECTED diff --git a/arch/arm/src/armv7-r/arm_restorefpu.S b/arch/arm/src/armv7-r/arm_restorefpu.S index 0081574a20..9ecce931a8 100644 --- a/arch/arm/src/armv7-r/arm_restorefpu.S +++ b/arch/arm/src/armv7-r/arm_restorefpu.S @@ -80,11 +80,11 @@ arm_restorefpu: #endif /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ bx lr .size arm_restorefpu, .-arm_restorefpu diff --git a/arch/arm/src/armv7-r/arm_savefpu.S b/arch/arm/src/armv7-r/arm_savefpu.S index 4234e9146b..c5ebf581a7 100644 --- a/arch/arm/src/armv7-r/arm_savefpu.S +++ b/arch/arm/src/armv7-r/arm_savefpu.S @@ -84,10 +84,10 @@ arm_savefpu: #endif /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ bx lr diff --git a/arch/arm/src/armv7-r/arm_saveusercontext.S b/arch/arm/src/armv7-r/arm_saveusercontext.S index a3af7efb1e..aec5c6647c 100644 --- a/arch/arm/src/armv7-r/arm_saveusercontext.S +++ b/arch/arm/src/armv7-r/arm_saveusercontext.S @@ -114,10 +114,10 @@ arm_saveusercontext: #endif /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #endif diff --git a/arch/arm/src/armv8-m/arm_fpu.S b/arch/arm/src/armv8-m/arm_fpu.S index e33ca2511a..5ced463059 100644 --- a/arch/arm/src/armv8-m/arm_fpu.S +++ b/arch/arm/src/armv8-m/arm_fpu.S @@ -87,10 +87,10 @@ arm_savefpu: vstmia r1!, {s0-s31} /* Save the full FP context */ /* Store the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ - vmrs r2, fpscr /* Fetch the FPCSR */ + vmrs r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #else /* Store all floating point registers */ @@ -150,7 +150,7 @@ arm_savefpu: /* Store the floating point control and status register */ - fmrx r2, fpscr /* Fetch the FPCSR */ + fmrx r2, fpscr /* Fetch the FPSCR */ str r2, [r1], #4 /* Save the floating point control and status register */ #endif bx lr @@ -193,11 +193,11 @@ arm_restorefpu: vldmia r1!, {s0-s31} /* Restore the full FP context */ /* Load the floating point control and status register. At the end of the - * vstmia, r1 will point to the FPCSR storage location. + * vstmia, r1 will point to the FPSCR storage location. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #else /* Load all floating point registers Registers are loaded in numeric order, * s0, s1, ... in increasing address order. @@ -257,11 +257,11 @@ arm_restorefpu: #endif /* Load the floating point control and status register. r1 points t - * the address of the FPCSR register. + * the address of the FPSCR register. */ ldr r2, [r1], #4 /* Fetch the floating point control and status register */ - fmxr fpscr, r2 /* Restore the FPCSR */ + fmxr fpscr, r2 /* Restore the FPSCR */ #endif bx lr diff --git a/libs/libc/machine/arm/armv7-m/gnu/arch_setjmp.S b/libs/libc/machine/arm/armv7-m/gnu/arch_setjmp.S index 710d816c1a..f1dd975a96 100644 --- a/libs/libc/machine/arm/armv7-m/gnu/arch_setjmp.S +++ b/libs/libc/machine/arm/armv7-m/gnu/arch_setjmp.S @@ -77,10 +77,10 @@ setjmp: vstmia r0!, {s16-s31} /* Save the callee-saved FP registers */ /* Store the floating point control and status register. At the end of the - * vstmia, r0 will point to the FPCSR storage location. + * vstmia, r0 will point to the FPSCR storage location. */ - vmrs r1, fpscr /* Fetch the FPCSR */ + vmrs r1, fpscr /* Fetch the FPSCR */ str r1, [r0], #4 /* Save the floating point control and status register */ /* DSA: don't need to inc r0 */ #endif /* CONFIG_ARCH_FPU */ @@ -132,7 +132,7 @@ longjmp: ldr r2, [r0], #4 /* Fetch the floating point control and status register */ /* DSA: don't need to inc r0 */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #endif /* CONFIG_ARCH_FPU */ mov r0, r1 /* return val */ diff --git a/libs/libc/machine/arm/armv8-m/gnu/arch_setjmp.S b/libs/libc/machine/arm/armv8-m/gnu/arch_setjmp.S index 8dafb50005..97ec432a6c 100644 --- a/libs/libc/machine/arm/armv8-m/gnu/arch_setjmp.S +++ b/libs/libc/machine/arm/armv8-m/gnu/arch_setjmp.S @@ -77,10 +77,10 @@ setjmp: vstmia r0!, {s16-s31} /* Save the callee-saved FP registers */ /* Store the floating point control and status register. At the end of the - * vstmia, r0 will point to the FPCSR storage location. + * vstmia, r0 will point to the FPSCR storage location. */ - vmrs r1, fpscr /* Fetch the FPCSR */ + vmrs r1, fpscr /* Fetch the FPSCR */ str r1, [r0], #4 /* Save the floating point control and status register */ /* DSA: don't need to inc r0 */ #endif /* CONFIG_ARCH_FPU */ @@ -132,7 +132,7 @@ longjmp: ldr r2, [r0], #4 /* Fetch the floating point control and status register */ /* DSA: don't need to inc r0 */ - vmsr fpscr, r2 /* Restore the FPCSR */ + vmsr fpscr, r2 /* Restore the FPSCR */ #endif /* CONFIG_ARCH_FPU */ mov r0, r1 /* return val */