arch/arm/src/stm32h7/stm32_timerisr.c: Update comments to refernce the errata related to the SysTick clock not being HCLK/8.
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@ -66,6 +66,18 @@
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* The SysTick calibration value is fixed to 18750, which gives a reference
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* time base of 1 ms with the SysTick clock set to 18.75 MHz (HCLK/8, with
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* HCLK set to 150 MHz).
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*
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* REVISIT: Per ES0392 Rev 4: STM32H743xI Errata sheet STM32H743xI device
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* limitations
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*
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* SysTick external clock is not HCLK/8
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* Description
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* The SysTick external clock is the system clock, instead of the system
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* clock divided by 8 (HCLK/8).
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* Workaround
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* Use the system clock (HCLK) as external clock and multiply the reload
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* value by 8 in STK_LOAD register (take care that the maximum value is
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* 224-1).
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*/
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#undef CONFIG_STM32H7_SYSTICK_HCLKd8
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