Documentation/NuttX.html: Update to include GreenWaves GAP8
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<tr align="center" bgcolor="#e4e4e4">
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: September 8, 2018</p>
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<p>Last Updated: October 30, 2018</p>
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</tr>
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</table>
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@ -1561,12 +1561,14 @@
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<td bgcolor="#e4e4e4" valign="top" width="33%">
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<li>Renesas/Hitachi:
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<ul>
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<li><a href="#superh">Renesas/Hitachi SuperH</a> (1/2)</li>
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<li><a href="#m16c">Renesas M16C/26</a> (1/2)</li>
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<li><a href="#superh">Renesas/Hitachi SuperH</a> (1/2)</li>
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<li><a href="#m16c">Renesas M16C/26</a> (1/2)</li>
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</ul>
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</li>
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<li><a href="#riscv">RISC-V</a> (1)
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<li><a href="#riscv">RISC-V</a> (2)
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<ul>
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<li><a href="#nr5mxx"> NEXT RISC-V NR5Mxx</a> (1)</li>
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<li><a href="#gwgap8">GreenWaves GAP8 (1)</li>
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</ul>
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</li>
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<li>Xtensa LX6:
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@ -1610,6 +1612,10 @@
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<ul>
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<li><a href="#esp32">ESP32</a> <small>(Dual Xtensa LX6)</small></li>
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</ul>
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<li>GreenWaves
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<ul>
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<li><a href="#gwgap8">GAP8</a> <small>(RISC-V RV32IM)</small></li>
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</ul>
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</li>
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<li>Host PC based simulations
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<ul>
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@ -6106,8 +6112,17 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);
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<td><br></td>
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<td>
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<p>
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<b>RISC-V Architectural Support</b>.
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Basic support for the RISC-V architecture was contributed by Ken Pettit in NuttX-7.19. The initial release is <i>thin</i> but a great starting point for anyone interested in RISC-V development with NuttX.
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<a name="nr5mxx"><b>RISC-V Architectural Support</b></a>.
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Basic support for the RISC-V architecture was contributed by Ken Pettit in NuttX-7.19.
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This support is for a custom NEXT RISC-V NR5Mxx (RV32IM).
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The initial release is <i>thin</i> but a great starting point for anyone interested in RISC-V development with NuttX.
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</p>
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<p>
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<a name="gwgap8"><b>GreenWaves GAP8 (RV32IM)</b></a>.
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Basic support GreenWaves GAP8 <i>gapuino</i> board was added by hhuysqt in NuttX-7.27.
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The GAP8 is a 1+8-core DSP-like RISC-V MCU.
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The GAP8 features a RI5CY core called Fabric Controller(FC), and a cluster of 8 RI5CY cores that runs at a bit slower speed.
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The GAP8 is an implementation of the opensource PULP platform, a Parallel-Ultra-Low-Power design.
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</p>
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</td>
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