SAMV7 MCAN driver is code complete (with some missing functionality)
This commit is contained in:
Gregory Nutt
parent
c8923bb6fc
commit
c30cfe2025
@ -1454,24 +1454,30 @@ choice
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config SAMV7_MCAN0_RXFIFO0_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN0_RXFIFO0_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO0_64BYTES
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bool "64 bytes"
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@ -1491,24 +1497,30 @@ choice
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config SAMV7_MCAN0_RXFIFO1_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN0_RXFIFO1_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXFIFO1_64BYTES
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bool "64 bytes"
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@ -1528,24 +1540,30 @@ choice
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config SAMV7_MCAN0_RXBUFFER_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN0_RXBUFFER_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN0_RXBUFFER_64BYTES
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bool "64 bytes"
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@ -1568,24 +1586,30 @@ choice
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config SAMV7_MCAN0_TXBUFFER_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN0_TXBUFFER_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN0_TXBUFFER_64BYTES
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bool "64 bytes"
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@ -1738,24 +1762,30 @@ choice
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config SAMV7_MCAN1_RXFIFO0_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN1_RXFIFO0_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO0_64BYTES
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bool "64 bytes"
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@ -1775,24 +1805,30 @@ choice
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config SAMV7_MCAN1_RXFIFO1_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN1_RXFIFO1_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXFIFO1_64BYTES
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bool "64 bytes"
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@ -1812,24 +1848,30 @@ choice
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config SAMV7_MCAN1_RXBUFFER_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN1_RXBUFFER_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE
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config SAMV7_MCAN1_RXBUFFER_64BYTES
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bool "64 bytes"
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@ -1852,24 +1894,30 @@ choice
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config SAMV7_MCAN1_TXBUFFER_8BYTES
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bool "8 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_12BYTES
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bool "12 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_16BYTES
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bool "16 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_20BYTES
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bool "20 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_24BYTES
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bool "24 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN1_TXBUFFER_48BYTES
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bool "48 bytes"
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depends on !ARMV7M_DCACHE || ARMV7M_DCACHE_WRITETHROUGH
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config SAMV7_MCAN1_TXBUFFER_64BYTES
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bool "64 bytes"
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@ -350,7 +350,7 @@
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* the 8-byte (2 word boundaries). However, if the data cache is enabled
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* the a higher level of alignment is required. That is because the data
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* will need to be invalidated and that cache invalidation will occur in
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* multiples of full change lines.
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* multiples of full cache lines.
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*
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* In addition, padding may be required at the ends of the descriptors and
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* buffers to protect data after the end of from invalidation.
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@ -109,6 +109,21 @@
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#define SAMV7_MCANCLK_FREQUENCY \
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(SAMV7_MCAN_CLKSRC_FREQUENCY / CONFIG_SAMV7_MCAN_CLKSRC_PRESCALER)
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/* Buffer Alignment *********************************************************/
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/* Buffer Alignment.
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*
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* The MCAN peripheral does not require any data be aligned. However, if
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* the data cache is enabled then alignment is required. That is because
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* the data will need to be invalidated and that cache invalidation will
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* occur in multiples of full change lines.
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*/
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#ifdef CONFIG_ARMV7M_DCACHE
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# define MCAN_ALIGN ARMV7M_DCACHE_LINESIZE
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# define MCAN_ALIGN_MASK (MCAN_ALIGN-1)
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# define MCAN_ALIGN_UP(n) (((n) + MCAN_ALIGN_MASK) & ~MCAN_ALIGN_MASK)
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#endif
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/* MCAN0 Configuration ******************************************************/
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#ifdef CONFIG_SAMV7_MCAN0
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@ -155,30 +170,34 @@
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ENCODED_SIZE 0
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_12BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 12
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# define MCAN0_RXFIFO0_ENCODED_SIZE 1
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_16BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 16
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# define MCAN0_RXFIFO0_ENCODED_SIZE 2
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_20BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 20
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# define MCAN0_RXFIFO0_ENCODED_SIZE 3
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_24BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 24
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# define MCAN0_RXFIFO0_ENCODED_SIZE 4
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_32BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 32
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# define MCAN0_RXFIFO0_ENCODED_SIZE 5
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_48BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 48
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# define MCAN0_RXFIFO0_ENCODED_SIZE 6
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO0_64BYTES)
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO0_ELEMENT_SIZE 64
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# define MCAN0_RXFIFO0_ENCODED_SIZE 7
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# else
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# error Undefined MCAN0 RX FIFO0 element size
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# endif
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#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN0_RXFIFO0_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
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# error RXFIFO0 element size must be a multiple of the D-Cache line size
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#endif
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# ifndef CONFIG_SAMV7_MCAN0_RXFIFO0_SIZE
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# define CONFIG_SAMV7_MCAN0_RXFIFO0_SIZE 0
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# endif
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@ -196,30 +215,34 @@
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ENCODED_SIZE 0
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_12BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 12
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# define MCAN0_RXFIFO1_ENCODED_SIZE 1
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_16BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 16
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# define MCAN0_RXFIFO1_ENCODED_SIZE 2
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_20BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 20
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# define MCAN0_RXFIFO1_ENCODED_SIZE 3
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_24BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 24
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# define MCAN0_RXFIFO1_ENCODED_SIZE 4
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_32BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 32
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# define MCAN0_RXFIFO1_ENCODED_SIZE 5
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_48BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 48
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# define MCAN0_RXFIFO1_ENCODED_SIZE 6
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# elif defined(CONFIG_SAMV7_MCAN0_RXFIFO1_64BYTES)
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 8
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# define MCAN0_RXFIFO1_ELEMENT_SIZE 64
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# define MCAN0_RXFIFO1_ENCODED_SIZE 7
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# else
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# error Undefined MCAN0 RX FIFO1 element size
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# endif
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#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN0_RXFIFO1_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
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# error RXFIFO1 element size must be a multiple of the D-Cache line size
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#endif
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# ifndef CONFIG_SAMV7_MCAN0_RXFIFO1_SIZE
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# define CONFIG_SAMV7_MCAN0_RXFIFO1_SIZE 0
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# endif
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@ -258,30 +281,34 @@
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ENCODED_SIZE 0
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_12BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 12
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# define MCAN0_RXBUFFER_ENCODED_SIZE 1
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_16BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 16
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# define MCAN0_RXBUFFER_ENCODED_SIZE 2
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_20BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 20
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# define MCAN0_RXBUFFER_ENCODED_SIZE 3
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_24BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 24
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# define MCAN0_RXBUFFER_ENCODED_SIZE 4
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_32BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 32
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# define MCAN0_RXBUFFER_ENCODED_SIZE 5
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_48BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 48
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# define MCAN0_RXBUFFER_ENCODED_SIZE 6
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# elif defined(CONFIG_SAMV7_MCAN0_RXBUFFER_64BYTES)
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_RXBUFFER_ELEMENT_SIZE 64
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# define MCAN0_RXBUFFER_ENCODED_SIZE 7
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# else
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# error Undefined MCAN0 RX buffer element size
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# endif
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#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN0_RXBUFFER_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
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# error RXBUFFER element size must be a multiple of the D-Cache line size
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#endif
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# ifndef CONFIG_SAMV7_MCAN0_DEDICATED_RXBUFFER_SIZE
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# define CONFIG_SAMV7_MCAN0_DEDICATED_RXBUFFER_SIZE 0
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# endif
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@ -300,30 +327,35 @@
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# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_TXBUFFER_ENCODED_SIZE 0
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# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_12BYTES)
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# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
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# define MCAN0_TXBUFFER_ELEMENT_SIZE 12
|
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# define MCAN0_TXBUFFER_ENCODED_SIZE 1
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_16BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 16
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 2
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_20BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 20
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 3
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_24BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 24
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 4
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_32BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 32
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 5
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_48BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 48
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 6
|
||||
# elif defined(CONFIG_SAMV7_MCAN0_TXBUFFER_64BYTES)
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN0_TXBUFFER_ELEMENT_SIZE 64
|
||||
# define MCAN0_TXBUFFER_ENCODED_SIZE 7
|
||||
# else
|
||||
# error Undefined MCAN0 TX buffer element size
|
||||
# endif
|
||||
|
||||
#if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH) && \
|
||||
(MCAN0_TXBUFFER_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
|
||||
# error TXBUFFER element size must be a multiple of the D-Cache line size
|
||||
#endif
|
||||
|
||||
# ifndef CONFIG_SAMV7_MCAN0_DEDICATED_TXBUFFER_SIZE
|
||||
# define CONFIG_SAMV7_MCAN0_DEDICATED_TXBUFFER_SIZE 0
|
||||
# endif
|
||||
@ -421,30 +453,34 @@
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 0
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_12BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 12
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 1
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_16BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 16
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 2
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_20BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 20
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 3
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_24BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 24
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 4
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_32BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 32
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 5
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_48BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 48
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 6
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO0_64BYTES)
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO0_ELEMENT_SIZE 64
|
||||
# define MCAN1_RXFIFO0_ENCODED_SIZE 7
|
||||
# else
|
||||
# error Undefined MCAN1 RX FIFO0 element size
|
||||
# endif
|
||||
|
||||
#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN1_RXFIFO0_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
|
||||
# error RXFIFO0 element size must be a multiple of the D-Cache line size
|
||||
#endif
|
||||
|
||||
# ifndef CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE
|
||||
# define CONFIG_SAMV7_MCAN1_RXFIFO0_SIZE 0
|
||||
# endif
|
||||
@ -462,30 +498,34 @@
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 0
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_12BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 12
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 1
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_16BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 16
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 2
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_20BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 20
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 3
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_24BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 24
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 4
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_32BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 32
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 5
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_48BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 48
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 6
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXFIFO1_64BYTES)
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXFIFO1_ELEMENT_SIZE 64
|
||||
# define MCAN1_RXFIFO1_ENCODED_SIZE 7
|
||||
# else
|
||||
# error Undefined MCAN1 RX FIFO1 element size
|
||||
# endif
|
||||
|
||||
#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN1_RXFIFO1_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
|
||||
# error RXFIFO1 element size must be a multiple of the D-Cache line size
|
||||
#endif
|
||||
|
||||
# ifndef CONFIG_SAMV7_MCAN1_RXFIFO1_SIZE
|
||||
# define CONFIG_SAMV7_MCAN1_RXFIFO1_SIZE 0
|
||||
# endif
|
||||
@ -524,30 +564,34 @@
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 0
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_12BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 12
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 1
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_16BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 16
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 2
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_20BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 20
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 3
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_24BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 24
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 4
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_32BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 32
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 5
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_48BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 48
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 6
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_RXBUFFER_64BYTES)
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_RXBUFFER_ELEMENT_SIZE 64
|
||||
# define MCAN1_RXBUFFER_ENCODED_SIZE 7
|
||||
# else
|
||||
# error Undefined MCAN1 RX buffer element size
|
||||
# endif
|
||||
|
||||
#if defined(CONFIG_ARMV7M_DCACHE) && (MCAN1_RXBUFFER_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
|
||||
# error RXBUFFER element size must be a multiple of the D-Cache line size
|
||||
#endif
|
||||
|
||||
# ifndef CONFIG_SAMV7_MCAN1_DEDICATED_RXBUFFER_SIZE
|
||||
# define CONFIG_SAMV7_MCAN1_DEDICATED_RXBUFFER_SIZE 0
|
||||
# endif
|
||||
@ -566,30 +610,35 @@
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 0
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_12BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 12
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 1
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_16BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 16
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 2
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_20BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 20
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 3
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_24BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 24
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 4
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_32BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 32
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 5
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_48BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 48
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 6
|
||||
# elif defined(CONFIG_SAMV7_MCAN1_TXBUFFER_64BYTES)
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 8
|
||||
# define MCAN1_TXBUFFER_ELEMENT_SIZE 64
|
||||
# define MCAN1_TXBUFFER_ENCODED_SIZE 7
|
||||
# else
|
||||
# error Undefined MCAN1 TX buffer element size
|
||||
# endif
|
||||
|
||||
#if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH) && \
|
||||
(MCAN1_TXBUFFER_ELEMENT_SIZE & MCAN_ALIGN_MASK) != 0
|
||||
# error TXBUFFER element size must be a multiple of the D-Cache line size
|
||||
#endif
|
||||
|
||||
# ifndef CONFIG_SAMV7_MCAN1_DEDICATED_TXBUFFER_SIZE
|
||||
# define CONFIG_SAMV7_MCAN1_DEDICATED_TXBUFFER_SIZE 0
|
||||
# endif
|
||||
@ -910,7 +959,12 @@ static const struct can_ops_s g_mcanops =
|
||||
#ifdef CONFIG_SAMV7_MCAN0
|
||||
/* Message RAM allocation */
|
||||
|
||||
static uint32_t g_mcan0_msgram[MCAN0_MSGRAM_WORDS];
|
||||
static uint32_t g_mcan0_msgram[MCAN0_MSGRAM_WORDS]
|
||||
#ifdef CONFIG_ARMV7M_DCACHE
|
||||
__attribute__((aligned(MCAN_ALIGN)));
|
||||
#else
|
||||
;
|
||||
#endif
|
||||
|
||||
/* Constant configuration */
|
||||
|
||||
@ -981,7 +1035,12 @@ static struct can_dev_s g_mcan0dev;
|
||||
#ifdef CONFIG_SAMV7_MCAN1
|
||||
/* MCAN1 message RAM allocation */
|
||||
|
||||
static uint32_t g_mcan1_msgram[MCAN1_MSGRAM_WORDS];
|
||||
static uint32_t g_mcan1_msgram[MCAN1_MSGRAM_WORDS]
|
||||
#ifdef CONFIG_ARMV7M_DCACHE
|
||||
__attribute__((aligned(MCAN_ALIGN)));
|
||||
#else
|
||||
;
|
||||
#endif
|
||||
|
||||
/* MCAN1 constant configuration */
|
||||
|
||||
@ -1458,8 +1517,9 @@ static void mcan_reset(FAR struct can_dev_s *dev)
|
||||
mcan_putreg(priv, SAM_MCAN_IE_OFFSET, 0);
|
||||
mcan_putreg(priv, SAM_MCAN_TXBTIE_OFFSET, 0);
|
||||
|
||||
/* Disable the MCAN controller */
|
||||
#warning Missing logic
|
||||
/* Disable peripheral clocking to the MCAN controller */
|
||||
|
||||
sam_disableperiph1(priv->config->pid);
|
||||
mcan_dev_unlock(priv);
|
||||
}
|
||||
|
||||
@ -2007,7 +2067,6 @@ bool mcan_dedicated_rxbuffer_available(FAR struct sam_mcan_s *priv, int bufndx)
|
||||
static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
|
||||
unsigned long nbytes)
|
||||
{
|
||||
FAR struct sam_mcan_s *priv = dev->cd_priv;
|
||||
struct can_hdr_s hdr;
|
||||
uint32_t regval;
|
||||
int ret;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user