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arch: arm: include: nxstyle fixes

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nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2021-03-21 11:37:01 +01:00 committed by Xiang Xiao
parent 4daa276903
commit c39339a7a8
182 changed files with 2444 additions and 2013 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
arch/arm/include/a1x/a10_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/a1x/a10_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_A1X_A10_IRQ_H
#define __ARCH_ARM_INCLUDE_A1X_A10_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts numbers */
@ -173,21 +173,21 @@
#define NR_IRQS (A1X_IRQ_NINT + A1X_PIO_NINT)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Inline functions
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

26
arch/arm/include/a1x/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/a1x/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_A1X_CHIP_H
#define __ARCH_ARM_INCLUDE_A1X_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* A1X Family */
@ -39,16 +39,16 @@
# error Unrecognized A1X chip
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Functions Prototypes
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_A1X_CHIP_H */

30
arch/arm/include/a1x/irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/a1x/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_A1X_IRQ_H
#define __ARCH_ARM_INCLUDE_A1X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/a1x/chip.h>
@ -40,19 +40,19 @@
# error Unrecognized A1X chip
#endif
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
@ -62,9 +62,9 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

35
arch/arm/include/am335x/am335x_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/am335x/am335x_irq.h
*
* Copyright (C) 2019 Petro Karashchenko. All rights reserved.
@ -31,24 +31,25 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_AM335X_AM335X_IRQ_H
#define __ARCH_ARM_INCLUDE_AM335X_AM335X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts numbers */
/* Interrupt number list */
#define AM335X_IRQ_EMU (0) /* Emulation interrupt */
@ -320,21 +321,21 @@
AM335X_NGPIO0IRQS + AM335X_NGPIO1IRQS + \
AM335X_NGPIO2IRQS + AM335X_NGPIO3IRQS )
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Inline functions
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

28
arch/arm/include/am335x/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/am335x/chip.h
*
* Copyright (C) 2018 Petro Karashchenko. All rights reserved.
@ -31,20 +31,20 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_AM335X_CHIP_H
#define __ARCH_ARM_INCLUDE_AM335X_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* AM335X Family */
@ -54,16 +54,16 @@
# error Unrecognized AM335X chip
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_AM335X_CHIP_H */

32
arch/arm/include/am335x/irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/am335x/irq.h
*
* Copyright (C) 2019 Petro Karashchenko. All rights reserved.
@ -31,26 +31,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_AM335X_IRQ_H
#define __ARCH_ARM_INCLUDE_AM335X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/am335x/chip.h>
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/* Chip-Specific External interrupts */
#if defined(CONFIG_ARCH_CHIP_AM335X)
@ -59,15 +55,19 @@
# error Unrecognized AM335X chip
#endif
/****************************************************************************************
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
@ -77,9 +77,9 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

2
arch/arm/include/arch.h
View File

@ -37,7 +37,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#ifdef CONFIG_PIC

4
arch/arm/include/arm/irq.h
View File

@ -35,7 +35,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format:
@ -172,7 +172,7 @@ struct xcptcontext
* leave_critical section(), are probably what you really want.
*/
/* Save the current interrupt enable state & disable IRQs. */
/* Save the current interrupt enable state & disable IRQs. */
static inline irqstate_t up_irq_save(void)
{

2
arch/arm/include/arm/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define SYS_syscall 0x00

8
arch/arm/include/armv6-m/irq.h
View File

@ -40,10 +40,14 @@
#include <arch/chip/chip.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Configuration ************************************************************/
/* If this is a kernel build, how many nested system calls should we support? */
/* If this is a kernel build,
* how many nested system calls should we support?
*/
#ifndef CONFIG_SYS_NNEST
# define CONFIG_SYS_NNEST 2

2
arch/arm/include/armv6-m/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* This is the value used as the argument to the SVC instruction. It is not

2
arch/arm/include/armv7-a/irq.h
View File

@ -38,7 +38,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format:

2
arch/arm/include/armv7-a/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define SYS_syscall 0x00

2
arch/arm/include/armv7-m/irq.h
View File

@ -47,7 +47,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Configuration ************************************************************/

2
arch/arm/include/armv7-m/irq_cmnvector.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format: */

2
arch/arm/include/armv7-m/irq_lazyfpu.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format: */

14
arch/arm/include/armv7-m/nvicpri.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/armv7-m/nvicpri.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ARM7_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARM7_M_NVICPRI_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <arch/chip/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* If CONFIG_ARMV7M_USEBASEPRI is selected, then interrupts will be disabled
* by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most

2
arch/arm/include/armv7-m/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* This is the value used as the argument to the SVC instruction. It is not

2
arch/arm/include/armv7-r/irq.h
View File

@ -38,7 +38,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format:

2
arch/arm/include/armv7-r/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define SYS_syscall 0x00

2
arch/arm/include/armv8-m/irq.h
View File

@ -47,7 +47,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Configuration ************************************************************/

2
arch/arm/include/armv8-m/irq_cmnvector.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format: */

2
arch/arm/include/armv8-m/irq_lazyfpu.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ Stack Frame Format: */

14
arch/arm/include/armv8-m/nvicpri.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/armv8-m/nvicpri.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ARM8_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARM8_M_NVICPRI_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <arch/chip/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* If CONFIG_ARMV8M_USEBASEPRI is selected, then interrupts will be disabled
* by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most

2
arch/arm/include/armv8-m/syscall.h
View File

@ -36,7 +36,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* This is the value used as the argument to the SVC instruction. It is not

2
arch/arm/include/c5471/irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* C5471 Interrupts */

2
arch/arm/include/cxd56xx/adc.h
View File

@ -45,7 +45,7 @@
#include <nuttx/analog/ioctl.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define ANIOC_USER (AN_FIRST + AN_NCMDS)

2
arch/arm/include/cxd56xx/audio.h
View File

@ -57,7 +57,7 @@
#include <stdbool.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Mic channel max. */

2
arch/arm/include/cxd56xx/battery_ioctl.h
View File

@ -43,7 +43,7 @@
#include <nuttx/fs/ioctl.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* ioctl commands */

2
arch/arm/include/cxd56xx/chip.h
View File

@ -22,7 +22,7 @@
#define __ARCH_ARM_INCLUDE_CXD56XX_CHIP_H
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define CXD56M4_SYSH_PRIORITY_MIN 0xe0 /* All bits[7:5] set is minimum priority */

2
arch/arm/include/cxd56xx/crashdump.h
View File

@ -47,7 +47,7 @@
#include <nuttx/irq.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Configuration ************************************************************/

2
arch/arm/include/cxd56xx/irq.h
View File

@ -34,7 +34,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map

4
arch/arm/include/cxd56xx/pin.h
View File

@ -28,10 +28,10 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Pin number Definitions */
/* Pin number Prototypes */
#define PIN_RTC_CLK_IN (0)

4
arch/arm/include/cxd56xx/pm.h
View File

@ -43,7 +43,7 @@
#include <queue.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Boot Cause definitions */
@ -138,7 +138,7 @@ struct pm_cpu_wakelock_s
uint32_t info;
};
/* Definitions for pmic notify */
/* Prototypes for pmic notify */
enum pmic_notify_e
{

2
arch/arm/include/cxd56xx/scu.h
View File

@ -45,7 +45,7 @@
#include <nuttx/fs/ioctl.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define _SCUIOCBASE (0xa000)

2
arch/arm/include/cxd56xx/timer.h
View File

@ -43,7 +43,7 @@
#include <nuttx/timers/timer.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Set callback handler

2
arch/arm/include/cxd56xx/usbdev.h
View File

@ -41,7 +41,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* BOARDIOC_USBDEV_SETNOTIFYSIG signal value ********************************/

2
arch/arm/include/dm320/irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* DM320 Interrupts */

22
arch/arm/include/efm32/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/efm32/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,29 +16,29 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_EFM32_CHIP_H
#define __ARCH_ARM_INCLUDE_EFM32_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* EFM32 EnergyMicro ****************************************************************/
/* EFM32 EnergyMicro ********************************************************/
/* Tiny Gecko with 32KiB FLASH and 4KiB RAM in a QFN64 package */
#if defined(CONFIG_ARCH_CHIP_EFM32TG840F32)
/* Gecko with 128KiB FLASH and 16KiB SRAM in LQFP100 (EFM32G880F128) or BGA112
* (EFM32G890F128) package
/* Gecko with 128KiB FLASH and 16KiB SRAM in LQFP100 (EFM32G880F128) or
* BGA112 (EFM32G890F128) package
*/
#elif defined(CONFIG_ARCH_CHIP_EFM32G880F128) || \
@ -55,7 +55,7 @@
# error "Unsupported EFM32 chip"
#endif
/* NVIC priority levels *************************************************************/
/* NVIC priority levels *****************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [7:5] set in minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */

7
arch/arm/include/efm32/efm32g_irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
@ -42,7 +42,8 @@
*
* External interrupts (vectors >= 16)
*/
/* IRQ# Source */
/* IRQ# Source */
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS + 0) /* 0 DMA */
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS + 1) /* 1 GPIO_EVEN */
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS + 2) /* 2 TIMER0 */
@ -95,7 +96,7 @@ extern "C"
#endif
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN

4
arch/arm/include/efm32/efm32gg_irq.h
View File

@ -45,7 +45,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
@ -119,7 +119,7 @@ extern "C"
#endif
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN

4
arch/arm/include/efm32/efm32tg_irq.h
View File

@ -45,7 +45,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
@ -103,7 +103,7 @@ extern "C"
#endif
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN

70
arch/arm/include/efm32/irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/efm32/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,30 +16,41 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_EFM32_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/efm32/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if defined(CONFIG_EFM32_EFM32TG)
# include <arch/efm32/efm32tg_irq.h>
#elif defined(CONFIG_EFM32_EFM32G)
# include <arch/efm32/efm32g_irq.h>
#elif defined(CONFIG_EFM32_EFM32GG)
# include <arch/efm32/efm32gg_irq.h>
#else
# error "Unsupported EFM32 chip"
#endif
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
*/
@ -59,25 +70,18 @@
#define EFM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define EFM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
/* External interrupts (vectors >= 16).
* These definitions are chip-specific
*/
#define EFM32_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */
#if defined(CONFIG_EFM32_EFM32TG)
# include <arch/efm32/efm32tg_irq.h>
#elif defined(CONFIG_EFM32_EFM32G)
# include <arch/efm32/efm32g_irq.h>
#elif defined(CONFIG_EFM32_EFM32GG)
# include <arch/efm32/efm32gg_irq.h>
#else
# error "Unsupported EFM32 chip"
#endif
#ifdef CONFIG_EFM32_GPIO_IRQ
/* If GPIO interrupt support is enabled then up to 16 additional GPIO interrupt
* sources are available. There are actually only two physical interrupt lines:
* GPIO_EVEN and GPIO_ODD. However, from the software point of view, there are
* 16-additional interrupts generated from a second level of decoding.
/* If GPIO interrupt support is enabled then up to 16 additional GPIO
* interrupt sources are available. There are actually only two physical
* interrupt lines: GPIO_EVEN and GPIO_ODD. However, from the software point
* of view, there are 16-additional interrupts generated from a second level
* of decoding.
*/
# define EFM32_IRQ_EXTI0 (EFM32_IRQ_NVECTORS + 0) /* Port[n], pin0 external interrupt */
@ -102,13 +106,13 @@
# define NR_IRQS EFM32_IRQ_NVECTORS /* Total number of interrupts */
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -119,9 +123,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

12
arch/arm/include/elf.h
View File

@ -26,14 +26,15 @@
#define __ARCH_ARM_INCLUDE_ELF_H
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* 4.3.1 ELF Identification. Should have:
*
* e_machine = EM_ARM
* e_ident[EI_CLASS] = ELFCLASS32
* e_ident[EI_DATA] = ELFDATA2LSB (little endian) or ELFDATA2MSB (big endian)
* e_ident[EI_DATA] = ELFDATA2LSB (little endian) or
* ELFDATA2MSB (big endian)
*/
#if 0 /* Defined in include/elf32.h */
@ -65,9 +66,10 @@
* S (when used on its own) is the address of the symbol.
* A is the addend for the relocation.
* P is the address of the place being relocated (derived from r_offset).
* Pa is the adjusted address of the place being relocated, defined as (P & 0xFFFFFFFC).
* T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction;
* it is 0 otherwise.
* Pa is the adjusted address of the place being relocated, defined as
* (P & 0xFFFFFFFC).
* T is 1 if the target symbol S has type STT_FUNC and the symbol addresses
* a Thumb instruction; it is 0 otherwise.
* B(S) is the addressing origin of the output segment defining the symbol S.
* GOT_ORG is the addressing origin of the Global Offset Table
* GOT(S) is the address of the GOT entry for the symbol S.

2
arch/arm/include/eoss3/chip.h
View File

@ -28,7 +28,7 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* EOS S3 Support 8 Levels of priority.

2
arch/arm/include/eoss3/irq.h
View File

@ -28,7 +28,7 @@
#include <arch/eoss3/chip.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Common Processor Exceptions (vectors 0-15) */

2
arch/arm/include/imx1/irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* i.MX1 Interrupts */

5
arch/arm/include/imx6/chip.h
View File

@ -28,8 +28,9 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* The i.MX6 6Quad and 6Dual/DualLite are the only support i.MX6 family
* members. Individual differences between members of the families are not
* accounted for.
@ -108,7 +109,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_IMX6_CHIP_H */

7
arch/arm/include/imx6/irq.h
View File

@ -18,8 +18,8 @@
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
& through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_IMX6_IRQ_H
@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* The Global Interrupt Controller (GIC) collects up to 128 interrupt
@ -47,6 +47,7 @@
*/
/* Private Peripheral Interrupts (PPI) **************************************/
/* Each Cortex-A9 processor has private interrupts, ID0-ID15, that can only
* be triggered by software. These interrupts are aliased so that there is
* no requirement for a requesting Cortex-A9 processor to determine its own

31
arch/arm/include/imxrt/chip.h
View File

@ -1,4 +1,4 @@
/*****************************************************************************
/****************************************************************************
* arch/arm/include/imxrt/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
*****************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_IMXRT_CHIP_H
#define __ARCH_ARM_INCLUDE_IMXRT_CHIP_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/*****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
@ -77,7 +77,8 @@
# error "Unknown i.MX RT chip type"
#endif
/* NVIC priority levels ******************************************************
/* NVIC priority levels *****************************************************/
/* Each priority field holds an 8-bit priority value, 0-15. The lower the
* value, the greater the priority of the corresponding interrupt. The i.MX
* RT processor implements only bits[7:4] of each field, bits[3:0] read as
@ -89,16 +90,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Two bits of interrupt pri used */
/*****************************************************************************
/****************************************************************************
* Public Types
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Public Data
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
* Public Functions
*****************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_IMXRT_CHIP_H */

82
arch/arm/include/imxrt/imxrt102x_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/imxrt/imxrt102x_irq.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -32,24 +32,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_IMXRT_IMXRT102X_IRQ_H
#define __ARCH_ARM_INCLUDE_IMXRT_IMXRT102X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts (priority levels >= 256) *****************************************/
/* External interrupts (priority levels >= 256) *****************************/
#define IMXRT_IRQ_EDMA0_16 (IMXRT_IRQ_EXTINT + 0) /* eDMA Channel 0/16 Transfer Complete */
#define IMXRT_IRQ_EDMA1_17 (IMXRT_IRQ_EXTINT + 1) /* eDMA Channel 1/17 Transfer Complete */
@ -91,10 +91,14 @@
#define IMXRT_IRQ_CAN2 (IMXRT_IRQ_EXTINT + 37) /* CAN2 interrupt */
#define IMXRT_IRQ_CM7FR (IMXRT_IRQ_EXTINT + 38) /* FlexRAM address fault */
#define IMXRT_IRQ_KPP (IMXRT_IRQ_EXTINT + 39) /* Keypad Interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 40) RESERVED */
#define IMXRT_IRQ_GPRIRQ (IMXRT_IRQ_EXTINT + 41) /* Notify cores on exception while boot */
/* RESERVED (IMXRT_IRQ_EXTINT + 42) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 43) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 44) RESERVED */
#define IMXRT_IRQ_WDOG2 (IMXRT_IRQ_EXTINT + 45) /* Watchdog Timer reset */
#define IMXRT_IRQ_SNVS (IMXRT_IRQ_EXTINT + 46) /* SNVS Functional Interrupt */
@ -103,8 +107,10 @@
#define IMXRT_IRQ_CSU (IMXRT_IRQ_EXTINT + 49) /* CSU Interrupt Request 1 */
#define IMXRT_IRQ_DCP (IMXRT_IRQ_EXTINT + 50) /* DCP channel/CRC interrupts (channel != 0) */
#define IMXRT_IRQ_DCP0 (IMXRT_IRQ_EXTINT + 51) /* DCP channel 0 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 52) RESERVED */
#define IMXRT_IRQ_TRNG (IMXRT_IRQ_EXTINT + 53) /* TRNG Interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 54) RESERVED */
#define IMXRT_IRQ_BEE (IMXRT_IRQ_EXTINT + 55) /* BEE IRQ */
#define IMXRT_IRQ_SAI1 (IMXRT_IRQ_EXTINT + 56) /* SAI1 interrupt (RX/TX) */
@ -113,15 +119,19 @@
#define IMXRT_IRQ_SAI3TX (IMXRT_IRQ_EXTINT + 59) /* SAI3 TX interrupt (RX/TX) */
#define IMXRT_IRQ_SPDIF (IMXRT_IRQ_EXTINT + 60) /* SPDIF interrupt */
#define IMXRT_IRQ_PMU (IMXRT_IRQ_EXTINT + 61) /* Brown-out event 1.1, 2.5 or 3.0 regulators */
/* RESERVED (IMXRT_IRQ_EXTINT + 62) RESERVED */
#define IMXRT_IRQ_TEMP (IMXRT_IRQ_EXTINT + 63) /* Temperature Monitor */
#define IMXRT_IRQ_TEMPPANIC (IMXRT_IRQ_EXTINT + 64) /* TempSensor panic */
#define IMXRT_IRQ_USBPHY0 (IMXRT_IRQ_EXTINT + 65) /* USBPHY (UTMI0) interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 66) RESERVED */
#define IMXRT_IRQ_ADC1 (IMXRT_IRQ_EXTINT + 67) /* ADC1 interrupt */
#define IMXRT_IRQ_ADC2 (IMXRT_IRQ_EXTINT + 68) /* ADC2 interrupt */
#define IMXRT_IRQ_DCDC (IMXRT_IRQ_EXTINT + 69) /* DCDC interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 70) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 71) RESERVED */
#define IMXRT_IRQ_GPIO1_0 (IMXRT_IRQ_EXTINT + 72) /* GPIO1 INT0 interrupt */
#define IMXRT_IRQ_GPIO1_1 (IMXRT_IRQ_EXTINT + 73) /* GPIO1 INT1 interrupt */
@ -137,11 +147,14 @@
#define IMXRT_IRQ_GPIO2_16_31 (IMXRT_IRQ_EXTINT + 83) /* GPIO2 INT16-31 interrupt */
#define IMXRT_IRQ_GPIO3_0_15 (IMXRT_IRQ_EXTINT + 84) /* GPIO3 INT0-15 interrupt */
#define IMXRT_IRQ_GPIO3_16_31 (IMXRT_IRQ_EXTINT + 85) /* GPIO3 INT16-31 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 86) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 87) RESERVED */
#define IMXRT_IRQ_GPIO5_0_15 (IMXRT_IRQ_EXTINT + 88) /* GPIO5 INT0-15 interrupt */
#define IMXRT_IRQ_GPIO5_16_31 (IMXRT_IRQ_EXTINT + 89) /* GPIO5 INT16-31 interrupt */
#define IMXRT_IRQ_FLEXIO1 (IMXRT_IRQ_EXTINT + 90) /* FlexIO Interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 91) RESERVED */
#define IMXRT_IRQ_WDOG1 (IMXRT_IRQ_EXTINT + 92) /* Watchdog Timer reset */
#define IMXRT_IRQ_RTWDOG (IMXRT_IRQ_EXTINT + 93) /* Watchdog Timer reset */
@ -150,6 +163,7 @@
#define IMXRT_IRQ_CCM_2 (IMXRT_IRQ_EXTINT + 96) /* CCM interrupt 2 */
#define IMXRT_IRQ_GPC (IMXRT_IRQ_EXTINT + 97) /* GPC interrupt 1 */
#define IMXRT_IRQ_SRC (IMXRT_IRQ_EXTINT + 98) /* SRC interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 99) RESERVED */
#define IMXRT_IRQ_GPT1 (IMXRT_IRQ_EXTINT + 100) /* GPT1 interrupt */
#define IMXRT_IRQ_GPT2 (IMXRT_IRQ_EXTINT + 101) /* GPT2 interrupt */
@ -158,11 +172,13 @@
#define IMXRT_IRQ_FLEXPWM1_2 (IMXRT_IRQ_EXTINT + 104) /* FLEXPWM1 capture/compare/reload 2 interrupt */
#define IMXRT_IRQ_FLEXPWM1_3 (IMXRT_IRQ_EXTINT + 105) /* FLEXPWM1 capture/compare/reload 3 interrupt */
#define IMXRT_IRQ_FLEXPWM1_F (IMXRT_IRQ_EXTINT + 106) /* FLEXPWM1 fault interrupt OR reload error */
/* RESERVED (IMXRT_IRQ_EXTINT + 107) RESERVED */
#define IMXRT_IRQ_FLEXSPI (IMXRT_IRQ_EXTINT + 108) /* FlexSPI interrupt */
#define IMXRT_IRQ_SEMC (IMXRT_IRQ_EXTINT + 109) /* SEMC interrupt */
#define IMXRT_IRQ_USDHC1 (IMXRT_IRQ_EXTINT + 110) /* USDHC1 interrupt */
#define IMXRT_IRQ_USDHC2 (IMXRT_IRQ_EXTINT + 111) /* USDHC2 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 112) RESERVED */
#define IMXRT_IRQ_USBOTG1 (IMXRT_IRQ_EXTINT + 113) /* USBO2 USB OTG1 interrupt */
#define IMXRT_IRQ_ENET (IMXRT_IRQ_EXTINT + 114) /* ENET MAC 0 interrupt */
@ -178,49 +194,73 @@
#define IMXRT_IRQ_ACMP2 (IMXRT_IRQ_EXTINT + 124) /* ACMP2 interrupt */
#define IMXRT_IRQ_ACMP3 (IMXRT_IRQ_EXTINT + 125) /* ACMP3 interrupt */
#define IMXRT_IRQ_ACMP4 (IMXRT_IRQ_EXTINT + 126) /* ACMP4 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 127) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 128) RESERVED */
#define IMXRT_IRQ_ENC1 (IMXRT_IRQ_EXTINT + 129) /* ENC1 interrupt */
#define IMXRT_IRQ_ENC2 (IMXRT_IRQ_EXTINT + 130) /* ENC2 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 131) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 132) RESERVED */
#define IMXRT_IRQ_QTIMER1 (IMXRT_IRQ_EXTINT + 133) /* QTIMER1 timer 0-3 interrupt */
#define IMXRT_IRQ_QTIMER2 (IMXRT_IRQ_EXTINT + 134) /* QTIMER2 timer 0-3 interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 135) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 136) RESERVED */
#define IMXRT_IRQ_FLEXPWM2_0 (IMXRT_IRQ_EXTINT + 137) /* FLEXPWM2 capture/compare/reload 0 interrupt */
#define IMXRT_IRQ_FLEXPWM2_1 (IMXRT_IRQ_EXTINT + 138) /* FLEXPWM2 capture/compare/reload 1 interrupt */
#define IMXRT_IRQ_FLEXPWM2_2 (IMXRT_IRQ_EXTINT + 139) /* FLEXPWM2 capture/compare/reload 1 interrupt */
#define IMXRT_IRQ_FLEXPWM2_3 (IMXRT_IRQ_EXTINT + 140) /* FLEXPWM2 capture/compare/reload 3 interrupt */
#define IMXRT_IRQ_FLEXPWM2_F (IMXRT_IRQ_EXTINT + 141) /* FLEXPWM2 fault interrupt */
/* RESERVED (IMXRT_IRQ_EXTINT + 142) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 143) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 144) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 146) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 147) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 148) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 149) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 150) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 151) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 152) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 153) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 154) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 155) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 156) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 157) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 158) RESERVED */
/* RESERVED (IMXRT_IRQ_EXTINT + 159) RESERVED */
#define IMXRT_IRQ_NEXTINT 160
/* GPIO second level interrupt **********************************************************/
/* GPIO second level interrupt **********************************************/
#define IMXRT_GPIO_IRQ_FIRST (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT)
#define _IMXRT_GPIO1_0_15_BASE IMXRT_GPIO_IRQ_FIRST
#ifdef CONFIG_IMXRT_GPIO1_0_15_IRQ
/* GPIO1 has dedicated interrupts for pins 0-7
* REVISIT: I am assuming that you really cannot use the dedicated and the multiplex
* REVISIT:
* I am assuming that you really cannot use the dedicated and the multiplex
* interrupts concurrently.
*/
@ -431,25 +471,25 @@
IMXRT_GPIO3_NIRQS + IMXRT_GPIO5_NIRQS)
#define IMXRT_GPIO_IRQ_LAST (_IMXRT_GPIO1_0_15_BASE + IMXRT_GPIO_NIRQS)
/* Total number of IRQ numbers **********************************************************/
/* Total number of IRQ numbers **********************************************/
#define NR_IRQS (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT + IMXRT_GPIO_NIRQS)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Inline functions
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

43
arch/arm/include/imxrt/imxrt105x_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/imxrt/imxrt105x_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_IMXRT_IMXRT105X_IRQ_H
#define __ARCH_ARM_INCLUDE_IMXRT_IMXRT105X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts (priority levels >= 256) *****************************************/
/* External interrupts (priority levels >= 256) *****************************/
#define IMXRT_IRQ_EDMA0_16 (IMXRT_IRQ_EXTINT + 0) /* eDMA Channel 0/16 Transfer Complete */
#define IMXRT_IRQ_EDMA1_17 (IMXRT_IRQ_EXTINT + 1) /* eDMA Channel 1/17 Transfer Complete */
@ -197,14 +197,15 @@
#define IMXRT_IRQ_NEXTINT 160
/* GPIO second level interrupt **********************************************************/
/* GPIO second level interrupt **********************************************/
#define IMXRT_GPIO_IRQ_FIRST (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT)
#define _IMXRT_GPIO1_0_15_BASE IMXRT_GPIO_IRQ_FIRST
#ifdef CONFIG_IMXRT_GPIO1_0_15_IRQ
/* GPIO1 has dedicated interrupts for pins 0-7
* REVISIT: I am assuming that you really cannot use the dedicated and the multiplex
* REVISIT:
* I am assuming that you really cannot use the dedicated and the multiplex
* interrupts concurrently.
*/
@ -465,25 +466,25 @@
IMXRT_GPIO5_NIRQS)
#define IMXRT_GPIO_IRQ_LAST (_IMXRT_GPIO1_0_15_BASE + IMXRT_GPIO_NIRQS)
/* Total number of IRQ numbers **********************************************************/
/* Total number of IRQ numbers **********************************************/
#define NR_IRQS (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT + IMXRT_GPIO_NIRQS)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Inline functions
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

45
arch/arm/include/imxrt/imxrt106x_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/imxrt/imxrt106x_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_IMXRT_IMXRT106X_IRQ_H
#define __ARCH_ARM_INCLUDE_IMXRT_IMXRT106X_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts (priority levels >= 256) *****************************************/
/* External interrupts (priority levels >= 256) *****************************/
#define IMXRT_IRQ_EDMA0_16 (IMXRT_IRQ_EXTINT + 0) /* eDMA Channel 0/16 Transfer Complete */
#define IMXRT_IRQ_EDMA1_17 (IMXRT_IRQ_EXTINT + 1) /* eDMA Channel 1/17 Transfer Complete */
@ -190,21 +190,22 @@
#define IMXRT_IRQ_ENET2_1588 (IMXRT_IRQ_EXTINT + 153) /* ENET2 MAC 0 1588 Timer Interrupt */
#define IMXRT_IRQ_CAN3 (IMXRT_IRQ_EXTINT + 154) /* CAN3 interrupt */
#define IMXRT_IRQ_RESERVED155 (IMXRT_IRQ_EXTINT + 155) /* Reserved */
#define IMXRT_IRQ_FLEXIO3 (IMXRT_IRQ_EXTINT + 156) /* IPI compare interrupt */
#define IMXRT_IRQ_FLEXIO3 (IMXRT_IRQ_EXTINT + 156) /* IPI compare interrupt */
#define IMXRT_IRQ_GPIO_6789 (IMXRT_IRQ_EXTINT + 157) /* GPIO {6789} or'ed Interrupt */
#define IMXRT_IRQ_RESERVED158 (IMXRT_IRQ_EXTINT + 158) /* Reserved */
#define IMXRT_IRQ_RESERVED159 (IMXRT_IRQ_EXTINT + 159) /* Reserved */
#define IMXRT_IRQ_NEXTINT 160
/* GPIO second level interrupt **********************************************************/
/* GPIO second level interrupt **********************************************/
#define IMXRT_GPIO_IRQ_FIRST (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT)
#define _IMXRT_GPIO1_0_15_BASE IMXRT_GPIO_IRQ_FIRST
#ifdef CONFIG_IMXRT_GPIO1_0_15_IRQ
/* GPIO1 has dedicated interrupts for pins 0-7
* REVISIT: I am assuming that you really cannot use the dedicated and the multiplex
* REVISIT:
* I am assuming that you really cannot use the dedicated and the multiplex
* interrupts concurrently.
*/
@ -671,25 +672,25 @@
IMXRT_GPIO9_NIRQS )
#define IMXRT_GPIO_IRQ_LAST (_IMXRT_GPIO1_0_15_BASE + IMXRT_GPIO_NIRQS)
/* Total number of IRQ numbers **********************************************************/
/* Total number of IRQ numbers **********************************************/
#define NR_IRQS (IMXRT_IRQ_EXTINT + IMXRT_IRQ_NEXTINT + IMXRT_GPIO_NIRQS)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Inline functions
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

40
arch/arm/include/imxrt/irq.h
View File

@ -18,23 +18,33 @@
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_IMXRT_IRQ_H
#define __ARCH_ARM_INCLUDE_IMXRT_IRQ_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/imxrt/chip.h>
/*****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
#if defined(CONFIG_ARCH_FAMILY_IMXRT102x)
# include <arch/imxrt/imxrt102x_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_IMXRT105x)
# include <arch/imxrt/imxrt105x_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
# include <arch/imxrt/imxrt106x_irq.h>
#else
# error Unrecognized i.MX RT architecture
#endif
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words
@ -44,11 +54,11 @@
/* Common Processor Exceptions (vectors 0-15) */
#define IMXRT_IRQ_RESERVED (0) /* Reserved vector .. only used with
CONFIG_DEBUG_FEATURES */
* CONFIG_DEBUG_FEATURES */
/* Vector 0: Reset stack pointer value */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handled by IRQ) */
/* Vector 1: Reset(not handled by IRQ) */
#define IMXRT_IRQ_NMI (2) /* Vector 2: Non-Maskable Int (NMI) */
#define IMXRT_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
@ -68,16 +78,6 @@
#define IMXRT_IRQ_EXTINT (16) /* Vector number of the first ext int */
#if defined(CONFIG_ARCH_FAMILY_IMXRT102x)
# include <arch/imxrt/imxrt102x_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_IMXRT105x)
# include <arch/imxrt/imxrt105x_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
# include <arch/imxrt/imxrt106x_irq.h>
#else
# error Unrecognized i.MX RT architecture
#endif
/****************************************************************************
* Public Types
****************************************************************************/

2
arch/arm/include/inttypes.h
View File

@ -41,7 +41,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define PRId8 "d"

38
arch/arm/include/kinetis/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_CHIP_H
#define __ARCH_ARM_INCLUDE_KINETIS_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/kinetis/kinetis_dma.h>
@ -33,9 +33,9 @@
#include <arch/kinetis/kinetis_pmc.h>
#include <arch/kinetis/kinetis_lpuart.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
@ -1581,10 +1581,12 @@
# error "Unsupported Kinetis chip"
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-15. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:4] of each field, bits[3:0] read as zero and ignore writes.
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-15. The lower the value,
* the greater the priority of the corresponding interrupt. The processor
* implements only bits[7:4] of each field, bits[3:0] read as zero and ignore
* writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */
@ -1592,16 +1594,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between supported priority values */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_KINETIS_CHIP_H */

47
arch/arm/include/kinetis/irq.h
View File

@ -18,26 +18,27 @@
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather, only
* indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
*/
@ -58,7 +59,9 @@
#define KINETIS_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define KINETIS_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
/* External interrupts (vectors >= 16).
* These definitions are chip-specific
*/
#define KINETIS_IRQ_FIRST (16) /* Vector number of the first external interrupt */
@ -75,22 +78,22 @@
#elif defined(CONFIG_ARCH_FAMILY_K66)
# include <arch/kinetis/kinetis_k66irq.h>
#else
/* The interrupt vectors for other parts are defined in other documents and may or
* may not be the same as above (the family members are all very similar) This
* error just means that you have to look at the document and determine for yourself
* if the vectors are the same.
*/
/* The interrupt vectors for other parts are defined in other documents and
* may or may not be the same as above (the family members are all very
* similar) This error just means that you have to look at the document and
* determine for yourself if the vectors are the same.
*/
# error "No IRQ numbers for this Kinetis K part"
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -101,9 +104,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

43
arch/arm/include/kinetis/kinetis_dma.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_dma.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -31,26 +31,27 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMA_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMA_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the DMA feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note: It is envisioned that in the long term as a chip is added. The
* author of the new chip definitions will either find the exact
* configuration in an existing chip define and add the new chip to it Or add
* the DMA feature configuration #defines to the chip ifdef list below. In
* either case the author should mark it as "Verified to Document Number:"
* taken from the reference manual.
*/
/* DMA Register Configuration
@ -72,9 +73,12 @@
* KINETIS_DMA_HAS_DCHPRI_CHPRI_BITS - DMA has 4 bit DCHPRI[DCHPRI]
* KINETIS_DMA_HAS_DCHPRI_GRPPRI - DMA has DCHPRI[GRPPRI]
* KINETIS_DMA_HAS_EARS - DMA has EARS Register
* KINETIS_DMA_HAS_TCD_CITER1_LINKCH_BITS - DMA has 4 bit TCD_CITER[LINKCH]
* KINETIS_DMA_HAS_TCD_CSR_MAJORLINKCH_BITS - DMA has 4 bit TCD_CSR[MAJORLINKCH]
* KINETIS_DMA_HAS_TCD_BITER1_LINKCH_BITS - DMA has 4 bit TCD_BITER[LINKCH]
* KINETIS_DMA_HAS_TCD_CITER1_LINKCH_BITS - DMA has 4 bit
* TCD_CITER[LINKCH]
* KINETIS_DMA_HAS_TCD_CSR_MAJORLINKCH_BITS - DMA has 4 bit
* TCD_CSR[MAJORLINKCH]
* KINETIS_DMA_HAS_TCD_BITER1_LINKCH_BITS - DMA has 4 bit
* TCD_BITER[LINKCH]
*/
/* Describe the version of the DMA
@ -119,7 +123,6 @@
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_01
/* MK66F N/X 1M0/2M0 V MD/LQ 18
*
* --------------- ------- --- ------- ------- ------ ------ ------ -----
@ -135,15 +138,17 @@
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
/* Verified to Document Number:
* Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015
*/
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_02
#else
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_UKN
#endif
/* Use the catch all configuration for the DMA based on the implementations in nuttx
* prior 8/10/2018
/* Use the catch all configuration for the DMA based on
* the implementations in nuttx prior 8/10/2018
*/
#if KINETIS_DMA_VERSION == KINETIS_DMA_VERSION_UKN

37
arch/arm/include/kinetis/kinetis_dmamux.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_dmamux.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -31,31 +31,34 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMAMUX_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMAMUX_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the DMAMUX feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note:
* It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an
* existing chip define and add the new chip to it Or add the DMAMUX feature
* configuration #defines to the chip ifdef list below. In either case the
* author should mark it as "Verified to Document Number:" taken from the
* reference manual.
*/
/* DMAMUX Register Configuration
*
* KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 0|1 - SoC has reg in 0,1,2..KINETIS_NDMACH
* KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 0|1
* - SoC has reg in 0,1,2..KINETIS_NDMACH
*/
/* Describe the version of the DMA
@ -115,7 +118,9 @@
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
/* Verified to Document Number:
* Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015
*/
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_02
@ -123,8 +128,8 @@
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_UKN
#endif
/* Use the catch all configuration for the DMAMUX based on the implementations in
* nuttx prior 8/10/2018
/* Use the catch all configuration for the DMAMUX based on the
* implementations in nuttx prior 8/10/2018
*/
#if KINETIS_DMA_VERSION == KINETIS_DMAMUX_VERSION_01

33
arch/arm/include/kinetis/kinetis_k20irq.h
View File

@ -1,4 +1,4 @@
/**************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k20irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
*************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
@ -25,26 +25,26 @@
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K20IRQ_H
/**************************************************************************************
/****************************************************************************
* Included Files
*************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/**************************************************************************************
* Pre-processor Definitions
*************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K20 Family *************************************************************************
* K20 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K20P64M72SF1RM
@ -148,19 +148,20 @@
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST + 94) /* 94: Software interrupt */
#define KINETIS_IRQ_NEXTINTS 95 /* 95 Non core IRQs */
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 111 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/**************************************************************************************
/****************************************************************************
* Public Types
*************************************************************************************/
****************************************************************************/
/**************************************************************************************
/****************************************************************************
* Public Data
*************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -171,9 +172,9 @@ extern "C"
#define EXTERN extern
#endif
/**************************************************************************************
* Public Functions
*************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

37
arch/arm/include/kinetis/kinetis_k28irq.h
View File

@ -1,4 +1,4 @@
/*********************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k28irq.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -31,35 +31,35 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K28IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K28IRQ_H
/*********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/*********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K28 Family ********************************************************************************
* K28 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K28P210M150SF5RM
@ -186,19 +186,20 @@
#define KINETIS_IRQ_RESVD106 (KINETIS_IRQ_FIRST + 106) /* 106: Reserved */
#define KINETIS_IRQ_NEXTINTS 107 /* 107 Non core IRQs */
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 123 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/*********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/*********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -209,9 +210,9 @@ extern "C"
#define EXTERN extern
#endif
/*********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

37
arch/arm/include/kinetis/kinetis_k40irq.h
View File

@ -1,4 +1,4 @@
/*************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k40irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,35 +16,35 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
/*************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/*************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K40 Family ************************************************************************
* K40 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K40P144M100SF2RM
@ -148,19 +148,20 @@
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST + 94) /* 94: Software interrupt */
#define KINETIS_IRQ_NEXTINTS 95 /* 95 Non core IRQs */
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 111 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/*************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/*************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -171,9 +172,9 @@ extern "C"
#define EXTERN extern
#endif
/*************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

37
arch/arm/include/kinetis/kinetis_k60irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k60irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,35 +16,35 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K60 Family ************************************************************************
* K60 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K60P144M100SF2RM
@ -148,19 +148,20 @@
#define KINETIS_IRQ_SWI (KINETIS_IRQ_FIRST + 94) /* 94: Software interrupt */
#define KINETIS_IRQ_NEXTINTS 95 /* 95 Non core IRQs */
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 111 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -171,9 +172,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

37
arch/arm/include/kinetis/kinetis_k64irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k64irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,35 +16,35 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K60 Family ************************************************************************
* K60 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K64P144M120SF5RM.pdf
@ -138,19 +138,20 @@
#define KINETIS_IRQ_EMACMISC (KINETIS_IRQ_FIRST + 85) /* 85: Ethernet MAC error and misc interrupt */
#define KINETIS_IRQ_NEXTINTS 86 /* 86 Non core IRQs */
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 102 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -161,9 +162,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

38
arch/arm/include/kinetis/kinetis_k66irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_k66irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,35 +16,35 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K66IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K66IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in the file nuttx/arch/arm/include/kinets/irq.h which includes this file
*
* External interrupts (vectors >= 16)
*
* K66 Family ************************************************************************
* K66 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale
* document K66P144M180SF5RMV2
@ -152,21 +152,21 @@
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 98) /* 98: CAN1 Receive Warning */
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 99) /* 99: CAN1 Wake UP */
#define KINETIS_IRQ_NEXTINTS 100 /* 100 Non core IRQs*/
#define KINETIS_IRQ_NVECTORS (KINETIS_IRQ_FIRST + KINETIS_IRQ_NEXTINTS) /* 116 vectors */
/* EXTI interrupts (Do not use IRQ numbers) */
#define NR_IRQS KINETIS_IRQ_NVECTORS
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -177,9 +177,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

46
arch/arm/include/kinetis/kinetis_lpuart.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_lpuart.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -31,36 +31,38 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_LPUART_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_LPUART_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the LPUART feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note:
* It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an
* existing chip define and add the new chip to it Or add the LPUART feature
* configuration #defines to the chip ifdef list below. In either case the
* author should mark it as "Verified to Document Number:" taken from the
* reference manual.
*
* To maintain backward compatibility to the version of NuttX prior to
* 2/22/2017, the catch all KINETIS_LPUART_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/22/2017 may be filled in completely when
* vetted.
* 2/22/2017, the catch all KINETIS_LPUART_VERSION_UKN configuration is
* assigned to all the chips that did not have any conditional compilation
* based on KINETIS_K64 or KINETIS_K66. This is a "No worse" than the
* original code solution. N.B. Each original chip "if"definitions have been
* left intact so that the complete legacy definitions prior to 2/22/2017 may
* be filled in completely when vetted.
*/
/* LPUART Register Configuration
@ -138,7 +140,9 @@
#elif defined(CONFIG_ARCH_CHIP_MK28FN2M0VMI15) || \
defined(CONFIG_ARCH_CHIP_MK28FN2M0CAU15R)
/* Verified to Document Number: Verified to Document Number: K28P210M150SF5RM Rev. 4, August 2017 */
/* Verified to Document Number:
* Verified to Document Number: K28P210M150SF5RM Rev. 4, August 2017
*/
# define KINETIS_LPUART_VERSION KINETIS_LPUART_VERSION_01
@ -256,7 +260,9 @@
# error "Unsupported Kinetis chip"
#endif
/* Use the catch all configuration for the LPUART based on the implementations in nuttx prior 2/3/2017 */
/* Use the catch all configuration for the LPUART based on the
* implementations in nuttx prior 2/3/2017
*/
#if KINETIS_LPUART_VERSION == KINETIS_LPUART_VERSION_UKN

85
arch/arm/include/kinetis/kinetis_mcg.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_mcg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,47 +16,53 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the MCG feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note:
* It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an
* existing chip define and add the new chip to it Or add the MCG feature
* configuration #defines to the chip ifdef list below. In either case the
* author should mark it as "Verified to Document Number:" taken from the
* reference manual.
*
* To maintain backward compatibility to the version of NuttX prior to
* 2/5/2017, the catch all KINETIS_MCG_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* NEW_MCG or KINETIS_K64. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/5/2017 may be filled in completely when
* vetted.
* NEW_MCG or KINETIS_K64. This is a "No worse" than the original code
* solution. N.B. Each original chip "if"definitions have been left intact so
* that the complete legacy definitions prior to 2/5/2017 may be filled in
* completely when vetted.
*/
/* MCG Configuration Parameters
*
* KINETIS_MCG_PLL_REF_MIN - OSCCLK/PLL_R minimum
* KINETIS_MCG_PLL_REF_MAX - OSCCLK/PLL_R maximum
* KINETIS_MCG_PLL_INTERNAL_DIVBY - The PLL clock is divided by n before VCO divider
* KINETIS_MCG_HAS_PLL_EXTRA_DIVBY - Is PLL clock divided by n before MCG PLL/FLL
* KINETIS_MCG_PLL_INTERNAL_DIVBY - The PLL clock is divided by n
* before VCO divider
* KINETIS_MCG_HAS_PLL_EXTRA_DIVBY - Is PLL clock divided by n
* before MCG PLL/FLL
* clock selection in the SIM module
* KINETIS_MCG_FFCLK_DIVBY - MCGFFCLK divided by n
* KINETIS_MCG_HAS_IRC_48M - Has 48MHz internal oscillator
* KINETIS_MCG_HAS_LOW_FREQ_IRC - Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2]
* KINETIS_MCG_HAS_HIGH_FREQ_IRC - Has HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN]
* KINETIS_MCG_HAS_IRC_48M - Has 48MHz internal oscillator
* KINETIS_MCG_HAS_LOW_FREQ_IRC - Has LTRIMRNG, LFRIM,
* LSTRIM and bit MC[LIRC_DIV2]
* KINETIS_MCG_HAS_HIGH_FREQ_IRC - Has HCTRIM, HTTRIM,
* HFTRIM and bit MC[HIRCEN]
* KINETIS_MCG_HAS_PLL_INTERNAL_MODE - Has PEI mode or PBI mode
* KINETIS_MCG_HAS_RESET_IS_BLPI - Has Reset clock mode is BLPI
*
@ -65,7 +71,8 @@
* KINETIS_MCG_HAS_C1 - SoC has C1 Register
* KINETIS_MCG_HAS_C1_IREFS - SoC has C1[IREFS]
* KINETIS_MCG_HAS_C1_FRDIV - SoC has C1[FRDIV]
* KINETIS_MCG_C1_FRDIV_MAX - C1[FRDIV] maximum value 5=1024, 6=1280 7=1536
* KINETIS_MCG_C1_FRDIV_MAX - C1[FRDIV] maximum value
* 5=1024, 6=1280 7=1536
* KINETIS_MCG_HAS_C2 - SoC has C2 Register
* KINETIS_MCG_HAS_C2_HGO - SoC has C2[HGO]
* KINETIS_MCG_HAS_C2_RANGE - SoC has C2[RANG]
@ -75,13 +82,16 @@
* KINETIS_MCG_HAS_C4 - SoC has C4 Register
* KINETIS_MCG_HAS_C5 - SoC has C5 Register
* KINETIS_MCG_HAS_C5_PRDIV - SoC has C5[PRDIV]
* KINETIS_MCG_C5_PRDIV_BASE - PRDIV base value corresponding to 0 in C5[PRDIV]
* KINETIS_MCG_C5_PRDIV_BASE - PRDIV base value
* corresponding to 0 in C5[PRDIV]
* KINETIS_MCG_C5_PRDIV_MAX - The Maximum value of C5[PRVDIV])
* KINETIS_MCG_C5_PRDIV_BITS - Has n bits of phase-locked loop (PLL) PRDIV (register C5[PRDIV]
* KINETIS_MCG_C5_PRDIV_BITS - Has n bits of phase-locked loop
* (PLL) PRDIV (register C5[PRDIV]
* KINETIS_MCG_HAS_C5_PLLREFSEL0 - SoC has C5[PLLREFSEL0]
* KINETIS_MCG_HAS_C6 - SoC has C6 Register
* KINETIS_MCG_HAS_C6_VDIV - SoC has C6[VDIV]
* KINETIS_MCG_C6_VDIV_BASE - VDIV base value corresponding to 0 in C6[VDIV]
* KINETIS_MCG_C6_VDIV_BASE - VDIV base value
* corresponding to 0 in C6[VDIV]
* KINETIS_MCG_C6_VDIV_MAX - The Maximum value of C6[VDIV]
* KINETIS_MCG_HAS_C6_CME - SoC has C6[CME]
* KINETIS_MCG_HAS_C6_PLLS - SoC has C6[PLLS]
@ -112,12 +122,14 @@
* KINETIS_MCG_HAS_C10 - SoC has C10 Register
* KINETIS_MCG_HAS_C10_LOCS1 - SoC has C10[LOCS1]
* KINETIS_MCG_HAS_C11 - SoC has C11 Register
* KINETIS_MCG_HAS_C11_PLL1OSC1 - SoC has C1[PRDIV1], C11[PLLSTEN1], C11[PLLCLKEN1], C11[PLLREFSEL1],
* KINETIS_MCG_HAS_C11_PLL1OSC1 - SoC has C1[PRDIV1], C11[PLLSTEN1],
* C11[PLLCLKEN1], C11[PLLREFSEL1],
* KINETIS_MCG_HAS_C11_PLLCS - SoC has C11[PLLCS]
* KINETIS_MCG_HAS_C11_PLLREFSEL1 - SoC has C11[PLLREFSEL1]
* KINETIS_MCG_HAS_C12 - SoC has C12 Register
* KINETIS_MCG_HAS_S2 - SoC has S2 Register
* KINETIS_MCG_HAS_S2_PLL1OSC1 - SoC has S2[LOCS2], S2[OSCINIT1], S2[LOCK1], S2[LOLS1]
* KINETIS_MCG_HAS_S2_PLL1OSC1 - SoC has S2[LOCS2],
* S2[OSCINIT1], S2[LOCK1], S2[LOLS1]
* KINETIS_MCG_HAS_S2_PLLCST - SoC has S2[PLLCST]
*/
@ -192,7 +204,9 @@
#elif defined(CONFIG_ARCH_CHIP_MK28FN2M0VMI15) || defined(CONFIG_ARCH_CHIP_MK28FN2M0CAU15R)
/* Verified to Document Number: K28P210M150SF5RM Rev. 4, August 2017 */
/* Verified to Document Number:
* K28P210M150SF5RM Rev. 4, August 2017
*/
# define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_06
@ -201,9 +215,10 @@
# define KINETIS_MCG_PLL_REF_MIN 8000000 /* OSCCLK/PLL_R minimum */
# define KINETIS_MCG_PLL_REF_MAX 16000000 /* OSCCLK/PLL_R maximum */
/* TODO: The following configuration parameters have not been verified. They were
* taken wholesale from the K66F. The K66F is very similar and, most likely, the
* settings are corred.
/* TODO:
* The following configuration parameters have not been verified. They were
* taken wholesale from the K66F. The K66F is very similar and, most likely,
* the settings are corred.
*/
# define KINETIS_MCG_PLL_INTERNAL_DIVBY 2 /* The PLL clock is divided by 2 before VCO divider */
@ -546,7 +561,9 @@
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
/* Verified to Document Number:
* Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015
*/
# define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_06
@ -646,7 +663,9 @@
# error "Unsupported Kinetis chip"
#endif
/* Use the catch all configuration for the MCG based on the implementations in nuttx prior 2/3/2017 */
/* Use the catch all configuration for the MCG based on
* the implementations in nuttx prior 2/3/2017
*/
#if KINETIS_MCG_VERSION == KINETIS_MCG_VERSION_UKN

38
arch/arm/include/kinetis/kinetis_pmc.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_pmc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,34 +16,36 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the PMC feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note:
* It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an
* existing chip define and add the new chip to it Or add the PMC feature
* configuration #defines to the chip ifdef list below. In either case the
* author should mark it as "Verified to Document Number:" taken from the
* reference manual.
*
* To maintain backward compatibility to the version of NuttX prior to
* 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/22/2017 may be filled in completely when
* vetted.
* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code
* solution. N.B. Each original chip "if"definitions have been left intact so
* that the complete legacy definitions prior to 2/22/2017 may be filled in
* completely when vetted.
*/
/* PMC Register Configuration
@ -323,8 +325,8 @@
# error "Unsupported Kinetis chip"
#endif
/* Use the catch all configuration for the PMC based on the implementations in
* NuttX prior to 2/3/2017
/* Use the catch all configuration for the PMC based on
* the implementations in NuttX prior to 2/3/2017
*/
#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN

59
arch/arm/include/kinetis/kinetis_sim.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kinetis/kinetis_sim.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,34 +16,36 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_SIM_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_SIM_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the SIM feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
/* Note:
* It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an
* existing chip define and add the new chip to it Or add the SIM feature
* configuration #defines to the chip ifdef list below. In either case the
* author should mark it as "Verified to Document Number:" taken from the
* reference manual.
*
* To maintain backward compatibility to the version of NuttX prior to
* 2/16/2017, the catch all KINETIS_SIM_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/16/2017 may be filled in completely when
* vetted.
* 2/16/2017, the catch all KINETIS_SIM_VERSION_UKN configuration is
* assigned to all the chips that did not have any conditional compilation
* based on KINETIS_K64 or KINETIS_K66. This is a "No worse" than the
* original code solution. N.B. Each original chip "if"definitions have been
* left intact so that the complete legacy definitions prior to 2/16/2017 may
* be filled in completely when vetted.
*/
/* SIM Register Configuration
@ -95,7 +97,8 @@
* KINETIS_SIM_HAS_SOPT4_FTM0FLT3 - SoC has SOPT4[FTM0FLT3]
* KINETIS_SIM_HAS_SOPT4_FTM0TRG0SRC - SoC has SOPT4[FTM0TRG0SRC]
* KINETIS_SIM_HAS_SOPT4_FTM0TRG1SRC - SoC has SOPT4[FTM0TRG1SRC]
* KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC - SoC has SOPT4[FTM1CH0SRC] 1, 3 if SOF
* KINETIS_SIM_HAS_SOPT4_FTM1CH0SRC - SoC has SOPT4[FTM1CH0SRC]
* 1, 3 if SOF
* KINETIS_SIM_HAS_SOPT4_FTM1FLT0 - SoC has SOPT4[FTM1FLT0]
* KINETIS_SIM_HAS_SOPT4_FTM1FLT1 - SoC has SOPT4[FTM1FLT1]
* KINETIS_SIM_HAS_SOPT4_FTM1FLT2 - SoC has SOPT4[FTM1FLT2]
@ -143,10 +146,14 @@
* KINETIS_SIM_HAS_SOPT7_ADC1TRGSEL - SoC has n SOPT7[ADC1TRGSEL]
* KINETIS_SIM_HAS_SOPT7_ADC2TRGSEL - SoC has n SOPT7[ADC2TRGSEL]
* KINETIS_SIM_HAS_SOPT7_ADC3TRGSEL - SoC has n SOPT7[ADC3TRGSEL]
* KINETIS_SIM_SOPT7_ADC0ALTTRGEN - SoC has ADC0 alternate trigger enable
* KINETIS_SIM_SOPT7_ADC1ALTTRGEN - SoC has ADC1 alternate trigger enable
* KINETIS_SIM_SOPT7_ADC2ALTTRGEN - SoC has ADC2 alternate trigger enable
* KINETIS_SIM_SOPT7_ADC3ALTTRGEN - SoC has ADC3 alternate trigger enable
* KINETIS_SIM_SOPT7_ADC0ALTTRGEN - SoC has ADC0
* alternate trigger enable
* KINETIS_SIM_SOPT7_ADC1ALTTRGEN - SoC has ADC1
* alternate trigger enable
* KINETIS_SIM_SOPT7_ADC2ALTTRGEN - SoC has ADC2
* alternate trigger enable
* KINETIS_SIM_SOPT7_ADC3ALTTRGEN - SoC has ADC3
* alternate trigger enable
* KINETIS_SIM_HAS_SOPT8 - SoC has SOPT8 Register
* KINETIS_SIM_HAS_SOPT8_FTM0SYNCBIT - SoC has SOPT8[FTM0SYNCBIT]
* KINETIS_SIM_HAS_SOPT8_FTM1SYNCBIT - SoC has SOPT8[FTM1SYNCBIT]
@ -260,8 +267,10 @@
* KINETIS_SIM_HAS_FCFG1_FTFDIS - SoC has FCFG1[FTFDIS]
* KINETIS_SIM_HAS_FCFG1_NVMSIZE - SoC has FCFG1[NVMSIZE]
* KINETIS_SIM_HAS_FCFG2 - SoC has FCFG2 Register
* KINETIS_SIM_HAS_FCFG2_MAXADDR0 - SoC has n bit of FCFG2[MAXADDR0]
* KINETIS_SIM_HAS_FCFG2_MAXADDR1 - SoC has n bit of FCFG2[MAXADDR1]
* KINETIS_SIM_HAS_FCFG2_MAXADDR0 - SoC has n bit of
* FCFG2[MAXADDR0]
* KINETIS_SIM_HAS_FCFG2_MAXADDR1 - SoC has n bit of
* FCFG2[MAXADDR1]
* KINETIS_SIM_HAS_FCFG2_PFLSH - SoC has FCFG2[PFLSH]
* KINETIS_SIM_HAS_FCFG2_SWAPPFLSH - SoC has FCFG2[SWAPPFLSH]
* KINETIS_SIM_HAS_UIDH - SoC has UIDH Register

38
arch/arm/include/kl/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kl/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KL_CHIP_H
#define __ARCH_ARM_INCLUDE_KL_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
@ -153,10 +153,12 @@
# error "Unsupported Kinetis chip"
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-15. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-15. The lower the value, the
* greater the priority of the corresponding interrupt. The processor
* implements only bits[7:6] of each field, bits[5:0] read as zero and ignore
* writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
@ -164,15 +166,15 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Steps between supported priority values */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_KL_CHIP_H */

92
arch/arm/include/kl/irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/kl/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,41 +16,43 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KL_IRQ_H
#define __ARCH_ARM_INCLUDE_KL_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* IRQ numbers **********************************************************************/
/* The IRQ numbers corresponds directly to vector numbers and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers **************************************************************/
/* The IRQ numbers corresponds directly to vector numbers and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
#define KL_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define KL_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define KL_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
/* Vectors 4-10: Reserved */
/* Vectors 4-10: Reserved */
#define KL_IRQ_SVCALL (11) /* Vector 11: SVC call */
/* Vector 12-13: Reserved */
/* Vector 12-13: Reserved */
#define KL_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define KL_IRQ_SYSTICK (15) /* Vector 15: System tick */
@ -58,10 +60,10 @@
#define KL_IRQ_EXTINT (16)
/* K40 Family ***********************************************************************
/* K40 Family ***************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale document
* K40P144M100SF2RM
* The interrupt vectors for the following parts is defined in Freescale
* document K40P144M100SF2RM
*/
#if defined(CONFIG_ARCH_CHIP_MKL25Z128) || defined(CONFIG_ARCH_CHIP_MKL25Z64)
@ -99,12 +101,13 @@
# define KL_IRQ_PORTA (46) /* Vector 46: GPIO Port A */
# define KL_IRQ_PORTD (47) /* Vector 47: GPIO Port D */
/* Note that the total number of IRQ numbers supported is equal to the number of
* valid interrupt vectors. This is wasteful in that certain tables are sized by
* this value. There are only 94 valid interrupts so, potentially the number of
* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
* also simplifies operations on NVIC registers and (at least in my state of mind
* now) seems to justify the waste.
/* Note that the total number of IRQ numbers supported is equal to the
* number of valid interrupt vectors. This is wasteful in that certain
* tables are sized by this value. There are only 94 valid interrupts so,
* potentially the number of IRQs to could be reduced to 94. However,
* equating IRQ numbers with vector numbers also simplifies operations on
* NVIC registers and (at least in my state of mind now) seems to justify
* the waste.
*/
# define NR_IRQS (48) /* 64 interrupts but 48 IRQ numbers */
@ -144,33 +147,34 @@
# define KL_IRQ_PORTA (46) /* Vector 46: GPIO Port A */
# define KL_IRQ_PORTD (47) /* Vector 47: GPIO Port D */
/* Note that the total number of IRQ numbers supported is equal to the number of
* valid interrupt vectors. This is wasteful in that certain tables are sized by
* this value. There are only 94 valid interrupts so, potentially the number of
* IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers
* also simplifies operations on NVIC registers and (at least in my state of mind
* now) seems to justify the waste.
/* Note that the total number of IRQ numbers supported is equal to the
* number of valid interrupt vectors. This is wasteful in that certain
* tables are sized by this value. There are only 94 valid interrupts so,
* potentially the number of IRQs to could be reduced to 94. However,
* equating IRQ numbers with vector numbers also simplifies operations on
* NVIC registers and (at least in my state of mind now) seems to justify
* the waste.
*/
# define NR_IRQS (48) /* 64 interrupts but 48 IRQ numbers */
#else
/* The interrupt vectors for other parts are defined in other documents and may or
* may not be the same as above (the family members are all very similar) This
* error just means that you have to look at the document and determine for yourself
* if the vectors are the same.
*/
/* The interrupt vectors for other parts are defined in other documents and
* may or may not be the same as above (the family members are all very
* similar) This error just means that you have to look at the document and
* determine for yourself if the vectors are the same.
*/
# error "No IRQ numbers for this Kinetis L part"
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -181,9 +185,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

2
arch/arm/include/lc823450/chip.h
View File

@ -28,7 +28,7 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* NVIC priority levels *****************************************************/

2
arch/arm/include/lc823450/clk.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define LC823450_CLOCKS \

2
arch/arm/include/lc823450/irq.h
View File

@ -33,7 +33,7 @@
#include <nuttx/irq.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* Processor Exceptions (vectors 0-15) */

2
arch/arm/include/limits.h
View File

@ -26,7 +26,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
#define CHAR_BIT 8

52
arch/arm/include/lpc17xx_40xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/lpc17xx_40xx/chip.h
*
* Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
@ -32,20 +32,20 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LPC17XX_40XX_CHIP_H
#define __ARCH_ARM_INCLUDE_LPC17XX_40XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
@ -217,6 +217,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1773)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (128*1024) /* 128Kb */
# define LPC17_40_SRAM_SIZE (40*1024) /* 40Kb */
# define LPC17_40_CPUSRAM_SIZE (32*1024)
@ -233,6 +234,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1774)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (128*1024) /* 128Kb */
# define LPC17_40_SRAM_SIZE (40*1024) /* 40Kb */
# define LPC17_40_CPUSRAM_SIZE (32*1024)
@ -249,6 +251,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1776)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (256*1024) /* 256Kb */
# define LPC17_40_SRAM_SIZE (80*1024) /* 80Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -265,6 +268,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1777)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 96Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -281,6 +285,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1778)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 64Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -297,6 +302,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1785)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (256*1024) /* 256Kb */
# define LPC17_40_SRAM_SIZE (80*1024) /* 80Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -313,6 +319,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1786)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (256*1024) /* 256Kb */
# define LPC17_40_SRAM_SIZE (80*1024) /* 80Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -329,6 +336,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1787)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 96Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -345,6 +353,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC1788)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 96Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -361,6 +370,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4072)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (64*1024) /* 64Kb */
# define LPC17_40_SRAM_SIZE (24*1024) /* 24Kb */
# define LPC17_40_CPUSRAM_SIZE (16*1024)
@ -377,6 +387,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4074)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (128*1024) /* 128Kb */
# define LPC17_40_SRAM_SIZE (40*1024) /* 40Kb */
# define LPC17_40_CPUSRAM_SIZE (32*1024)
@ -393,6 +404,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4076)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (256*1024) /* 256Kb */
# define LPC17_40_SRAM_SIZE (80*1024) /* 80Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -409,6 +421,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4078)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 96Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -425,6 +438,7 @@
#elif defined(CONFIG_ARCH_CHIP_LPC4088)
# undef LPC176x /* Not LPC175/6 family */
# define LPC178x_40xx 1 /* LPC177/8 or LPC40xx family */
# define LPC17_40_FLASH_SIZE (512*1024) /* 512Kb */
# define LPC17_40_SRAM_SIZE (96*1024) /* 64Kb */
# define LPC17_40_CPUSRAM_SIZE (64*1024)
@ -442,10 +456,12 @@
# error "Unsupported LPC17xx/LPC40xx chip"
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:3] of each field, bits[2:0] read as zero and ignore writes.
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value, the
* greater the priority of the corresponding interrupt. The processor
* implements only bits[7:3] of each field, bits[2:0] read as zero and ignore
* writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xf8 /* All bits[7:3] set is minimum priority */
@ -453,16 +469,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x08 /* Five bits of interrupt priority used */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_LPC17XX_40XX_CHIP_H */

3
arch/arm/include/lpc17xx_40xx/irq.h
View File

@ -35,8 +35,9 @@
#include <arch/lpc17xx_40xx/chip.h>
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.

19
arch/arm/include/lpc17xx_40xx/lpc176x_irq.h
View File

@ -18,8 +18,8 @@
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC176X_IRQ_H
@ -30,8 +30,9 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
@ -122,9 +123,9 @@
#define LPC17_40_IRQ_NEXTINT (35)
#define LPC17_40_IRQ_NIRQS (LPC17_40_IRQ_EXTINT+LPC17_40_IRQ_NEXTINT)
/* GPIO interrupts. The LPC17xx/LPC40xx supports several interrupts on ports 0 and
* 2 (only). We go through some special efforts to keep the number of IRQs
* to a minimum in this sparse interrupt case.
/* GPIO interrupts. The LPC17xx/LPC40xx supports several interrupts on ports
* 0 and 2 (only). We go through some special efforts to keep the number of
* IRQs to a minimum in this sparse interrupt case.
*
* 28 interrupts on Port 0: p0.0 - p0.11, p0.15-p0.30
* 14 interrupts on Port 2: p2.0 - p2.13
@ -136,7 +137,7 @@
# define LPC17_40_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrupt set */
# define LPC17_40_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */
/* Set 1: 12 interrupts p0.0-p0.11 */
/* Set 1: 12 interrupts p0.0-p0.11 */
# define LPC17_40_VALID_GPIOINT0L (0x00000ffful)
# define LPC17_40_VALID_SHIFT0L (0)
@ -156,7 +157,7 @@
# define LPC17_40_IRQ_P0p11 (LPC17_40_VALID_FIRST0L+11)
# define LPC17_40_VALID_NIRQS0L (12)
/* Set 2: 16 interrupts p0.15-p0.30 */
/* Set 2: 16 interrupts p0.15-p0.30 */
# define LPC17_40_VALID_GPIOINT0H (0x7fff8000ull)
# define LPC17_40_VALID_SHIFT0H (15)
@ -180,7 +181,7 @@
# define LPC17_40_IRQ_P0p30 (LPC17_40_VALID_FIRST0H+15)
# define LPC17_40_VALID_NIRQS0H (16)
/* Set 3: 14 interrupts p2.0-p2.13 */
/* Set 3: 14 interrupts p2.0-p2.13 */
# define LPC17_40_VALID_GPIOINT2 (0x00003ffful)
# define LPC17_40_VALID_SHIFT2 (0)

15
arch/arm/include/lpc17xx_40xx/lpc178x_40xx_irq.h
View File

@ -46,7 +46,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
@ -156,8 +156,9 @@
#define LPC17_40_IRQ_NEXTINT (41)
#define LPC17_40_IRQ_NIRQS (LPC17_40_IRQ_EXTINT+LPC17_40_IRQ_NEXTINT)
/* GPIO interrupts. The LPC177x_8x supports several interrupts on ports 0 and
* 2 (only). We go through some special efforts to keep the number of IRQs
/* GPIO interrupts.
* The LPC177x_8x supports several interrupts on ports 0 and 2 (only).
* We go through some special efforts to keep the number of IRQs
* to a minimum in this sparse interrupt case.
*
* 31 interrupts on Port 0: p0.0 - p0.30
@ -170,7 +171,7 @@
# define LPC17_40_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrupt set */
# define LPC17_40_VALID_GPIOINT2 (0xfffffffful) /* GPIO port 2 interrupt set */
/* Set 1: 16 interrupts p0.0-p0.15 */
/* Set 1: 16 interrupts p0.0-p0.15 */
# define LPC17_40_VALID_SHIFT0L (0)
# define LPC17_40_VALID_FIRST0L (LPC17_40_IRQ_EXTINT+LPC17_40_IRQ_NEXTINT)
@ -193,7 +194,7 @@
# define LPC17_40_IRQ_P0p15 (LPC17_40_VALID_FIRST0L+15)
# define LPC17_40_VALID_NIRQS0L (16)
/* Set 2: 16 interrupts p0.16-p0.31 */
/* Set 2: 16 interrupts p0.16-p0.31 */
# define LPC17_40_VALID_SHIFT0H (16)
# define LPC17_40_VALID_FIRST0H (LPC17_40_VALID_FIRST0L+LPC17_40_VALID_NIRQS0L)
@ -216,7 +217,7 @@
# define LPC17_40_IRQ_P0p31 (LPC17_40_VALID_FIRST0H+15)
# define LPC17_40_VALID_NIRQS0H (16)
/* Set 3: 16 interrupts p2.0-p2.15 */
/* Set 3: 16 interrupts p2.0-p2.15 */
# define LPC17_40_VALID_SHIFT2L (0)
# define LPC17_40_VALID_FIRST2L (LPC17_40_VALID_FIRST0H+LPC17_40_VALID_NIRQS0H)
@ -239,7 +240,7 @@
# define LPC17_40_IRQ_P2p15 (LPC17_40_VALID_FIRST2L+15)
# define LPC17_40_VALID_NIRQS2L (16)
/* Set 4: 16 interrupts p2.16 - p2.31 */
/* Set 4: 16 interrupts p2.16 - p2.31 */
# define LPC17_40_VALID_SHIFT2H (16)
# define LPC17_40_VALID_FIRST2H (LPC17_40_VALID_FIRST2L+LPC17_40_VALID_NIRQS2L)

2
arch/arm/include/lpc214x/irq.h
View File

@ -34,7 +34,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* LPC214X Interrupts */

6
arch/arm/include/lpc2378/irq.h
View File

@ -55,7 +55,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* LPC2378 Interrupts */
@ -94,12 +94,12 @@
#define I2C2_IRQ 30 /* I2C 2 */
#define I2S_IRQ 31 /* I2S */
#define IRQ_SYSTIMER TIMER0_IRQ
#define NR_IRQS 32
/* There are 32 vectored interrupts. If vectored interrupts are enabled, the
/* There are 32 vectored interrupts.
* If vectored interrupts are enabled, the
* following will be used by the system.
*/
#define SYSTIMER_VEC 0 /* System timer */

2
arch/arm/include/lpc31xx/irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* LPC31XX Interrupts */

80
arch/arm/include/lpc43xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/lpc43xx/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LPC43XX_CHIP_H
#define __ARCH_ARM_INCLUDE_LPC43XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Per the data sheet: LPC4350/30/20/10 Rev. 3.2 — 4 June 2012 */
@ -65,33 +65,41 @@
/* Get customizations for each supported chip.
*
* SRAM Resources
* --------------------- -------- ------- ------- ------- ------- ------- -------
* Local SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* --------------------- -------- ------- ------- ------- ------- ------- -------
* BANK 0 (0x1000 0000) 96Kb 96Kb 128Kb 128Kb 32Kb 32Kb 32Kb
* BANK 1 (0x1008 0000) 40Kb 40Kb 72Kb 72Kb 40Kb 40Kb 40Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* SUBTOTAL 136Kb 136Kb 200Kb 200Kb 72Kb 72Kb 72Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* AHB SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* --------------------- -------- ------- ------- ------- ------- ------- -------
* BANK 0 (0x2000 0000) 16Kb 48Kb 48Kb 48Kb 48Kb 48Kb 48Kb
* BANK 1 (0x2000 8000) NOTE 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1
* BANK 2 (0x2000 c000) 16Kb 16Kb 16Kb 16Kb 16Kb 16Kb 16Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* SUBTOTAL 32Kb 64Kb 64Kb 64Kb 64Kb 64Kb 64Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* TOTAL 168Kb 200Kb 264Kb 264Kb 136Kb 136Kb 136Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* --------------- -------- ------- ------- ------- ------- ------- -------
* Local SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* --------------- -------- ------- ------- ------- ------- ------- -------
* BANK 0 96Kb 96Kb 128Kb 128Kb 32Kb 32Kb 32Kb
* (0x1000 0000)
* BANK 1 40Kb 40Kb 72Kb 72Kb 40Kb 40Kb 40Kb
* (0x1008 0000)
* -------------- -------- ------- ------- ------- ------- ------- -------
* SUBTOTAL 136Kb 136Kb 200Kb 200Kb 72Kb 72Kb 72Kb
* -------------- -------- ------- ------- ------- ------- ------- -------
* AHB SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* -------------- -------- ------- ------- ------- ------- ------- -------
* BANK 0 16Kb 48Kb 48Kb 48Kb 48Kb 48Kb 48Kb
* (0x2000 0000)
* BANK 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1
* (0x2000 8000)
* BANK 2 16Kb 16Kb 16Kb 16Kb 16Kb 16Kb 16Kb
* (0x2000 c000)
* -------------- -------- ------- ------- ------- ------- ------- -------
* SUBTOTAL 32Kb 64Kb 64Kb 64Kb 64Kb 64Kb 64Kb
* -------------- -------- ------- ------- ------- ------- ------- -------
* TOTAL 168Kb 200Kb 264Kb 264Kb 136Kb 136Kb 136Kb
* -------------- -------- ------- ------- ------- ------- ------- -------
*
* --------------------- -------- ------- ------- ------- ------- ------- -------
* FLASH LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* --------------------- -------- ------- ------- ------- ------- ------- -------
* BANK A (0x1a00 0000) 256Kb 512Kb 512Kb
* BANK B (0x1b00 8000) 256Kb 512Kb 512Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* TOTAL None None None None 512Kb 1024Kb 1024Kb
* --------------------- -------- ------- ------- ------- ------- ------- -------
* -------------- -------- ------- ------- ------- ------- ------- -------
* FLASH LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357 LPC4337
* -------------- -------- ------- ------- ------- ------- ------- -------
* BANK A 256Kb 512Kb 512Kb
* (0x1a00 0000)
* BANK B 256Kb 512Kb 512Kb
* (0x1b00 8000)
* -------------- -------- ------- ------- ------- ------- ------- -------
* TOTAL None None None None 512Kb 1024Kb 1024Kb
* -------------- -------- ------- ------- ------- ------- ------- -------
*
* NOTE 1: The 64Kb of AHB of SRAM on the LPC4350/30/20 span all AHB SRAM
* banks but are treated as two banks of 48 an 16Kb by the NuttX memory
@ -674,10 +682,10 @@
# error "Unsupported LPC43xx chip"
#endif
/* NVIC priority levels *************************************************************/
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
* the priority of the corresponding interrupt.
/* Each priority field holds a priority value, 0-31. The lower the value, the
* greater the priority of the corresponding interrupt.
*
* The Cortex-M4 core supports up to 53 interrupts an 8 prgrammable interrupt
* priority levels; The Cortex-M0 core supports up to 32 interrupts with 4

45
arch/arm/include/lpc43xx/irq.h
View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/include/lpc43xx/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
@ -25,21 +25,22 @@
#ifndef __ARCH_ARM_INCLUDE_LPC43XX_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC43XX_IRQ_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to handle mapping
* tables.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to
* handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
@ -114,8 +115,8 @@
#define LPC43M4_IRQ_NEXTINT (53)
#define LPC43M4_IRQ_NIRQS (LPC43_IRQ_EXTINT+LPC43M4_IRQ_NEXTINT)
/* Total number of IRQ numbers (This will need to be revisited if/when the Cortex-M0 is
* supported)
/* Total number of IRQ numbers (This will need to be revisited
* if/when the Cortex-M0 is supported)
*/
#define NR_IRQS LPC43M4_IRQ_NIRQS
@ -163,33 +164,33 @@
#define LPC43M0_IRQ_NEXTINT (30)
#define LPC43M0_IRQ_NIRQS (LPC43_IRQ_EXTINT+LPC43M0_IRQ_NEXTINT)
/* Total number of IRQ numbers (This will need to be revisited if/when the Cortex-M0 is
* supported)
/* Total number of IRQ numbers
* (This will need to be revisited if/when the Cortex-M0 is supported)
*/
#if 0
#define NR_IRQS LPC43M0_IRQ_NIRQS
#endif
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
typedef void (*vic_vector_t)(uint32_t *regs);
#endif
/********************************************************************************************
/****************************************************************************
* Inline functions
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Function Prototypes
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

41
arch/arm/include/lpc54xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/lpc54xx/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,37 +16,40 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LPC54XX_CHIP_H
#define __ARCH_ARM_INCLUDE_LPC54XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
***********************************************************************************
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* LPC546xx Family Options.
*
* Family CPU Flash SRAM FS HS Ether- CAN CAN LCD Package
* MHz (Kb) (Kb) USB USB net 2.0 FD
* LPC54628 220 512 200 X X X X X X BGA180
* LPC54618 180 <=512 <=200 X X X X X X BGA180, LQFP208
* LPC54616 180 <=512 <=200 X X X X X BGA100, BGA180, LQFP100, LQFP208
* LPC54616 180 <=512 <=200 X X X X X BGA100, BGA180,
* LQFP100, LQFP208
* LPC54608 180 512 200 X X X X X BGA180, LQFP208
* LPC54607 180 <=512 <=200 X X X BGA180, LQFP208
* LPC54606 180 <=512 <=200 X X X X BGA100, BGA180, LQFP100, LQFP208
* LPC54606 180 <=512 <=200 X X X X BGA100, BGA180,
* LQFP100, LQFP208
* LPC54605 180 <=512 <=200 X X BGA180
*/
/* NVIC priority levels *************************************************************/
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
* the priority of the corresponding interrupt.
/* Each priority field holds a priority value, 0-31. The lower the value, the
* greater the priority of the corresponding interrupt.
*
* The Cortex-M4 core supports 8 programmable interrupt priority levels.
*/
@ -56,16 +59,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Steps between priorities */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_LPC43XX_CHIP_H */

29
arch/arm/include/lpc54xx/irq.h
View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/include/lpc54xx/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
@ -25,21 +25,22 @@
#ifndef __ARCH_ARM_INCLUDE_LPC54XX_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC54XX_IRQ_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to handle mapping
* tables.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to
* handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
@ -68,16 +69,16 @@
# error "Unsupported LPC54 MCU"
#endif
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
typedef void (*vic_vector_t)(uint32_t *regs);
/********************************************************************************************
/****************************************************************************
* Public Function Prototypes
********************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"

14
arch/arm/include/lpc54xx/lpc546x_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************************
/****************************************************************************
* arch/arm/include/lpc54xx/lpc546x_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LPC54XX_LPC543X_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC54XX_LPC543X_IRQ_H
/****************************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************************/
****************************************************************************/
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Cortex-M4 External interrupts (vectors >= 16) */

48
arch/arm/include/max326xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/max326xx/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,27 +16,27 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_MAX326XX_CHIP_H
#define __ARCH_ARM_INCLUDE_MAX326XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported MAX326xx family. Only sizes and numbers of
* things are provided here. See arch/arm/src/max326xx/Kconfig for other, boolean
* configuration settings.
/* Get customizations for each supported MAX326xx family. Only sizes and
* numbers of things are provided here. See arch/arm/src/max326xx/Kconfig
* for other, boolean configuration settings.
*
* MAX326xx Families are determined by sharing a common User Guide for the chip
* specification:
* MAX326xx Families are determined by sharing a common User Guide for the
* chip specification:
*
* MAX32620/32621 Family: MAX32620 Rev C, User Guide, AN6242, Rev 2, 2/17
* MAX32630/32632 Family: MAX32630 Rev B, User Guide, AN6349, Rev 0, 10/16
@ -174,10 +174,12 @@
# error Unrecognized MAX326XX chip
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0x00-0xe0. The lower the value, the
* greater the priority of the corresponding interrupt. The processor implements only
* bits[7:4] of each field, bits[6:0] read as zero and ignore writes.
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0x00-0xe0. The lower the
* value, the greater the priority of the corresponding interrupt. The
* processor implements only bits[7:4] of each field, bits[6:0] read as zero
* and ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* All bits[7:5] set is minimum priority */
@ -185,16 +187,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Eight priority levels in steps 0x20 */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_MAX326XX_CHIP_H */

37
arch/arm/include/max326xx/irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************
/****************************************************************************
* arch/arm/include/max326xx/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,29 +16,30 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_MAX326_IRQ_H
#define __ARCH_ARM_INCLUDE_MAX326_IRQ_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/max326xx/chip.h>
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in
* the IRQ to handle mapping tables.
*/
/* Common Processor Exceptions (vectors 0-15) */
@ -70,15 +71,15 @@
# error "Unsupported MAX326XX family"
#endif
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
@ -88,9 +89,9 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************************
/****************************************************************************
* Public Function Prototypes
****************************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

38
arch/arm/include/max326xx/max32620_30_irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************************
/****************************************************************************
* arch/arm/include/max326xx/max32620_30_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_MAX326XX_MAX32610_30_IRQ_H
#define __ARCH_ARM_INCLUDE_MAX326XX_MAX32610_30_IRQ_H
/************************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
* Pre-processor Definitions
************************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts (vectors >= 16) */
@ -92,7 +92,9 @@
#define MAX326_IRQ_NVECTORS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
/* If GPIO pin interrupts are used then there is a second level of interrupt decode */
/* If GPIO pin interrupts are used then there is a second level of interrupt
* decode
*/
#ifdef CONFIG_MAX326XX_GPIOIRQ
#warning Missing logic
@ -104,21 +106,21 @@
#define NR_IRQS (MAX326_IRQ_NVECTORS + MAX326_IRQ_NPININT)
/************************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Inline functions
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

42
arch/arm/include/max326xx/max32660_irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************************
/****************************************************************************
* arch/arm/include/max326xx/max32660_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_MAX326XX_MAX32660_IRQ_H
#define __ARCH_ARM_INCLUDE_MAX326XX_MAX32660_IRQ_H
/************************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
* Pre-processor Definitions
************************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* External interrupts (vectors >= 16) */
@ -67,10 +67,14 @@
#define MAX326_IRQ_NEXTINT 55
#define MAX326_IRQ_NVECTORS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
/* If GPIO pin interrupts are used then there is a second level of interrupt decode */
/* If GPIO pin interrupts are used then there is a second level of
* interrupt decode
*/
#ifdef CONFIG_MAX326XX_GPIOIRQ
/* Up to 14 pins are available as interrupt sources, depending on the MAX32660 package */
/* Up to 14 pins are available as interrupt sources,
* depending on the MAX32660 package
*/
# define MAX326_IRQ_P0_0 (MAX326_IRQ_NEXTINT + 0)
# define MAX326_IRQ_P0_1 (MAX326_IRQ_NEXTINT + 1)
@ -98,21 +102,21 @@
#define NR_IRQS (MAX326_IRQ_NVECTORS + MAX326_IRQ_NPININT)
/************************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Inline functions
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus

2
arch/arm/include/moxart/irq.h
View File

@ -30,7 +30,7 @@
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/****************************************************************************

34
arch/arm/include/nrf52/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/nrf52/chip.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@ -31,25 +31,25 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_NRF52_CHIP_H
#define __ARCH_ARM_INCLUDE_NRF52_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
***********************************************************************************
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* NVIC priority levels *************************************************************/
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
* the priority of the corresponding interrupt.
/* Each priority field holds a priority value, 0-31. The lower the value,
* the greater the priority of the corresponding interrupt.
*
* The Cortex-M4 core supports 8 programmable interrupt priority levels.
*/
@ -59,16 +59,16 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Steps between priorities */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_NRF52_CHIP_H */

33
arch/arm/include/nrf52/irq.h
View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/include/nrf52/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
@ -25,21 +25,22 @@
#ifndef __ARCH_ARM_INCLUDE_NRF52_IRQ_H
#define __ARCH_ARM_INCLUDE_NRF52_IRQ_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to handle mapping
* tables.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to
* handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
@ -62,9 +63,9 @@
/* Cortex-M4 External interrupts (vectors >= 16) */
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#if defined(CONFIG_ARCH_FAMILY_NRF52)
# include <arch/nrf52/nrf52_irq.h>
@ -72,16 +73,16 @@
# error "Unsupported NRF52XX MCU"
#endif
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
typedef void (*vic_vector_t)(uint32_t *regs);
/********************************************************************************************
/****************************************************************************
* Public Function Prototypes
********************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"

14
arch/arm/include/nrf52/nrf52_irq.h
View File

@ -1,4 +1,4 @@
/****************************************************************************************************
/****************************************************************************
* arch/arm/include/nrf52/nrf52_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_NRF52_NRF52_IRQ_H
#define __ARCH_ARM_INCLUDE_NRF52_NRF52_IRQ_H
/****************************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************************/
****************************************************************************/
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Cortex-M4 External interrupts (vectors >= 16) */

43
arch/arm/include/nuc1xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/nuc1xx/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_NUC1XX_CHIP_H
#define __ARCH_ARM_INCLUDE_NUC1XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Chip capabilities ****************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Chip capabilities ********************************************************/
/* NUC100 Advanced Line (Low Density) */
#if defined(CONFIG_ARCH_CHIP_NUC100LC1BN) /* Flash 32K SRAM 4K, LQFP48 package */
@ -620,10 +621,12 @@
# error "Unrecognized NUC1XX chip"
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-3. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-3. The lower the value, the
* greater the priority of the corresponding interrupt. The processor
* implements only bits[7:6] of each field, bits[5:0] read as zero and
* ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
@ -631,13 +634,13 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -648,9 +651,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

43
arch/arm/include/nuc1xx/irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/nuc1xx/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,29 +16,30 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H
#define __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/nuc1xx/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in
* the IRQ to handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
@ -54,7 +55,9 @@
#define NUC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define NUC_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
/* External interrupts (vectors >= 16).
* These definitions are chip-specific
*/
#define NUC_IRQ_INTERRUPT (16)
@ -64,13 +67,13 @@
# error "Unrecognized/unsupported NUC chip"
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -81,9 +84,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

32
arch/arm/include/nuc1xx/nuc120_irq.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/nuc1xx/nuc120_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly through
* nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_NUC1XX_NUC120_IRQ_H
#define __ARCH_ARM_INCLUDE_NUC1XX_NUC120_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* NUC120 IRQ numbers */
@ -70,13 +70,13 @@
#define NR_IRQS (48)
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -87,9 +87,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

2
arch/arm/include/rp2040/irq.h
View File

@ -34,7 +34,7 @@
#endif
/****************************************************************************
* Pre-processor Definitions
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map

32
arch/arm/include/s32k1xx/chip.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/include/s32k1xx/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,25 +16,25 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H
#define __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* NVIC priority levels *************************************************************/
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value. The lower the value, the greater the
* priority of the corresponding interrupt.
/* Each priority field holds a priority value. The lower the value, the
* greater the priority of the corresponding interrupt.
*/
#if defined(CONFIG_ARCH_CORTEXM4)
@ -55,16 +55,16 @@
#endif
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H */

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