Rename all usage of samdl/SAMDL to samd2l2/SAMD2L2 to make room in the name space for the forthcoming samd5e5/SAMD5E5

Squashed commit of the following:

    Change all remaining occurrences of SAMDL to SAMD2L2.

    configs/:  Change all remaining occurrences of SAMDL to SAMD2L2

    configs/:  Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
    arch/arm/src and include:  Rename all directories from samdl to samd2l2.  Change all configuration variable names and other usage from SAMDL to SAMD2L2.
This commit is contained in:
Gregory Nutt 2018-07-22 15:54:12 -06:00
parent f887bdb6d6
commit c3b406826e
138 changed files with 2025 additions and 2025 deletions

View File

@ -174,7 +174,7 @@ arch/arm - ARM-based micro-controllers
arch/arm/include/nuc1xx and arch/arm/src/nuc1xx
arch/arm/include/sam34 and arch/arm/src/sam34
arch/arm/include/sama45 and arch/arm/src/sama5
arch/arm/include/samdl and arch/arm/src/samdl
arch/arm/include/samd2l2 and arch/arm/src/samd2l2
arch/arm/include/samv7 and arch/arm/src/samv7
arch/arm/include/stm32 and arch/arm/src/stm32
arch/arm/include/stm32f7 and arch/arm/src/stm32f7

View File

@ -572,7 +572,7 @@ config ARCH_CHIP
default "nrf52" if ARCH_CHIP_NRF52
default "nuc1xx" if ARCH_CHIP_NUC1XX
default "sama5" if ARCH_CHIP_SAMA5
default "samdl" if ARCH_CHIP_SAMD || ARCH_CHIP_SAML
default "samd2l2" if ARCH_CHIP_SAMD || ARCH_CHIP_SAML
default "sam34" if ARCH_CHIP_SAM34
default "samv7" if ARCH_CHIP_SAMV7
default "stm32" if ARCH_CHIP_STM32
@ -820,7 +820,7 @@ if ARCH_CHIP_SAMA5
source arch/arm/src/sama5/Kconfig
endif
if ARCH_CHIP_SAMD || ARCH_CHIP_SAML
source arch/arm/src/samdl/Kconfig
source arch/arm/src/samd2l2/Kconfig
endif
if ARCH_CHIP_SAM34
source arch/arm/src/sam34/Kconfig

View File

@ -0,0 +1,993 @@
/************************************************************************************
* arch/arm/include/samd2l2/chip.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_SAMD2L2_CHIP_H
#define __ARCH_ARM_INCLUDE_SAMD2L2_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Get customizations for each supported chip */
/* SAMD20 Family ********************************************************************/
/* FEATURE SAM D20J SAM D20G SAM D20E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64/32/16KB 256/128/64/32/16KB 256/128/64/32/16KB
* SRAM 32/16/8/4/2KB 32/16/8/4/2KB 32/16/8/4/2KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 8 8 8
* Timer/counters 8 6 6
* TC output channels 2 2 2
* SERCOM 6 6 4
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 1 1 1
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 16x16 12x10 10x6
* Packages QFN/TQFP QFN/TQFP QFN/TQFP
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC8M, and DFLL48M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAMD20E14)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (16*1024) /* 16KB */
# define SAMD2L2_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E15)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E16)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E17)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E18)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G14)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (16*1024) /* 16KB */
# define SAMD2L2_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G15)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G16)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G17)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G18)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J14)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (16*1024) /* 16KB */
# define SAMD2L2_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J15)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J16)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J17)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J18)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#else
# undef SAMD20 /* Not SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# undef SAMD20J
#endif
/* SAMD20 Peripherals */
#if defined(SAMD20E)
# define SAMD2L2_NEVENTS 8 /* 8 event channels */
# define SAMD2L2_NTC 6 /* 6 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 0 /* No TC control channels */
# define SAMD2L2_NTCCOUT 0 /* No TCC output channels */
# define SAMD2L2_NDMACHAN 0 /* No DMA channels */
# define SAMD2L2_NUSBIF 0 /* No USB interface */
# define SAMD2L2_NAES 0 /* No AES engine */
# define SAMD2L2_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 0 /* No True random number generator */
# define SAMD2L2_NSERCOM 4 /* 4 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 10 /* 10 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 0 /* No OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 10 /* PTC X */
# define SAMD2L2_NPTCY 6 /* PTC Y */
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20G)
# define SAMD2L2_NEVENTS 8 /* 8 event channels */
# define SAMD2L2_NTC 6 /* 6 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 0 /* No TC control channels */
# define SAMD2L2_NTCCOUT 0 /* No TCC output channels */
# define SAMD2L2_NDMACHAN 0 /* No DMA channels */
# define SAMD2L2_NUSBIF 0 /* No USB interface */
# define SAMD2L2_NAES 0 /* No AES engine */
# define SAMD2L2_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 0 /* No True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 15 /* 14 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 0 /* No OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 12 /* PTC X */
# define SAMD2L2_NPTCY 10 /* PTC Y */
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20J)
# define SAMD2L2_NEVENTS 8 /* 8 event channels */
# define SAMD2L2_NTC 8 /* 8 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 0 /* No TC control channels */
# define SAMD2L2_NTCCOUT 0 /* No TCC output channels */
# define SAMD2L2_NDMACHAN 0 /* No DMA channels */
# define SAMD2L2_NUSBIF 0 /* No USB interface */
# define SAMD2L2_NAES 0 /* No AES engine */
# define SAMD2L2_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 0 /* No True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 20 /* 20 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 0 /* No OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 16 /* PTC X */
# define SAMD2L2_NPTCY 16 /* PTC Y */
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#endif
/* SAMD21 Family ********************************************************************/
/* FEATURE SAM D21J SAM D21G SAM D21E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64/32/16KB 256/128/64/32KB 256/128/64/32KB
* SRAM 32/16/8/4/2KB 32/16/8/4/2KB 32/16/8/4KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 12 12 12
* Timer/counters 5 3 3
* TC output channels 2 2 2
* T/C Control 3 3 3
* TCC output channels 2 2 2
* TCC waveform output 8/4/2 8/4/2 6/4/2
* DMA channels 12 12 12
* USB interface 1 1 1
* SERCOM 6 6 4
* I2S 1 1 1
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 1 1 1
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 16x16 12x10 10x6
* Packages QFN/TQFP QFN/TQFP/WLCSP QFN/TQFP/UFBGA
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC8M, DFLL48M, and FDPLL96M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAMD21E15A) || defined(CONFIG_ARCH_CHIP_SAMD21E15B)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21E15A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21E16A) || defined(CONFIG_ARCH_CHIP_SAMD21E16B)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21E16A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21E17A)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21E18A)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21G15A) || defined(CONFIG_ARCH_CHIP_SAMD21G15B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21G15A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21G16A) || defined(CONFIG_ARCH_CHIP_SAMD21G16B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21G16A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21G17A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21G18A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21J15A) || defined(CONFIG_ARCH_CHIP_SAMD21J15B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21J15A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21J16A) || defined(CONFIG_ARCH_CHIP_SAMD21J16B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21J16A)
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21J17A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21J18A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (0*1024) /* None */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (0*1024) /* None */
#else
# undef SAMD21 /* Not SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# undef SAMD21J
#endif
#if defined(SAMD21E)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 3 /* 3 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMD2L2_NDMACHAN 12 /* 12 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 4 /* 4 SERCOM */
# define SAMD2L2_NI2S 1 /* 1 I2S */
# define SAMD2L2_NADC 10 /* 10 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 10 /* 10x6 */
# define SAMD2L2_NPTCY 6 /* 10x6*/
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAMD21G)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 3 /* 3 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMD2L2_NDMACHAN 12 /* 12 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 1 /* 1 I2S */
# define SAMD2L2_NADC 14 /* 14 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 12 /* 12x10 */
# define SAMD2L2_NPTCY 10 /* 12x10 */
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAMD21J)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 5 /* 5 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMD2L2_NDMACHAN 12 /* 12 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 1 /* 1 I2S */
# define SAMD2L2_NADC 20 /* 20 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 1 /* 1 DAC channel */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 16 /* 16x16 */
# define SAMD2L2_NPTCY 16 /* 16x16*/
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#endif
/* SAML21 Family ********************************************************************/
/* FEATURE SAM L21J SAM L21G SAM L21E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64KB 256/128/64KB 256/128/64/32KB
* Flash RWW 8/4/2KB 8/4/2KB 8/4/2/1KB
* SRAM 32/16/8KB 32/16/8KB 32/16/8/4KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 12 12 12
* Timer/counters 5 3 3
* TC output channels 2 2 2
* T/C Control 3 3 3
* TCC output channels 2 2 2
* TCC waveform output 8/4/2 8/4/2 6/4/2
* DMA channels 16 16 16
* USB interface 1 1 1
* AES engine 1 1 1
* CCLs 4 4 4
* TRNG 1 1 1
* SERCOM 6 6 4
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 2 2 2
* OPAMP 3 3 3
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 12x16 8x12 6x10
* 16x12 12x8 10x6
* Packages QFN/TQFP QFN/TQFP QFN/TQFP
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC16M, DFLL48M, and FDPLL96M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAML21E15)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (32*1024) /* 32KB */
# define SAMD2L2_FLASHRWW_SIZE (1*1024) /* 1KB */
# define SAMD2L2_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMD2L2_LPRAM_SIZE (2*1024) /* 2KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E16)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (4*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E17)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E18)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 6 /* 6 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (4*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 8 /* 8 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (64*1024) /* 64KB */
# define SAMD2L2_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMD2L2_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (128*1024) /* 128KB */
# define SAMD2L2_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMD2L2_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMD2L2_FLASH_SIZE (256*1024) /* 256KB */
# define SAMD2L2_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMD2L2_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMD2L2_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMD2L2_TCC_NWAVEFORMS 8 /* 8 TCC waveform outputs */
#else
# undef SAML21 /* Not SAML21 family */
# undef SAML21E
# undef SAML21G
# undef SAML21J
#endif
#if defined(SAML21E)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 3 /* 3 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_NDMACHAN 16 /* 16 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 4 /* 4 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 10 /* 10 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 2 /* 2 DAC channels */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 10 /* PTC X 6 or 10 */
# define SAMD2L2_NPTCY 10 /* PTC Y 6 or 10*/
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAML21G)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 3 /* 3 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_NDMACHAN 16 /* 16 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 14 /* 14 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 2 /* 2 DAC channels */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 12 /* PTC X 8 or 12 */
# define SAMD2L2_NPTCY 12 /* PTC Y 8 or 12*/
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#elif defined(SAML21J)
# define SAMD2L2_NEVENTS 12 /* 12 event channels */
# define SAMD2L2_NTC 5 /* 5 Timer/counters */
# define SAMD2L2_NTCOUT 2 /* 2 TC output channels */
# define SAMD2L2_NTCC 3 /* 3 TC control channels */
# define SAMD2L2_NTCCOUT 2 /* 2 TCC output channels */
# define SAMD2L2_NDMACHAN 16 /* 16 DMA channels */
# define SAMD2L2_NUSBIF 1 /* 1 USB interface */
# define SAMD2L2_NAES 1 /* 1 AES engine */
# define SAMD2L2_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMD2L2_NTRNG 1 /* 1 True random number generator */
# define SAMD2L2_NSERCOM 6 /* 6 SERCOM */
# define SAMD2L2_NI2S 0 /* No I2S */
# define SAMD2L2_NADC 20 /* 20 ADC channels */
# define SAMD2L2_NCMP 2 /* 2 Comparators */
# define SAMD2L2_NDAC 2 /* 2 DAC channels */
# define SAMD2L2_NOPAMP 3 /* 3 OpAmps */
# define SAMD2L2_RTC 1 /* Have RTC */
# define SAMD2L2_NALARMS 1 /* 1 RTC alarm */
# define SAMD2L2_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMD2L2_NEXTINT 16 /* 16 External interrupts */
# define SAMD2L2_NPTCX 16 /* PTC X 12 or 16 */
# define SAMD2L2_NPTCY 16 /* PTC Y 12 or 16*/
# define SAMD2L2_WDT 1 /* Have watchdog timer */
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-3. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_SAMD2L2_CHIP_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************************
* arch/arm/include/samdl/irq.h
* arch/arm/include/samd2l2/irq.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,15 +37,15 @@
* nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_SAMDL_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMDL_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_SAMD2L2_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD2L2_IRQ_H
/****************************************************************************************
* Included Files
****************************************************************************************/
#include <nuttx/config.h>
#include <arch/samdl/chip.h>
#include <arch/samd2l2/chip.h>
/****************************************************************************************
* Pre-processor Definitions
@ -76,11 +76,11 @@
/* Chip-Specific External interrupts */
#if defined(CONFIG_ARCH_FAMILY_SAMD20)
# include <arch/samdl/samd20_irq.h>
# include <arch/samd2l2/samd20_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_SAMD21)
# include <arch/samdl/samd21_irq.h>
# include <arch/samd2l2/samd21_irq.h>
#elif defined(CONFIG_ARCH_FAMILY_SAML21)
# include <arch/samdl/saml21_irq.h>
# include <arch/samd2l2/saml21_irq.h>
#else
# error Unrecognized SAMD/L architecture
#endif
@ -113,4 +113,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_SAMDL_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_SAMD2L2_IRQ_H */

View File

@ -37,8 +37,8 @@
* nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_SAMDL_SAMD20_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMDL_SAMD20_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_SAMD2L2_SAMD20_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD2L2_SAMD20_IRQ_H
/****************************************************************************************
* Included Files
@ -81,7 +81,7 @@
/* GPIO interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_SAMDL_GPIOIRQ
#ifdef CONFIG_SAMD2L2_GPIOIRQ
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */
@ -138,4 +138,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_SAMDL_SAMD20_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_SAMD2L2_SAMD20_IRQ_H */

View File

@ -41,8 +41,8 @@
* nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_SAMDL_SAMD21_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMDL_SAMD21_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_SAMD2L2_SAMD21_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD2L2_SAMD21_IRQ_H
/****************************************************************************************
* Included Files
@ -88,7 +88,7 @@
/* EIC interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_SAMDL_EIC
#ifdef CONFIG_SAMD2L2_EIC
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */
@ -145,4 +145,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_SAMDL_SAMD21_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_SAMD2L2_SAMD21_IRQ_H */

View File

@ -37,8 +37,8 @@
* nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_SAMDL_SAML21_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMDL_SAML21_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_SAMD2L2_SAML21_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD2L2_SAML21_IRQ_H
/****************************************************************************************
* Included Files
@ -89,7 +89,7 @@
/* GPIO interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_SAMDL_GPIOIRQ
#ifdef CONFIG_SAMD2L2_GPIOIRQ
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS + 0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS + 1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS + 2) /* External interrupt 2 */
@ -146,4 +146,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_SAMDL_SAML21_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_SAMD2L2_SAML21_IRQ_H */

View File

@ -1,993 +0,0 @@
/************************************************************************************
* arch/arm/include/samdl/chip.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_SAMDL_CHIP_H
#define __ARCH_ARM_INCLUDE_SAMDL_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Get customizations for each supported chip */
/* SAMD20 Family ********************************************************************/
/* FEATURE SAM D20J SAM D20G SAM D20E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64/32/16KB 256/128/64/32/16KB 256/128/64/32/16KB
* SRAM 32/16/8/4/2KB 32/16/8/4/2KB 32/16/8/4/2KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 8 8 8
* Timer/counters 8 6 6
* TC output channels 2 2 2
* SERCOM 6 6 4
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 1 1 1
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 16x16 12x10 10x6
* Packages QFN/TQFP QFN/TQFP QFN/TQFP
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC8M, and DFLL48M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAMD20E14)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (16*1024) /* 16KB */
# define SAMDL_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E15)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E16)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E17)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20E18)
# define SAMD20 1 /* SAMD20 family */
# define SAMD20E 1 /* SAMD20E */
# undef SAMD20G
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G14)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (16*1024) /* 16KB */
# define SAMDL_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G15)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G16)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G17)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20G18)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# define SAMD20G 1 /* SAMD20G */
# undef SAMD20J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J14)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (16*1024) /* 16KB */
# define SAMDL_SRAM0_SIZE (2*1024) /* 2KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J15)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J16)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J17)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD20J18)
# define SAMD20 1 /* SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# define SAMD20J 1 /* SAMD20J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#else
# undef SAMD20 /* Not SAMD20 family */
# undef SAMD20E
# undef SAMD20G
# undef SAMD20J
#endif
/* SAMD20 Peripherals */
#if defined(SAMD20E)
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 6 /* 6 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMACHAN 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 4 /* 4 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 10 /* 10 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 10 /* PTC X */
# define SAMDL_NPTCY 6 /* PTC Y */
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20G)
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 6 /* 6 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMACHAN 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 15 /* 14 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 12 /* PTC X */
# define SAMDL_NPTCY 10 /* PTC Y */
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD20J)
# define SAMDL_NEVENTS 8 /* 8 event channels */
# define SAMDL_NTC 8 /* 8 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 0 /* No TC control channels */
# define SAMDL_NTCCOUT 0 /* No TCC output channels */
# define SAMDL_NDMACHAN 0 /* No DMA channels */
# define SAMDL_NUSBIF 0 /* No USB interface */
# define SAMDL_NAES 0 /* No AES engine */
# define SAMDL_NCCL 0 /* No Counfigurable Custom Logic */
# define SAMDL_NTRNG 0 /* No True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 20 /* 20 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 0 /* No OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 16 /* PTC X */
# define SAMDL_NPTCY 16 /* PTC Y */
# define SAMDL_WDT 1 /* Have watchdog timer */
#endif
/* SAMD21 Family ********************************************************************/
/* FEATURE SAM D21J SAM D21G SAM D21E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64/32/16KB 256/128/64/32KB 256/128/64/32KB
* SRAM 32/16/8/4/2KB 32/16/8/4/2KB 32/16/8/4KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 12 12 12
* Timer/counters 5 3 3
* TC output channels 2 2 2
* T/C Control 3 3 3
* TCC output channels 2 2 2
* TCC waveform output 8/4/2 8/4/2 6/4/2
* DMA channels 12 12 12
* USB interface 1 1 1
* SERCOM 6 6 4
* I2S 1 1 1
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 1 1 1
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 16x16 12x10 10x6
* Packages QFN/TQFP QFN/TQFP/WLCSP QFN/TQFP/UFBGA
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC8M, DFLL48M, and FDPLL96M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAMD21E15A) || defined(CONFIG_ARCH_CHIP_SAMD21E15B)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21E15A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21E16A) || defined(CONFIG_ARCH_CHIP_SAMD21E16B)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21E16A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21E17A)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21E18A)
# define SAMD21 1 /* SAMD21 family */
# define SAMD21E 1 /* SAMD21E */
# undef SAMD21G
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21G15A) || defined(CONFIG_ARCH_CHIP_SAMD21G15B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21G15A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21G16A) || defined(CONFIG_ARCH_CHIP_SAMD21G16B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21G16A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21G17A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21G18A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# define SAMD21G 1 /* SAMD21G */
# undef SAMD21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21J15A) || defined(CONFIG_ARCH_CHIP_SAMD21J15B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21J15A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (1*1024) /* 1KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21J16A) || defined(CONFIG_ARCH_CHIP_SAMD21J16B)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
# if defined(CONFIG_ARCH_CHIP_SAMD21J16A)
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# else
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# endif
#elif defined(CONFIG_ARCH_CHIP_SAMD21J17A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#elif defined(CONFIG_ARCH_CHIP_SAMD21J18A)
# define SAMD21 1 /* SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# define SAMD21J 1 /* SAMD21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (0*1024) /* None */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (0*1024) /* None */
#else
# undef SAMD21 /* Not SAMD21 family */
# undef SAMD21E
# undef SAMD21G
# undef SAMD21J
#endif
#if defined(SAMD21E)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMDL_NDMACHAN 12 /* 12 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 4 /* 4 SERCOM */
# define SAMDL_NI2S 1 /* 1 I2S */
# define SAMDL_NADC 10 /* 10 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 10 /* 10x6 */
# define SAMDL_NPTCY 6 /* 10x6*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD21G)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMDL_NDMACHAN 12 /* 12 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 1 /* 1 I2S */
# define SAMDL_NADC 14 /* 14 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 12 /* 12x10 */
# define SAMDL_NPTCY 10 /* 12x10 */
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAMD21J)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 5 /* 5 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_TCC_NWAVEFORMS 8 /* Each TCC has a different number of outputs */
# define SAMDL_NDMACHAN 12 /* 12 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 1 /* 1 I2S */
# define SAMDL_NADC 20 /* 20 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 1 /* 1 DAC channel */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 16 /* 16x16 */
# define SAMDL_NPTCY 16 /* 16x16*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#endif
/* SAML21 Family ********************************************************************/
/* FEATURE SAM L21J SAM L21G SAM L21E
* ------------------- ------------------ ------------------ --------
* No. of pins 64 48 32
* Flash 256/128/64KB 256/128/64KB 256/128/64/32KB
* Flash RWW 8/4/2KB 8/4/2KB 8/4/2/1KB
* SRAM 32/16/8KB 32/16/8KB 32/16/8/4KB
* Max. Freq. 48MHz 48MHz 48MHz
* Event channels 12 12 12
* Timer/counters 5 3 3
* TC output channels 2 2 2
* T/C Control 3 3 3
* TCC output channels 2 2 2
* TCC waveform output 8/4/2 8/4/2 6/4/2
* DMA channels 16 16 16
* USB interface 1 1 1
* AES engine 1 1 1
* CCLs 4 4 4
* TRNG 1 1 1
* SERCOM 6 6 4
* ADC channels 20 14 10
* Comparators 2 2 2
* DAC channels 2 2 2
* OPAMP 3 3 3
* RTC Yes Yes Yes
* RTC alarms 1 1 1
* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
* External interrupts 16 16 16
* PTC X an Y 12x16 8x12 6x10
* 16x12 12x8 10x6
* Packages QFN/TQFP QFN/TQFP QFN/TQFP
* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC16M, DFLL48M, and FDPLL96M
* SW Debug interface Yes Yes Yes
* Watchdog timer Yes Yes Yes
*/
#if defined(CONFIG_ARCH_CHIP_SAML21E15)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (32*1024) /* 32KB */
# define SAMDL_FLASHRWW_SIZE (1*1024) /* 1KB */
# define SAMDL_SRAM0_SIZE (4*1024) /* 4KB */
# define SAMDL_LPRAM_SIZE (2*1024) /* 2KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E16)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (4*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E17)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21E18)
# define SAML21 1 /* SAML21 family */
# define SAML21E 1 /* SAML21E */
# undef SAML21G
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 6 /* 6 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (4*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21G18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# define SAML21G 1 /* SAML21G */
# undef SAML21J
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 8 /* 8 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J16)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (64*1024) /* 64KB */
# define SAMDL_FLASHRWW_SIZE (2*1024) /* 2KB */
# define SAMDL_SRAM0_SIZE (8*1024) /* 8KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 4KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 2 /* 2 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J17)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (128*1024) /* 128KB */
# define SAMDL_FLASHRWW_SIZE (4*1024) /* 4KB */
# define SAMDL_SRAM0_SIZE (16*1024) /* 16KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 4 /* 4 TCC waveform outputs */
#elif defined(CONFIG_ARCH_CHIP_SAML21J18)
# define SAML21 1 /* SAML21 family */
# undef SAML21E
# undef SAML21G
# define SAML21J 1 /* SAML21J */
/* Internal memory */
# define SAMDL_FLASH_SIZE (256*1024) /* 256KB */
# define SAMDL_FLASHRWW_SIZE (8*1024) /* 8KB */
# define SAMDL_SRAM0_SIZE (32*1024) /* 32KB */
# define SAMDL_LPRAM_SIZE (8*1024) /* 8KB */
/* TCC waveform outputs */
# define SAMDL_TCC_NWAVEFORMS 8 /* 8 TCC waveform outputs */
#else
# undef SAML21 /* Not SAML21 family */
# undef SAML21E
# undef SAML21G
# undef SAML21J
#endif
#if defined(SAML21E)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMACHAN 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 4 /* 4 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 10 /* 10 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 10 /* PTC X 6 or 10 */
# define SAMDL_NPTCY 10 /* PTC Y 6 or 10*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAML21G)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 3 /* 3 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMACHAN 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 14 /* 14 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 12 /* PTC X 8 or 12 */
# define SAMDL_NPTCY 12 /* PTC Y 8 or 12*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#elif defined(SAML21J)
# define SAMDL_NEVENTS 12 /* 12 event channels */
# define SAMDL_NTC 5 /* 5 Timer/counters */
# define SAMDL_NTCOUT 2 /* 2 TC output channels */
# define SAMDL_NTCC 3 /* 3 TC control channels */
# define SAMDL_NTCCOUT 2 /* 2 TCC output channels */
# define SAMDL_NDMACHAN 16 /* 16 DMA channels */
# define SAMDL_NUSBIF 1 /* 1 USB interface */
# define SAMDL_NAES 1 /* 1 AES engine */
# define SAMDL_NCCL 4 /* 4 Counfigurable Custom Logic */
# define SAMDL_NTRNG 1 /* 1 True random number generator */
# define SAMDL_NSERCOM 6 /* 6 SERCOM */
# define SAMDL_NI2S 0 /* No I2S */
# define SAMDL_NADC 20 /* 20 ADC channels */
# define SAMDL_NCMP 2 /* 2 Comparators */
# define SAMDL_NDAC 2 /* 2 DAC channels */
# define SAMCL_NOPAMP 3 /* 3 OpAmps */
# define SAMDL_RTC 1 /* Have RTC */
# define SAMDL_NALARMS 1 /* 1 RTC alarm */
# define SAMDL_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
# define SAMDL_NEXTINT 16 /* 16 External interrupts */
# define SAMDL_NPTCX 16 /* PTC X 12 or 16 */
# define SAMDL_NPTCY 16 /* PTC Y 12 or 16*/
# define SAMDL_WDT 1 /* Have watchdog timer */
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-3. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_SAMDL_CHIP_H */

View File

@ -360,9 +360,9 @@ endchoice
config ARCH_FAMILY_SAMD20
bool
default n
select SAMDL_HAVE_TC2
select SAMDL_HAVE_TC3
select SAMDL_HAVE_TC5
select SAMD2L2_HAVE_TC2
select SAMD2L2_HAVE_TC3
select SAMD2L2_HAVE_TC5
config ARCH_FAMILY_SAMD20E
bool
@ -371,22 +371,22 @@ config ARCH_FAMILY_SAMD20E
config ARCH_FAMILY_SAMD20G
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
config ARCH_FAMILY_SAMD20J
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMDL_HAVE_TC6
select SAMDL_HAVE_TC7
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
select SAMD2L2_HAVE_TC6
select SAMD2L2_HAVE_TC7
config ARCH_FAMILY_SAMD21
bool
default n
select SAMDL_HAVE_DMAC
select SAMDL_HAVE_USB
select SAMD2L2_HAVE_DMAC
select SAMD2L2_HAVE_USB
config ARCH_FAMILY_SAMD21E
bool
@ -395,23 +395,23 @@ config ARCH_FAMILY_SAMD21E
config ARCH_FAMILY_SAMD21G
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
config ARCH_FAMILY_SAMD21J
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMDL_HAVE_TC2
select SAMDL_HAVE_TC3
select SAMDL_HAVE_TC5
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
select SAMD2L2_HAVE_TC2
select SAMD2L2_HAVE_TC3
select SAMD2L2_HAVE_TC5
config ARCH_FAMILY_SAML21
bool
default n
select SAMDL_HAVE_DMAC
select SAMDL_HAVE_USB
select SAMD2L2_HAVE_DMAC
select SAMD2L2_HAVE_USB
config ARCH_FAMILY_SAML21E
bool
@ -420,163 +420,163 @@ config ARCH_FAMILY_SAML21E
config ARCH_FAMILY_SAML21G
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
config ARCH_FAMILY_SAML21J
bool
default n
select SAMDL_HAVE_SERCOM4
select SAMDL_HAVE_SERCOM5
select SAMDL_HAVE_TC2
select SAMDL_HAVE_TC3
select SAMDL_HAVE_TC5
select SAMD2L2_HAVE_SERCOM4
select SAMD2L2_HAVE_SERCOM5
select SAMD2L2_HAVE_TC2
select SAMD2L2_HAVE_TC3
select SAMD2L2_HAVE_TC5
menu "SAMD/L Peripheral Support"
config SAMDL_HAVE_DMAC
config SAMD2L2_HAVE_DMAC
bool
default n
config SAMDL_HAVE_SERCOM4
config SAMD2L2_HAVE_SERCOM4
bool
default n
config SAMDL_HAVE_SERCOM5
config SAMD2L2_HAVE_SERCOM5
bool
default n
config SAMDL_HAVE_TC5
config SAMD2L2_HAVE_TC5
bool
default n
config SAMDL_HAVE_TC2
config SAMD2L2_HAVE_TC2
bool
default n
config SAMDL_HAVE_TC3
config SAMD2L2_HAVE_TC3
bool
default n
config SAMDL_HAVE_TC6
config SAMD2L2_HAVE_TC6
bool
default n
config SAMDL_HAVE_TC7
config SAMD2L2_HAVE_TC7
bool
default n
config SAMDL_HAVE_USB
config SAMD2L2_HAVE_USB
bool
default n
config SAMDL_AC
config SAMD2L2_AC
bool "Analog Comparator"
default n
config SAMDL_ADC
config SAMD2L2_ADC
bool "Analog-to-Digital Converter"
default n
config SAMDL_DAC
config SAMD2L2_DAC
bool "Digital-to-Analog Converter"
default n
config SAMDL_DMAC
config SAMD2L2_DMAC
bool "DMA Controller"
default n
select ARCH_DMA
depends on SAMDL_HAVE_DMAC && EXPERIMENTAL
depends on SAMD2L2_HAVE_DMAC && EXPERIMENTAL
config SAMDL_EVSYS
config SAMD2L2_EVSYS
bool "Event System"
default n
config SAMDL_NVMCTRL
config SAMD2L2_NVMCTRL
bool "Non-Volatile Memory Controller"
default n
config SAMDL_PTC
config SAMD2L2_PTC
bool "Peripheral Touch Controller"
default n
config SAMDL_RTC
config SAMD2L2_RTC
bool "Real Time Counter"
default n
config SAMDL_SERCOM0
config SAMD2L2_SERCOM0
bool "Serial Communication Interface 0"
default n
config SAMDL_SERCOM1
config SAMD2L2_SERCOM1
bool "Serial Communication Interface 1"
default n
config SAMDL_SERCOM2
config SAMD2L2_SERCOM2
bool "Serial Communication Interface 2"
default n
config SAMDL_SERCOM3
config SAMD2L2_SERCOM3
bool "Serial Communication Interface 3"
default n
config SAMDL_SERCOM4
config SAMD2L2_SERCOM4
bool "Serial Communication Interface 4"
default n
depends on SAMDL_HAVE_SERCOM4
depends on SAMD2L2_HAVE_SERCOM4
config SAMDL_SERCOM5
config SAMD2L2_SERCOM5
bool "Serial Communication Interface 5"
default n
depends on SAMDL_HAVE_SERCOM5
depends on SAMD2L2_HAVE_SERCOM5
config SAMDL_TC0
config SAMD2L2_TC0
bool "Timer/Counter 0"
default n
config SAMDL_TC1
config SAMD2L2_TC1
bool "Timer/Counter 1"
default n
config SAMDL_TC2
config SAMD2L2_TC2
bool "Timer/Counter 2"
default n
depends on SAMDL_HAVE_TC2
depends on SAMD2L2_HAVE_TC2
config SAMDL_TC3
config SAMD2L2_TC3
bool "Timer/Counter 3"
default n
depends on SAMDL_HAVE_TC3
depends on SAMD2L2_HAVE_TC3
config SAMDL_TC4
config SAMD2L2_TC4
bool "Timer/Counter 4"
default n
config SAMDL_TC5
config SAMD2L2_TC5
bool "Timer/Counter 5"
default n
depends on SAMDL_HAVE_TC5
depends on SAMD2L2_HAVE_TC5
config SAMDL_TC6
config SAMD2L2_TC6
bool "Timer/Counter 6"
default n
depends on SAMDL_HAVE_TC6
depends on SAMD2L2_HAVE_TC6
config SAMDL_TC7
config SAMD2L2_TC7
bool "Timer/Counter 7"
default n
depends on SAMDL_HAVE_TC7
depends on SAMD2L2_HAVE_TC7
config SAMDL_USB
config SAMD2L2_USB
bool "USB"
default n
depends on SAMDL_HAVE_USB
depends on SAMD2L2_HAVE_USB
config SAMDL_EIC
config SAMD2L2_EIC
bool "External Interrupt Controller"
default n
config SAMDL_WDT
config SAMD2L2_WDT
bool "Watchdog Timer"
default n
@ -584,28 +584,28 @@ endmenu
choice
prompt "SERCOM0 mode"
default SAMDL_SERCOM0_ISUSART
depends on SAMDL_SERCOM0
default SAMD2L2_SERCOM0_ISUSART
depends on SAMD2L2_SERCOM0
config SAMDL_SERCOM0_ISI2C
config SAMD2L2_SERCOM0_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM0_ISSPI
config SAMD2L2_SERCOM0_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM0_ISUSART
config SAMD2L2_SERCOM0_ISUSART
bool "USART"
select USART0_SERIALDRIVER
endchoice
config SAMDL_DMAC_NDESC
config SAMD2L2_DMAC_NDESC
int "Number of additional DMA Descriptors"
default 0
depends on SAMDL_DMAC
depends on SAMD2L2_DMAC
---help---
This provides the number of additional DMA descriptors that can be
use to support multi-linked DMA transfers. A minimum of 16
@ -618,19 +618,19 @@ config SAMDL_DMAC_NDESC
choice
prompt "SERCOM1 mode"
default SAMDL_SERCOM1_ISUSART
depends on SAMDL_SERCOM1
default SAMD2L2_SERCOM1_ISUSART
depends on SAMD2L2_SERCOM1
config SAMDL_SERCOM1_ISI2C
config SAMD2L2_SERCOM1_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM1_ISSPI
config SAMD2L2_SERCOM1_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM1_ISUSART
config SAMD2L2_SERCOM1_ISUSART
bool "USART"
select USART1_SERIALDRIVER
@ -638,19 +638,19 @@ endchoice
choice
prompt "SERCOM2 mode"
default SAMDL_SERCOM2_ISUSART
depends on SAMDL_SERCOM2
default SAMD2L2_SERCOM2_ISUSART
depends on SAMD2L2_SERCOM2
config SAMDL_SERCOM2_ISI2C
config SAMD2L2_SERCOM2_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM2_ISSPI
config SAMD2L2_SERCOM2_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM2_ISUSART
config SAMD2L2_SERCOM2_ISUSART
bool "USART"
select USART2_SERIALDRIVER
@ -658,19 +658,19 @@ endchoice
choice
prompt "SERCOM3 mode"
default SAMDL_SERCOM3_ISUSART
depends on SAMDL_SERCOM3
default SAMD2L2_SERCOM3_ISUSART
depends on SAMD2L2_SERCOM3
config SAMDL_SERCOM3_ISI2C
config SAMD2L2_SERCOM3_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM3_ISSPI
config SAMD2L2_SERCOM3_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM3_ISUSART
config SAMD2L2_SERCOM3_ISUSART
bool "USART"
select USART3_SERIALDRIVER
@ -678,19 +678,19 @@ endchoice
choice
prompt "SERCOM4 mode"
default SAMDL_SERCOM4_ISUSART
depends on SAMDL_SERCOM4
default SAMD2L2_SERCOM4_ISUSART
depends on SAMD2L2_SERCOM4
config SAMDL_SERCOM4_ISI2C
config SAMD2L2_SERCOM4_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM4_ISSPI
config SAMD2L2_SERCOM4_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM4_ISUSART
config SAMD2L2_SERCOM4_ISUSART
bool "USART"
select USART4_SERIALDRIVER
@ -698,39 +698,39 @@ endchoice
choice
prompt "SERCOM5 mode"
default SAMDL_SERCOM5_ISUSART
depends on SAMDL_SERCOM5
default SAMD2L2_SERCOM5_ISUSART
depends on SAMD2L2_SERCOM5
config SAMDL_SERCOM5_ISI2C
config SAMD2L2_SERCOM5_ISI2C
bool "I2C"
select I2C
select SAMDL_HAVE_I2C
select SAMD2L2_HAVE_I2C
config SAMDL_SERCOM5_ISSPI
config SAMD2L2_SERCOM5_ISSPI
bool "SPI"
select SAMDL_HAVE_SPI
select SAMD2L2_HAVE_SPI
config SAMDL_SERCOM5_ISUSART
config SAMD2L2_SERCOM5_ISUSART
bool "USART"
select USART5_SERIALDRIVER
endchoice
config SAMDL_HAVE_SPI
config SAMD2L2_HAVE_SPI
bool
select SPI
menu "SPI options"
depends on SAMDL_HAVE_SPI
depends on SAMD2L2_HAVE_SPI
config SAMDL_SPI_DMA
config SAMD2L2_SPI_DMA
bool "SPI DMA"
default n
depends on SAMDL_DMAC && EXPERIMENTAL
depends on SAMD2L2_DMAC && EXPERIMENTAL
---help---
Use DMA for SPI SERCOM peripherals.
config SAMDL_SPI_REGDEBUG
config SAMD2L2_SPI_REGDEBUG
bool "SPI register-Level Debug"
default n
depends on DEBUG_SPI_INFO
@ -739,14 +739,14 @@ config SAMDL_SPI_REGDEBUG
endmenu # SPI options
config SAMDL_HAVE_I2C
config SAMD2L2_HAVE_I2C
bool
select I2C
menu "I2C options"
depends on SAMDL_HAVE_I2C
depends on SAMD2L2_HAVE_I2C
config SAMDL_I2C_REGDEBUG
config SAMD2L2_I2C_REGDEBUG
bool "I2C register-Level Debug"
default n
depends on DEBUG_I2C_INFO
@ -756,9 +756,9 @@ config SAMDL_I2C_REGDEBUG
endmenu # I2C options
menu "USB options"
depends on SAMDL_HAVE_USB
depends on SAMD2L2_HAVE_USB
config SAMDL_USB_ENABLE_PPEP
config SAMD2L2_USB_ENABLE_PPEP
bool "Enable Ping-Pong Endpoints"
default n
---help---
@ -768,7 +768,7 @@ config SAMDL_USB_ENABLE_PPEP
then read/write one data buffer while the USB module writes/reads from
the other buffer. This gives double buffered communication.
config SAMDL_USB_REGDEBUG
config SAMD2L2_USB_REGDEBUG
bool "USB register-Level Debug"
default n
depends on DEBUG_USB_INFO

View File

@ -1,5 +1,5 @@
############################################################################
# arch/arm/src/samdl/Make.defs
# arch/arm/src/samd2l2/Make.defs
#
# Copyright (C) 2014-2015, 2017-2018 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
@ -93,26 +93,26 @@ ifeq ($(CONFIG_ARCH_IRQPRIO),y)
CHIP_CSRCS += sam_irqprio.c
endif
ifeq ($(CONFIG_SAMDL_DMAC),y)
ifeq ($(CONFIG_SAMD2L2_DMAC),y)
CHIP_CSRCS += sam_dmac.c
endif
ifeq ($(CONFIG_SAMDL_HAVE_SPI),y)
ifeq ($(CONFIG_SAMD2L2_HAVE_SPI),y)
CHIP_CSRCS += sam_spi.c
endif
ifeq ($(CONFIG_SAMDL_HAVE_I2C),y)
ifeq ($(CONFIG_SAMD2L2_HAVE_I2C),y)
CHIP_CSRCS += sam_i2c_master.c
endif
ifeq ($(CONFIG_SAMDL_USB),y)
ifeq ($(CONFIG_SAMD2L2_USB),y)
CHIP_CSRCS += sam_usb.c
endif
ifeq ($(CONFIG_SAMDL_EIC),y)
ifeq ($(CONFIG_SAMD2L2_EIC),y)
CHIP_CSRCS += sam_eic.c
endif
ifeq ($(CONFIG_SAMDL_AC),y)
ifeq ($(CONFIG_SAMD2L2_AC),y)
CHIP_CSRCS += sam_ac.c
endif

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/chip.h
* arch/arm/src/samd2l2/chip.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_H
/************************************************************************************
* Included Files
@ -44,7 +44,7 @@
/* Include the chip capabilities file */
#include <arch/samdl/chip.h>
#include <arch/samd2l2/chip.h>
/* Define the number of interrupt vectors that need to be supported for this chip */
@ -80,4 +80,4 @@
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd20_memorymap.h
* arch/arm/src/samd2l2/chip/samd20_memorymap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_MEMORYMAP_H
/********************************************************************************************
* Included Files
@ -122,4 +122,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_MEMORYMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd20_pinmap.h
* arch/arm/src/samd2l2/chip/samd20_pinmap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_PINMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_PINMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_PINMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_PINMAP_H
/********************************************************************************************
* Included Files
@ -362,4 +362,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD20_PINMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD20_PINMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd21_memorymap.h
* arch/arm/src/samd2l2/chip/samd21_memorymap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_MEMORYMAP_H
/********************************************************************************************
* Included Files
@ -127,4 +127,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_MEMORYMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd21_pinmap.h
* arch/arm/src/samd2l2/chip/samd21_pinmap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_PINMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_PINMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_PINMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_PINMAP_H
/********************************************************************************************
* Included Files
@ -413,4 +413,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD21_PINMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD21_PINMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_ac.h
* arch/arm/src/samd2l2/chip/samd_ac.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_AC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_AC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_AC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_AC_H
/********************************************************************************************
* Included Files
@ -206,4 +206,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_AC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_AC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_dac.h
* arch/arm/src/samd2l2/chip/saml_dac.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DAC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DAC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DAC_H
/********************************************************************************************
* Included Files
@ -133,4 +133,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DAC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DAC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_dmac.h
* arch/arm/src/samd2l2/chip/samd_dmac.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -38,8 +38,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DMAC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DMAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DMAC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DMAC_H
/********************************************************************************************
* Included Files
@ -396,4 +396,4 @@ struct dma_desc_s
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_DMAC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_DMAC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_eic.h
* arch/arm/src/samd2l2/chip/samd_eic.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EIC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EIC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EIC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EIC_H
/********************************************************************************************
* Included Files
@ -187,4 +187,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EIC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EIC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_evsys.h
* arch/arm/src/samd2l2/chip/samd_evsys.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EVSYS_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EVSYS_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EVSYS_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EVSYS_H
/********************************************************************************************
* Included Files
@ -353,4 +353,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_EVSYS_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_EVSYS_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_fuses.h
* arch/arm/src/samd2l2/chip/samd_fuses.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -44,8 +44,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_FUSES_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_FUSES_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_FUSES_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_FUSES_H
/********************************************************************************************
* Included Files
@ -295,4 +295,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_FUSES_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_FUSES_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_gclk.h
* arch/arm/src/samd2l2/chip/samd_gclk.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_GCLK_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_GCLK_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_GCLK_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_GCLK_H
/********************************************************************************************
* Included Files
@ -256,4 +256,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_GCLK_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_GCLK_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_i2c_master.h
* arch/arm/src/samd2l2/chip/samd_i2c_master.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_MASTER_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_MASTER_H
/********************************************************************************************
* Included Files
@ -338,4 +338,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_MASTER_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_MASTER_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_i2c_slave.h
* arch/arm/src/samd2l2/chip/samd_i2c_slave.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_SLAVE_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_SLAVE_H
/********************************************************************************************
* Included Files
@ -300,4 +300,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2C_SLAVE_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2C_SLAVE_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_i2s.h
* arch/arm/src/samd2l2/chip/samd_i2s.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -36,8 +36,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2S_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2S_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2S_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2S_H
/********************************************************************************************
* Included Files
@ -200,4 +200,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_I2S_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_I2S_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_nvmctrl.h
* arch/arm/src/samd2l2/chip/samd_nvmctrl.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_NVMCTRL_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_NVMCTRL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_NVMCTRL_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_NVMCTRL_H
/********************************************************************************************
* Included Files
@ -184,4 +184,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_NVMCTRL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_NVMCTRL_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_pm.h
* arch/arm/src/samd2l2/chip/samd_pm.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PM_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PM_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PM_H
/********************************************************************************************
* Included Files
@ -261,4 +261,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PM_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_port.h
* arch/arm/src/samd2l2/chip/samd_port.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PORT_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PORT_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PORT_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PORT_H
/********************************************************************************************
* Included Files
@ -331,4 +331,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_PORT_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_PORT_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_sercom.h
* arch/arm/src/samd2l2/chip/samd_sercom.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SERCOM_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SERCOM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SERCOM_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SERCOM_H
/********************************************************************************************
* Included Files
@ -96,4 +96,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SERCOM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SERCOM_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_spi.h
* arch/arm/src/samd2l2/chip/samd_spi.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SPI_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SPI_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SPI_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SPI_H
/********************************************************************************************
* Included Files
@ -303,4 +303,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SPI_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SPI_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_sysctrl.h
* arch/arm/src/samd2l2/chip/samd_sysctrl.h
*
* Copyright (C) 2014, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SYSCTRL_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SYSCTRL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SYSCTRL_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SYSCTRL_H
/********************************************************************************************
* Included Files
@ -432,4 +432,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_SYSCTRL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_SYSCTRL_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_tc.h
* arch/arm/src/samd2l2/chip/samd_tc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -36,8 +36,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TC_H
/********************************************************************************************
* Included Files
@ -251,4 +251,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_tcc.h
* arch/arm/src/samd2l2/chip/samd_tcc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -36,8 +36,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TCC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TCC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TCC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TCC_H
/********************************************************************************************
* Included Files
@ -460,4 +460,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_TCC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_TCC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_usart.h
* arch/arm/src/samd2l2/chip/samd_usart.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,8 +39,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_USART_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_USART_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_USART_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_USART_H
/********************************************************************************************
* Included Files
@ -391,4 +391,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAMD_USART_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAMD_USART_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd_wdt.h
* arch/arm/src/samd2l2/chip/samd_wdt.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAM_WDT_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAM_WDT_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAM_WDT_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAM_WDT_H
/********************************************************************************************
* Included Files
@ -159,4 +159,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAMD20 || CONFIG_ARCH_FAMILY_SAMD21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAM_WDT_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAM_WDT_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml21_memorymap.h
* arch/arm/src/samd2l2/chip/saml21_memorymap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_MEMORYMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_MEMORYMAP_H
/********************************************************************************************
* Included Files
@ -139,4 +139,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_MEMORYMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/samd20_pinmap.h
* arch/arm/src/samd2l2/chip/samd20_pinmap.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_PINMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_PINMAP_H
/********************************************************************************************
* Included Files
@ -466,4 +466,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML21_PINMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML21_PINMAP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_aes.h
* arch/arm/src/samd2l2/chip/saml_aes.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_AES_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_AES_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_AES_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_AES_H
/********************************************************************************************
* Included Files
@ -208,4 +208,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_AES_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_AES_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_dac.h
* arch/arm/src/samd2l2/chip/saml_dac.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DAC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DAC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DAC_H
/********************************************************************************************
* Included Files
@ -176,4 +176,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DAC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DAC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_dmac.h
* arch/arm/src/samd2l2/chip/saml_dmac.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DMAC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DMAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DMAC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DMAC_H
/********************************************************************************************
* Included Files
@ -386,4 +386,4 @@ struct dma_desc_s
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_DMAC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_DMAC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_eic.h
* arch/arm/src/samd2l2/chip/saml_eic.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EIC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EIC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EIC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EIC_H
/********************************************************************************************
* Included Files
@ -204,4 +204,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EIC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EIC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_evsys.h
* arch/arm/src/samd2l2/chip/saml_evsys.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EVSYS_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EVSYS_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EVSYS_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EVSYS_H
/********************************************************************************************
* Included Files
@ -259,4 +259,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_EVSYS_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_EVSYS_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/sam_fuses.h
* arch/arm/src/samd2l2/chip/sam_fuses.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_FUSES_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_FUSES_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_FUSES_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_FUSES_H
/********************************************************************************************
* Included Files
@ -203,4 +203,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_FUSES_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_FUSES_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_gclk.h
* arch/arm/src/samd2l2/chip/saml_gclk.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_GCLK_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_GCLK_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_GCLK_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_GCLK_H
/********************************************************************************************
* Included Files
@ -191,4 +191,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_GCLK_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_GCLK_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_i2c_master.h
* arch/arm/src/samd2l2/chip/saml_i2c_master.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_MASTER_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_MASTER_H
/********************************************************************************************
* Included Files
@ -272,4 +272,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_MASTER_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_MASTER_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_i2c_slave.h
* arch/arm/src/samd2l2/chip/saml_i2c_slave.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_SLAVE_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_SLAVE_H
/********************************************************************************************
* Included Files
@ -206,4 +206,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_I2C_SLAVE_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_I2C_SLAVE_H */

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/chip/saml_mclk.h
* arch/arm/src/samd2l2/chip/saml_mclk.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_MCLK_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_MCLK_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_MCLK_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_MCLK_H
/************************************************************************************
* Included Files
@ -213,4 +213,4 @@
************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_MCLK_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_MCLK_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_nvmctrl.h
* arch/arm/src/samd2l2/chip/saml_nvmctrl.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_NVMCTRL_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_NVMCTRL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_NVMCTRL_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_NVMCTRL_H
/********************************************************************************************
* Included Files
@ -173,4 +173,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_NVMCTRL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_NVMCTRL_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_opamp.h
* arch/arm/src/samd2l2/chip/saml_opamp.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OPAMP_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OPAMP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OPAMP_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OPAMP_H
/********************************************************************************************
* Included Files
@ -150,4 +150,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OPAMP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OPAMP_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_osc32kctrl.h
* arch/arm/src/samd2l2/chip/saml_osc32kctrl.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSC32KCTRL_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSC32KCTRL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSC32KCTRL_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSC32KCTRL_H
/********************************************************************************************
* Included Files
@ -161,4 +161,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSC32KCTRL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSC32KCTRL_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_oscctrl.h
* arch/arm/src/samd2l2/chip/saml_oscctrl.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSCCTRL_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSCCTRL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSCCTRL_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSCCTRL_H
/********************************************************************************************
* Included Files
@ -302,4 +302,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_OSCCTRL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_OSCCTRL_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/src/samdl/chip/saml_pm.h
* arch/arm/src/samd2l2/chip/saml_pm.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PM_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PM_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PM_H
/****************************************************************************************************
* Included Files
@ -147,4 +147,4 @@
****************************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PM_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_port.h
* arch/arm/src/samd2l2/chip/saml_port.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PORT_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PORT_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PORT_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PORT_H
/********************************************************************************************
* Included Files
@ -451,4 +451,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_PORT_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_PORT_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_rstc.h
* arch/arm/src/samd2l2/chip/saml_rstc.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_RSTC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_RSTC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_RSTC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_RSTC_H
/********************************************************************************************
* Included Files
@ -142,4 +142,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_RSTC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_RSTC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_sercom.h
* arch/arm/src/samd2l2/chip/saml_sercom.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SERCOM_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SERCOM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SERCOM_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SERCOM_H
/********************************************************************************************
* Included Files
@ -64,4 +64,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SERCOM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SERCOM_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_spi.h
* arch/arm/src/samd2l2/chip/saml_spi.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SPI_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SPI_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SPI_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SPI_H
/********************************************************************************************
* Included Files
@ -248,4 +248,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SPI_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SPI_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_supc.h
* arch/arm/src/samd2l2/chip/saml_supc.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SUPC_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SUPC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SUPC_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SUPC_H
/********************************************************************************************
* Included Files
@ -260,4 +260,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_SUPC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_SUPC_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_trng.h
* arch/arm/src/samd2l2/chip/saml_trng.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_TRNG_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_TRNG_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_TRNG_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_TRNG_H
/********************************************************************************************
* Included Files
@ -99,4 +99,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_TRNG_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_TRNG_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_usart.h
* arch/arm/src/samd2l2/chip/saml_usart.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USART_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USART_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USART_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USART_H
/********************************************************************************************
* Included Files
@ -276,4 +276,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USART_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USART_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_usb.h
* arch/arm/src/samd2l2/chip/saml_usb.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -38,8 +38,8 @@
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USB_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USB_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USB_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USB_H
/********************************************************************************************
* Included Files
@ -633,4 +633,4 @@ struct usbhost_pipedesc_s
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_USB_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_USB_H */

View File

@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/samdl/chip/saml_wdt.h
* arch/arm/src/samd2l2/chip/saml_wdt.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -37,8 +37,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_CHIP_SAML_WDT_H
#define __ARCH_ARM_SRC_SAMDL_CHIP_SAML_WDT_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_WDT_H
#define __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_WDT_H
/********************************************************************************************
* Included Files
@ -162,4 +162,4 @@
********************************************************************************************/
#endif /* CONFIG_ARCH_FAMILY_SAML21 */
#endif /* __ARCH_ARM_SRC_SAMDL_CHIP_SAML_WDT_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_CHIP_SAML_WDT_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_ac.c
* arch/arm/src/samd2l2/sam_ac.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_ac.h
* arch/arm/src/samd2l2/sam_ac.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_AC_H
#define __ARCH_ARM_SRC_SAMDL_SAM_AC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_AC_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_AC_H
/****************************************************************************
* Included Files
@ -78,4 +78,4 @@ extern "C"
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_AC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_AC_H */

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_clockconfig.h
* arch/arm/src/samd2l2/sam_clockconfig.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_CLOCKCONFIG_H
#define __ARCH_ARM_SRC_SAMDL_SAM_CLOCKCONFIG_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_CLOCKCONFIG_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_CLOCKCONFIG_H
/************************************************************************************
* Included Files
@ -90,4 +90,4 @@ void sam_clockconfig(void);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_CLOCKCONFIG_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_CLOCKCONFIG_H */

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_config.h
* arch/arm/src/samd2l2/sam_config.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,82 +33,82 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_CONFIG_H
#define __ARCH_ARM_SRC_SAMDL_SAM_CONFIG_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_CONFIG_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_CONFIG_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <arch/samdl/chip.h>
#include <arch/samd2l2/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* How many SERCOM peripherals are configured as USART peripherals? */
#define SAMDL_HAVE_USART0 1
#define SAMDL_HAVE_USART1 1
#define SAMDL_HAVE_USART2 1
#define SAMDL_HAVE_USART3 1
#define SAMDL_HAVE_USART4 1
#define SAMDL_HAVE_USART5 1
#define SAMD2L2_HAVE_USART0 1
#define SAMD2L2_HAVE_USART1 1
#define SAMD2L2_HAVE_USART2 1
#define SAMD2L2_HAVE_USART3 1
#define SAMD2L2_HAVE_USART4 1
#define SAMD2L2_HAVE_USART5 1
#if !defined(CONFIG_SAMDL_SERCOM0) || !defined(CONFIG_SAMDL_SERCOM0_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM0) || !defined(CONFIG_SAMD2L2_SERCOM0_ISUSART) || \
!defined(CONFIG_USART0_SERIALDRIVER)
# undef SAMDL_HAVE_USART0
# undef CONFIG_SAMDL_SERCOM0_ISUSART
# undef SAMD2L2_HAVE_USART0
# undef CONFIG_SAMD2L2_SERCOM0_ISUSART
# undef CONFIG_USART0_SERIAL_CONSOLE
# undef CONFIG_USART0_FLOWCONTROL
# undef CONFIG_USART0_IRDAMODE
# undef CONFIG_USART0_RS485MODE
#endif
#if !defined(CONFIG_SAMDL_SERCOM1) || !defined(CONFIG_SAMDL_SERCOM1_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM1) || !defined(CONFIG_SAMD2L2_SERCOM1_ISUSART) || \
!defined(CONFIG_USART1_SERIALDRIVER)
# undef SAMDL_HAVE_USART1
# undef CONFIG_SAMDL_SERCOM1_ISUSART
# undef SAMD2L2_HAVE_USART1
# undef CONFIG_SAMD2L2_SERCOM1_ISUSART
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART1_FLOWCONTROL
# undef CONFIG_USART1_IRDAMODE
# undef CONFIG_USART1_RS485MODE
#endif
#if !defined(CONFIG_SAMDL_SERCOM2) || !defined(CONFIG_SAMDL_SERCOM2_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM2) || !defined(CONFIG_SAMD2L2_SERCOM2_ISUSART) || \
!defined(CONFIG_USART2_SERIALDRIVER)
# undef SAMDL_HAVE_USART2
# undef CONFIG_SAMDL_SERCOM2_ISUSART
# undef SAMD2L2_HAVE_USART2
# undef CONFIG_SAMD2L2_SERCOM2_ISUSART
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART2_FLOWCONTROL
# undef CONFIG_USART2_IRDAMODE
# undef CONFIG_USART2_RS485MODE
#endif
#if !defined(CONFIG_SAMDL_SERCOM3) || !defined(CONFIG_SAMDL_SERCOM3_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM3) || !defined(CONFIG_SAMD2L2_SERCOM3_ISUSART) || \
!defined(CONFIG_USART3_SERIALDRIVER)
# undef SAMDL_HAVE_USART3
# undef CONFIG_SAMDL_SERCOM3_ISUSART
# undef SAMD2L2_HAVE_USART3
# undef CONFIG_SAMD2L2_SERCOM3_ISUSART
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART3_FLOWCONTROL
# undef CONFIG_USART3_IRDAMODE
# undef CONFIG_USART3_RS485MODE
#endif
#if !defined(CONFIG_SAMDL_SERCOM4) || !defined(CONFIG_SAMDL_SERCOM4_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM4) || !defined(CONFIG_SAMD2L2_SERCOM4_ISUSART) || \
!defined(CONFIG_USART4_SERIALDRIVER)
# undef SAMDL_HAVE_USART4
# undef CONFIG_SAMDL_SERCOM4_ISUSART
# undef SAMD2L2_HAVE_USART4
# undef CONFIG_SAMD2L2_SERCOM4_ISUSART
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART4_FLOWCONTROL
# undef CONFIG_USART4_IRDAMODE
# undef CONFIG_USART4_RS485MODE
#endif
#if !defined(CONFIG_SAMDL_SERCOM5) || !defined(CONFIG_SAMDL_SERCOM5_ISUSART) || \
#if !defined(CONFIG_SAMD2L2_SERCOM5) || !defined(CONFIG_SAMD2L2_SERCOM5_ISUSART) || \
!defined(CONFIG_USART5_SERIALDRIVER)
# undef SAMDL_HAVE_USART5
# undef CONFIG_SAMDL_SERCOM5_ISUSART
# undef SAMD2L2_HAVE_USART5
# undef CONFIG_SAMD2L2_SERCOM5_ISUSART
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_USART5_FLOWCONTROL
# undef CONFIG_USART5_IRDAMODE
@ -117,11 +117,11 @@
/* Are any USARTs enabled? */
#undef SAMDL_HAVE_USART
#if defined(SAMDL_HAVE_USART0) || defined(SAMDL_HAVE_USART1) || \
defined(SAMDL_HAVE_USART2) || defined(SAMDL_HAVE_USART3) || \
defined(SAMDL_HAVE_USART4) || defined(SAMDL_HAVE_USART5)
# define SAMDL_HAVE_USART 1
#undef SAMD2L2_HAVE_USART
#if defined(SAMD2L2_HAVE_USART0) || defined(SAMD2L2_HAVE_USART1) || \
defined(SAMD2L2_HAVE_USART2) || defined(SAMD2L2_HAVE_USART3) || \
defined(SAMD2L2_HAVE_USART4) || defined(SAMD2L2_HAVE_USART5)
# define SAMD2L2_HAVE_USART 1
#endif
/* Is there a serial console? There should be at most one defined. It could be on
@ -182,98 +182,98 @@
/* Are any SERCOM peripherals are configured as SPI peripherals? */
#define SAMDL_HAVE_SPI0 1
#define SAMDL_HAVE_SPI1 1
#define SAMDL_HAVE_SPI2 1
#define SAMDL_HAVE_SPI3 1
#define SAMDL_HAVE_SPI4 1
#define SAMDL_HAVE_SPI5 1
#define SAMD2L2_HAVE_SPI0 1
#define SAMD2L2_HAVE_SPI1 1
#define SAMD2L2_HAVE_SPI2 1
#define SAMD2L2_HAVE_SPI3 1
#define SAMD2L2_HAVE_SPI4 1
#define SAMD2L2_HAVE_SPI5 1
#if !defined(CONFIG_SAMDL_SERCOM0) || !defined(CONFIG_SAMDL_SERCOM0_ISSPI)
# undef SAMDL_HAVE_SPI0
# undef CONFIG_SAMDL_SERCOM0_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM0) || !defined(CONFIG_SAMD2L2_SERCOM0_ISSPI)
# undef SAMD2L2_HAVE_SPI0
# undef CONFIG_SAMD2L2_SERCOM0_ISSPI
#endif
#if !defined(CONFIG_SAMDL_SERCOM1) || !defined(CONFIG_SAMDL_SERCOM1_ISSPI)
# undef SAMDL_HAVE_SPI1
# undef CONFIG_SAMDL_SERCOM1_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM1) || !defined(CONFIG_SAMD2L2_SERCOM1_ISSPI)
# undef SAMD2L2_HAVE_SPI1
# undef CONFIG_SAMD2L2_SERCOM1_ISSPI
#endif
#if !defined(CONFIG_SAMDL_SERCOM2) || !defined(CONFIG_SAMDL_SERCOM2_ISSPI)
# undef SAMDL_HAVE_SPI2
# undef CONFIG_SAMDL_SERCOM2_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM2) || !defined(CONFIG_SAMD2L2_SERCOM2_ISSPI)
# undef SAMD2L2_HAVE_SPI2
# undef CONFIG_SAMD2L2_SERCOM2_ISSPI
#endif
#if !defined(CONFIG_SAMDL_SERCOM3) || !defined(CONFIG_SAMDL_SERCOM3_ISSPI)
# undef SAMDL_HAVE_SPI3
# undef CONFIG_SAMDL_SERCOM3_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM3) || !defined(CONFIG_SAMD2L2_SERCOM3_ISSPI)
# undef SAMD2L2_HAVE_SPI3
# undef CONFIG_SAMD2L2_SERCOM3_ISSPI
#endif
#if !defined(CONFIG_SAMDL_SERCOM4) || !defined(CONFIG_SAMDL_SERCOM4_ISSPI)
# undef SAMDL_HAVE_SPI4
# undef CONFIG_SAMDL_SERCOM4_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM4) || !defined(CONFIG_SAMD2L2_SERCOM4_ISSPI)
# undef SAMD2L2_HAVE_SPI4
# undef CONFIG_SAMD2L2_SERCOM4_ISSPI
#endif
#if !defined(CONFIG_SAMDL_SERCOM5) || !defined(CONFIG_SAMDL_SERCOM5_ISSPI)
# undef SAMDL_HAVE_SPI5
# undef CONFIG_SAMDL_SERCOM5_ISSPI
#if !defined(CONFIG_SAMD2L2_SERCOM5) || !defined(CONFIG_SAMD2L2_SERCOM5_ISSPI)
# undef SAMD2L2_HAVE_SPI5
# undef CONFIG_SAMD2L2_SERCOM5_ISSPI
#endif
/* Are any SERCOMs configured for SPI? */
#undef SAMDL_HAVE_SPI
#if defined(SAMDL_HAVE_SPI0) || defined(SAMDL_HAVE_SPI1) || \
defined(SAMDL_HAVE_SPI2) || defined(SAMDL_HAVE_SPI3) || \
defined(SAMDL_HAVE_SPI4) || defined(SAMDL_HAVE_SPI5)
# define SAMDL_HAVE_SPI 1
#undef SAMD2L2_HAVE_SPI
#if defined(SAMD2L2_HAVE_SPI0) || defined(SAMD2L2_HAVE_SPI1) || \
defined(SAMD2L2_HAVE_SPI2) || defined(SAMD2L2_HAVE_SPI3) || \
defined(SAMD2L2_HAVE_SPI4) || defined(SAMD2L2_HAVE_SPI5)
# define SAMD2L2_HAVE_SPI 1
#endif
/* Are any SERCOM peripherals are configured as I2C peripherals? */
#define SAMDL_HAVE_I2C0 1
#define SAMDL_HAVE_I2C1 1
#define SAMDL_HAVE_I2C2 1
#define SAMDL_HAVE_I2C3 1
#define SAMDL_HAVE_I2C4 1
#define SAMDL_HAVE_I2C5 1
#define SAMD2L2_HAVE_I2C0 1
#define SAMD2L2_HAVE_I2C1 1
#define SAMD2L2_HAVE_I2C2 1
#define SAMD2L2_HAVE_I2C3 1
#define SAMD2L2_HAVE_I2C4 1
#define SAMD2L2_HAVE_I2C5 1
#if !defined(CONFIG_SAMDL_SERCOM0) || !defined(CONFIG_SAMDL_SERCOM0_ISI2C)
# undef SAMDL_HAVE_I2C0
# undef CONFIG_SAMDL_SERCOM0_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM0) || !defined(CONFIG_SAMD2L2_SERCOM0_ISI2C)
# undef SAMD2L2_HAVE_I2C0
# undef CONFIG_SAMD2L2_SERCOM0_ISI2C
#endif
#if !defined(CONFIG_SAMDL_SERCOM1) || !defined(CONFIG_SAMDL_SERCOM1_ISI2C)
# undef SAMDL_HAVE_I2C1
# undef CONFIG_SAMDL_SERCOM1_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM1) || !defined(CONFIG_SAMD2L2_SERCOM1_ISI2C)
# undef SAMD2L2_HAVE_I2C1
# undef CONFIG_SAMD2L2_SERCOM1_ISI2C
#endif
#if !defined(CONFIG_SAMDL_SERCOM2) || !defined(CONFIG_SAMDL_SERCOM2_ISI2C)
# undef SAMDL_HAVE_I2C2
# undef CONFIG_SAMDL_SERCOM2_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM2) || !defined(CONFIG_SAMD2L2_SERCOM2_ISI2C)
# undef SAMD2L2_HAVE_I2C2
# undef CONFIG_SAMD2L2_SERCOM2_ISI2C
#endif
#if !defined(CONFIG_SAMDL_SERCOM3) || !defined(CONFIG_SAMDL_SERCOM3_ISI2C)
# undef SAMDL_HAVE_I2C3
# undef CONFIG_SAMDL_SERCOM3_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM3) || !defined(CONFIG_SAMD2L2_SERCOM3_ISI2C)
# undef SAMD2L2_HAVE_I2C3
# undef CONFIG_SAMD2L2_SERCOM3_ISI2C
#endif
#if !defined(CONFIG_SAMDL_SERCOM4) || !defined(CONFIG_SAMDL_SERCOM4_ISI2C)
# undef SAMDL_HAVE_I2C4
# undef CONFIG_SAMDL_SERCOM4_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM4) || !defined(CONFIG_SAMD2L2_SERCOM4_ISI2C)
# undef SAMD2L2_HAVE_I2C4
# undef CONFIG_SAMD2L2_SERCOM4_ISI2C
#endif
#if !defined(CONFIG_SAMDL_SERCOM5) || !defined(CONFIG_SAMDL_SERCOM5_ISI2C)
# undef SAMDL_HAVE_I2C5
# undef CONFIG_SAMDL_SERCOM5_ISI2C
#if !defined(CONFIG_SAMD2L2_SERCOM5) || !defined(CONFIG_SAMD2L2_SERCOM5_ISI2C)
# undef SAMD2L2_HAVE_I2C5
# undef CONFIG_SAMD2L2_SERCOM5_ISI2C
#endif
/* Are any SERCOMs configured for I2C? */
#undef SAMDL_HAVE_I2C
#if defined(SAMDL_HAVE_I2C0) || defined(SAMDL_HAVE_I2C1) || \
defined(SAMDL_HAVE_I2C2) || defined(SAMDL_HAVE_I2C3) || \
defined(SAMDL_HAVE_I2C4) || defined(SAMDL_HAVE_I2C5)
# define SAMDL_HAVE_I2C 1
#undef SAMD2L2_HAVE_I2C
#if defined(SAMD2L2_HAVE_I2C0) || defined(SAMD2L2_HAVE_I2C1) || \
defined(SAMD2L2_HAVE_I2C2) || defined(SAMD2L2_HAVE_I2C3) || \
defined(SAMD2L2_HAVE_I2C4) || defined(SAMD2L2_HAVE_I2C5)
# define SAMD2L2_HAVE_I2C 1
#endif
/************************************************************************************
@ -288,4 +288,4 @@
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_CONFIG_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_CONFIG_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_dac.h
* arch/arm/src/samd2l2/sam_dac.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_DAC_H
#define __ARCH_ARM_SRC_SAMDL_SAM_DAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_DAC_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_DAC_H
/****************************************************************************
* Included Files
@ -74,4 +74,4 @@ extern "C"
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_DAC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_DAC_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_dmac.c
* arch/arm/src/samd2l2/sam_dmac.c
*
* Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -63,18 +63,18 @@
/* Configuration ************************************************************/
/* Condition out the whole file unless DMA is selected in the configuration */
#ifdef CONFIG_SAMDL_DMAC
#ifdef CONFIG_SAMD2L2_DMAC
/* If SAMD/L support is enabled, then OS DMA support should also be enabled */
#ifndef CONFIG_ARCH_DMA
# warning "SAMDL DMA enabled but CONFIG_ARCH_DMA disabled"
# warning "SAMD2L2 DMA enabled but CONFIG_ARCH_DMA disabled"
#endif
/* Number of additional DMA descriptors in LPRAM */
#ifndef CONFIG_SAMDL_DMAC_NDESC
# define CONFIG_SAMDL_DMAC_NDESC 0
#ifndef CONFIG_SAMD2L2_DMAC_NDESC
# define CONFIG_SAMD2L2_DMAC_NDESC 0
#endif
/****************************************************************************
@ -100,7 +100,7 @@ struct sam_dmach_s
uint32_t dc_flags; /* DMA channel flags */
dma_callback_t dc_callback; /* Callback invoked when the DMA completes */
void *dc_arg; /* Argument passed to callback function */
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
struct dma_desc_s *dc_head; /* First allocated DMA descriptor */
struct dma_desc_s *dc_tail; /* DMA descriptor list tail */
#endif
@ -112,7 +112,7 @@ struct sam_dmach_s
static void sam_takechsem(void);
static inline void sam_givechsem(void);
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
static void sam_takedsem(void);
static inline void sam_givedsem(void);
#endif
@ -137,13 +137,13 @@ static int sam_rxbuffer(struct sam_dmach_s *dmach, uint32_t paddr,
/* These semaphores protect the DMA channel and descriptor tables */
static sem_t g_chsem;
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
static sem_t g_dsem;
#endif
/* This array describes the state of each DMA channel */
static struct sam_dmach_s g_dmach[SAMDL_NDMACHAN];
static struct sam_dmach_s g_dmach[SAMD2L2_NDMACHAN];
/* NOTE: Using the same address as the base descriptors for writeback descriptors
* causes TERR and FERR interrupts to be raised immediately after starting DMA.
@ -153,17 +153,17 @@ static struct sam_dmach_s g_dmach[SAMDL_NDMACHAN];
* - Matt Thompson
*/
static struct dma_desc_s g_base_desc[SAMDL_NDMACHAN]
static struct dma_desc_s g_base_desc[SAMD2L2_NDMACHAN]
__attribute__ ((section(".lpram"), aligned(16)));
static struct dma_desc_s g_writeback_desc[SAMDL_NDMACHAN]
static struct dma_desc_s g_writeback_desc[SAMD2L2_NDMACHAN]
__attribute__ ((section(".lpram"), aligned(16)));
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
/* Additional DMA descriptors for (optional) multi-block transfer support.
* Also positioned in LPRAM.
*/
static struct dma_desc_s g_dma_desc[CONFIG_SAMDL_DMAC_NDESC]
static struct dma_desc_s g_dma_desc[CONFIG_SAMD2L2_DMAC_NDESC]
__attribute__ ((section(".lpram"), aligned(16)));
#endif
@ -211,7 +211,7 @@ static inline void sam_givechsem(void)
*
****************************************************************************/
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
static void sam_takedsem(void)
{
int ret;
@ -404,7 +404,7 @@ static struct dma_desc_s *sam_alloc_desc(struct sam_dmach_s *dmach)
desc->srcaddr = (uint32_t)-1; /* Any non-zero value */
return desc;
}
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
else
{
int i;
@ -422,7 +422,7 @@ static struct dma_desc_s *sam_alloc_desc(struct sam_dmach_s *dmach)
* because that is an atomic operation.
*/
for (i = 0; i < CONFIG_SAMDL_DMAC_NDESC; i++)
for (i = 0; i < CONFIG_SAMD2L2_DMAC_NDESC; i++)
{
desc = &g_dma_desc[i];
if (desc->srcaddr == 0)
@ -494,7 +494,7 @@ static struct dma_desc_s *sam_append_desc(struct sam_dmach_s *dmach,
/* And then hook it at the tail of the descriptor list */
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
if (dmach->dc_tail != NULL)
{
struct dma_desc_s *prev;
@ -513,7 +513,7 @@ static struct dma_desc_s *sam_append_desc(struct sam_dmach_s *dmach,
DEBUGASSERT(desc == &g_base_desc[dmach->dc_chan]);
}
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
/* In either case, this is the new tail of the list. */
dmach->dc_tail = desc;
@ -540,14 +540,14 @@ static struct dma_desc_s *sam_append_desc(struct sam_dmach_s *dmach,
static void sam_free_desc(struct sam_dmach_s *dmach)
{
struct dma_desc_s *desc;
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
struct dma_desc_s *next;
#endif
/* Get the base descriptor pointer */
desc = &g_base_desc[dmach->dc_chan];
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
next = dmach->dc_head;
dmach->dc_head = NULL;
@ -558,7 +558,7 @@ static void sam_free_desc(struct sam_dmach_s *dmach)
memset(desc, 0, sizeof(struct dma_desc_s));
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
/* Reset each additional descriptor in the descriptor list (thereby
* freeing them)
*/
@ -808,13 +808,13 @@ void weak_function up_dmainitialize(void)
/* Initialize global semaphores */
nxsem_init(&g_chsem, 0, 1);
#if CONFIG_SAMDL_DMAC_NDESC > 0
nxsem_init(&g_dsem, 0, CONFIG_SAMDL_DMAC_NDESC);
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
nxsem_init(&g_dsem, 0, CONFIG_SAMD2L2_DMAC_NDESC);
#endif
/* Initialized the DMA channel table */
for (i = 0; i < SAMDL_NDMACHAN; i++)
for (i = 0; i < SAMD2L2_NDMACHAN; i++)
{
g_dmach[i].dc_chan = i;
}
@ -823,10 +823,10 @@ void weak_function up_dmainitialize(void)
* not in .bss).
*/
memset(g_base_desc, 0, sizeof(struct dma_desc_s)*SAMDL_NDMACHAN);
memset(g_writeback_desc, 0, sizeof(struct dma_desc_s)*SAMDL_NDMACHAN);
#if CONFIG_SAMDL_DMAC_NDESC > 0
memset(g_dma_desc, 0, sizeof(struct dma_desc_s)*CONFIG_SAMDL_DMAC_NDESC);
memset(g_base_desc, 0, sizeof(struct dma_desc_s)*SAMD2L2_NDMACHAN);
memset(g_writeback_desc, 0, sizeof(struct dma_desc_s)*SAMD2L2_NDMACHAN);
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
memset(g_dma_desc, 0, sizeof(struct dma_desc_s)*CONFIG_SAMD2L2_DMAC_NDESC);
#endif
/* Enable peripheral clock */
@ -889,7 +889,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
dmach = NULL;
sam_takechsem();
for (chndx = 0; chndx < SAMDL_NDMACHAN; chndx++)
for (chndx = 0; chndx < SAMD2L2_NDMACHAN; chndx++)
{
struct sam_dmach_s *candidate = &g_dmach[chndx];
if (!candidate->dc_inuse)
@ -1002,7 +1002,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
#endif
@ -1076,7 +1076,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
#if CONFIG_SAMDL_DMAC_NDESC > 0
#if CONFIG_SAMD2L2_DMAC_NDESC > 0
dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
#endif
@ -1149,7 +1149,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
int ret = -EINVAL;
dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
DEBUGASSERT(dmach != NULL && dmach->dc_chan < SAMDL_NDMACHAN);
DEBUGASSERT(dmach != NULL && dmach->dc_chan < SAMD2L2_NDMACHAN);
head = &g_base_desc[dmach->dc_chan];
/* Verify that the DMA has been setup (i.e., at least one entry in the
@ -1363,4 +1363,4 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
regs->chstatus);
}
#endif /* CONFIG_DEBUG_DMA_INFO */
#endif /* CONFIG_SAMDL_DMAC */
#endif /* CONFIG_SAMD2L2_DMAC */

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_dmac.h
* arch/arm/src/samd2l2/sam_dmac.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_DMAC_H
#define __ARCH_ARM_SRC_SAMDL_SAM_DMAC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_DMAC_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_DMAC_H
/************************************************************************************
* Included Files
@ -48,7 +48,7 @@
#include "chip/sam_dmac.h"
#ifdef CONFIG_SAMDL_DMAC
#ifdef CONFIG_SAMD2L2_DMAC
#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
# include "chip/samd_dmac.h"
@ -342,5 +342,5 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_SAMDL_DMAC */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_DMAC_H */
#endif /* CONFIG_SAMD2L2_DMAC */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_DMAC_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_eic.c
* arch/arm/src/samd2l2/sam_eic.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_eic.h
* arch/arm/src/samd2l2/sam_eic.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_EIC_H
#define __ARCH_ARM_SRC_SAMDL_SAM_EIC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_EIC_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_EIC_H
/****************************************************************************
* Included Files
@ -122,4 +122,4 @@ int sam_eic_config(uint8_t eirq, port_pinset_t pinset);
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_EIC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_EIC_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_evsys.h
* arch/arm/src/samd2l2/sam_evsys.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Matt Thompson <matt@extent3d.com>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_EVSYS_H
#define __ARCH_ARM_SRC_SAMDL_SAM_EVSYS_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_EVSYS_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_EVSYS_H
/****************************************************************************
* Included Files
@ -73,4 +73,4 @@ extern "C"
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_EVSYS_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_EVSYS_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_fuses.h
* arch/arm/src/samd2l2/sam_fuses.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_FUSES_H
#define __ARCH_ARM_SRC_SAMDL_SAM_FUSES_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_FUSES_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_FUSES_H
/****************************************************************************
* Included Files
@ -88,4 +88,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_FUSES_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_FUSES_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_gclk.h
* arch/arm/src/samd2l2/sam_gclk.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_GCLK_H
#define __ARCH_ARM_SRC_SAMDL_SAM_GCLK_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_GCLK_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_GCLK_H
/****************************************************************************
* Included Files
@ -156,4 +156,4 @@ void sam_gclk_chan_disable(uint8_t channel);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_GCLK_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_GCLK_H */

View File

@ -1,5 +1,5 @@
/*******************************************************************************
* arch/arm/src/samdl/sam_i2c_master.c
* arch/arm/src/samd2l2/sam_i2c_master.c
*
* Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 Filament - www.filament.com
@ -76,9 +76,9 @@
#include "sam_sercom.h"
#include "sam_i2c_master.h"
#if defined(SAMDL_HAVE_I2C0) || defined(SAMDL_HAVE_I2C1) || \
defined(SAMDL_HAVE_I2C2) || defined(SAMDL_HAVE_I2C3) || \
defined(SAMDL_HAVE_I2C4) || defined(SAMDL_HAVE_I2C5)
#if defined(SAMD2L2_HAVE_I2C0) || defined(SAMD2L2_HAVE_I2C1) || \
defined(SAMD2L2_HAVE_I2C2) || defined(SAMD2L2_HAVE_I2C3) || \
defined(SAMD2L2_HAVE_I2C4) || defined(SAMD2L2_HAVE_I2C5)
/*******************************************************************************
* Pre-processor Definitions
@ -246,7 +246,7 @@ static void i2c_pad_configure(struct sam_i2c_dev_s *priv);
* Private Data
*******************************************************************************/
#ifdef SAMDL_HAVE_I2C0
#ifdef SAMD2L2_HAVE_I2C0
static const struct i2c_attr_s g_i2c0attr =
{
.i2c = 0,
@ -263,7 +263,7 @@ static const struct i2c_attr_s g_i2c0attr =
static struct sam_i2c_dev_s g_i2c0;
#endif
#ifdef SAMDL_HAVE_I2C1
#ifdef SAMD2L2_HAVE_I2C1
static const struct i2c_attr_s g_i2c1attr =
{
.i2c = 1,
@ -281,7 +281,7 @@ static const struct i2c_attr_s g_i2c1attr =
static struct sam_i2c_dev_s g_i2c1;
#endif
#ifdef SAMDL_HAVE_I2C2
#ifdef SAMD2L2_HAVE_I2C2
static const struct i2c_attr_s g_i2c2attr =
{
.i2c = 2,
@ -299,7 +299,7 @@ static const struct i2c_attr_s g_i2c2attr =
static struct sam_i2c_dev_s g_i2c2;
#endif
#ifdef SAMDL_HAVE_I2C3
#ifdef SAMD2L2_HAVE_I2C3
static const struct i2c_attr_s g_i2c3attr =
{
.i2c = 3,
@ -317,7 +317,7 @@ static const struct i2c_attr_s g_i2c3attr =
static struct sam_i2c_dev_s g_i2c3;
#endif
#ifdef SAMDL_HAVE_I2C4
#ifdef SAMD2L2_HAVE_I2C4
static const struct i2c_attr_s g_i2c4attr =
{
.i2c = 4,
@ -335,7 +335,7 @@ static const struct i2c_attr_s g_i2c4attr =
static struct sam_i2c_dev_s g_i2c4;
#endif
#ifdef SAMDL_HAVE_I2C5
#ifdef SAMD2L2_HAVE_I2C5
static const struct i2c_attr_s g_i2c5attr =
{
.i2c = 5,
@ -1243,7 +1243,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
irqstate_t flags;
int ret = 0;
#ifdef SAMDL_HAVE_I2C0
#ifdef SAMD2L2_HAVE_I2C0
if (bus == 0)
{
/* Select up I2C0 and setup invariant attributes */
@ -1257,7 +1257,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
}
else
#endif
#ifdef SAMDL_HAVE_I2C1
#ifdef SAMD2L2_HAVE_I2C1
if (bus == 1)
{
/* Select up I2C1 and setup invariant attributes */
@ -1271,7 +1271,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
}
else
#endif
#ifdef SAMDL_HAVE_I2C2
#ifdef SAMD2L2_HAVE_I2C2
if (bus == 2)
{
/* Select up I2C2 and setup invariant attributes */
@ -1285,7 +1285,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
}
else
#endif
#ifdef SAMDL_HAVE_I2C3
#ifdef SAMD2L2_HAVE_I2C3
if (bus == 3)
{
/* Select up I2C3 and setup invariant attributes */
@ -1299,7 +1299,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
}
else
#endif
#ifdef SAMDL_HAVE_I2C4
#ifdef SAMD2L2_HAVE_I2C4
if (bus == 4)
{
/* Select up I2C4 and setup invariant attributes */
@ -1313,7 +1313,7 @@ struct i2c_master_s *sam_i2c_master_initialize(int bus)
}
else
#endif
#ifdef SAMDL_HAVE_I2C5
#ifdef SAMD2L2_HAVE_I2C5
if (bus == 5)
{
/* Select up I2C5 and setup invariant attributes */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_i2c_master.h
* arch/arm/src/samd2l2/sam_i2c_master.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMDL_SAM_I2C_MASTER_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_MASTER_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_MASTER_H
/****************************************************************************
* Included Files
@ -86,4 +86,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_I2C_MASTER_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_MASTER_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_i2c_slave.h
* arch/arm/src/samd2l2/sam_i2c_slave.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMDL_SAM_I2C_SLAVE_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_SLAVE_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_SLAVE_H
/****************************************************************************
* Included Files
@ -86,4 +86,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_I2C_SLAVE_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_I2C_SLAVE_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_idle.c
* arch/arm/src/samd2l2/sam_idle.c
*
* Copyright (C) 2014, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_irq.c
* arch/arm/src/samd2l2/sam_irq.c
*
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_irq.h
* arch/arm/src/samd2l2/sam_irq.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_IRQ_H
#define __ARCH_ARM_SRC_SAMDL_SAM_IRQ_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_IRQ_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_IRQ_H
/************************************************************************************
* Included Files
@ -60,4 +60,4 @@ void sam_dumpnvic(const char *msg, int irq);
# define sam_dumpnvic(msg, irq)
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_IRQ_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_IRQ_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_irqprio.c
* arch/arm/src/samd2l2/sam_irqprio.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_lowputc.c
* arch/arm/src/samd2l2/sam_lowputc.c
*
* Copyright (C) 2014-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -88,7 +88,7 @@
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
static void
sam_wait_synchronization(const struct sam_usart_config_s * const config)
{
@ -104,7 +104,7 @@ sam_wait_synchronization(const struct sam_usart_config_s * const config)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
static inline int
sam_usart_configure(const struct sam_usart_config_s * const config)
{
@ -255,7 +255,7 @@ sam_usart_configure(const struct sam_usart_config_s * const config)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
static inline void
sam_pad_configure(const struct sam_usart_config_s * const config)
{
@ -293,7 +293,7 @@ sam_pad_configure(const struct sam_usart_config_s * const config)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
int sam_usart_internal(const struct sam_usart_config_s * const config)
{
#ifdef CONFIG_ARCH_FAMILY_SAML21
@ -347,7 +347,7 @@ int sam_usart_internal(const struct sam_usart_config_s * const config)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
static inline void
sam_usart_enable(const struct sam_usart_config_s * const config)
{
@ -400,7 +400,7 @@ void sam_lowsetup(void)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
int sam_usart_initialize(const struct sam_usart_config_s * const config)
{
irqstate_t flags;
@ -430,7 +430,7 @@ int sam_usart_initialize(const struct sam_usart_config_s * const config)
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
void sam_usart_reset(const struct sam_usart_config_s * const config)
{
uintptr_t regaddr = config->base + SAM_USART_CTRLA_OFFSET;

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_lowputc.h
* arch/arm/src/samd2l2/sam_lowputc.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_LOWPUTC_H
#define __ARCH_ARM_SRC_SAMDL_SAM_LOWPUTC_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_LOWPUTC_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_LOWPUTC_H
/****************************************************************************
* Included Files
@ -91,7 +91,7 @@ void sam_lowsetup(void);
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
struct sam_usart_config_s;
int sam_usart_initialize(const struct sam_usart_config_s * const config);
#endif
@ -105,7 +105,7 @@ int sam_usart_initialize(const struct sam_usart_config_s * const config);
*
****************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
struct sam_usart_config_s;
void sam_usart_reset(const struct sam_usart_config_s * const config);
#endif
@ -127,4 +127,4 @@ void sam_lowputc(uint32_t ch);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_LOWPUTC_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_LOWPUTC_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_periphclks.h
* arch/arm/src/samd2l2/sam_periphclks.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_PERIPHCLKS_H
#define __ARCH_ARM_SRC_SAMDL_SAM_PERIPHCLKS_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_PERIPHCLKS_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_PERIPHCLKS_H
/****************************************************************************
* Included Files
@ -86,4 +86,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_PERIPHCLKS_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_PERIPHCLKS_H */

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_pinmap.h
* arch/arm/src/samd2l2/sam_pinmap.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_PINMAP_H
#define __ARCH_ARM_SRC_SAMDL_SAM_PINMAP_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_PINMAP_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_PINMAP_H
/************************************************************************************
* Included Files
@ -52,4 +52,4 @@
# error Unrecognized SAMD/L architecture
#endif
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_PINMAP_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_PINMAP_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_pm.h
* arch/arm/src/samd2l2/sam_pm.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_PM_H
#define __ARCH_ARM_SRC_SAMDL_SAM_PM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_PM_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_PM_H
/****************************************************************************
* Included Files
@ -86,4 +86,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_PM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_PM_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_port.c
* arch/arm/src/samd2l2/sam_port.c
*
* Copyright (C) 2014-2016, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -190,7 +190,7 @@ static inline void sam_configinput(uintptr_t base, port_pinset_t pinset)
static inline void sam_configinterrupt(uintptr_t base, port_pinset_t pinset)
{
#ifdef CONFIG_SAMDL_EIC
#ifdef CONFIG_SAMD2L2_EIC
uint32_t func;
uint32_t regval;
int pin;
@ -213,7 +213,7 @@ static inline void sam_configinterrupt(uintptr_t base, port_pinset_t pinset)
#ifdef CONFIG_DEBUG_GPIO_INFO
sam_dumpport(pinset, "extint");
#endif
#endif /* CONFIG_SAMDL_EIC */
#endif /* CONFIG_SAMD2L2_EIC */
}
/****************************************************************************

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_port.h
* arch/arm/src/samd2l2/sam_port.h
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_PORT_H
#define __ARCH_ARM_SRC_SAMDL_SAM_PORT_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_PORT_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_PORT_H
/****************************************************************************
* Included Files
@ -391,4 +391,4 @@ int sam_dumpport(port_pinset_t pinset, const char *msg);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_PORT_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_PORT_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_sercom.c
* arch/arm/src/samd2l2/sam_sercom.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -62,9 +62,9 @@
****************************************************************************/
#undef HAVE_SERCOM0_4
#if defined(CONFIG_SAMDL_SERCOM0) || defined(CONFIG_SAMDL_SERCOM1) || \
defined(CONFIG_SAMDL_SERCOM2) || defined(CONFIG_SAMDL_SERCOM3) || \
defined(CONFIG_SAMDL_SERCOM4)
#if defined(CONFIG_SAMD2L2_SERCOM0) || defined(CONFIG_SAMD2L2_SERCOM1) || \
defined(CONFIG_SAMD2L2_SERCOM2) || defined(CONFIG_SAMD2L2_SERCOM3) || \
defined(CONFIG_SAMD2L2_SERCOM4)
# define HAVE_SERCOM0_4
#endif
@ -151,14 +151,14 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
#ifdef HAVE_SERCOM0_4
static bool configured = false;
#endif
#ifdef CONFIG_SAMDL_SERCOM5
#ifdef CONFIG_SAMD2L2_SERCOM5
static bool configured5 = false;
#endif
#ifdef CONFIG_DEBUG_ASSERTIONS
#ifdef HAVE_SERCOM0_4
static uint8_t slowgen04 = 0xff;
#endif
#ifdef CONFIG_SAMDL_SERCOM5
#ifdef CONFIG_SAMD2L2_SERCOM5
static uint8_t slowgen5 = 0xff;
#endif
#endif
@ -171,19 +171,19 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
switch (sercom)
{
#ifdef HAVE_SERCOM0_4
#ifdef CONFIG_SAMDL_SERCOM0
#ifdef CONFIG_SAMD2L2_SERCOM0
case 0:
#endif
#ifdef CONFIG_SAMDL_SERCOM1
#ifdef CONFIG_SAMD2L2_SERCOM1
case 1:
#endif
#ifdef CONFIG_SAMDL_SERCOM2
#ifdef CONFIG_SAMD2L2_SERCOM2
case 2:
#endif
#ifdef CONFIG_SAMDL_SERCOM3
#ifdef CONFIG_SAMD2L2_SERCOM3
case 3:
#endif
#ifdef CONFIG_SAMDL_SERCOM4
#ifdef CONFIG_SAMD2L2_SERCOM4
case 4:
#endif
if (!configured)
@ -215,7 +215,7 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
break;
#endif /* HAVE_SERCOM0_4 */
#ifdef CONFIG_SAMDL_SERCOM5
#ifdef CONFIG_SAMD2L2_SERCOM5
case 5:
if (!configured5)
{
@ -244,7 +244,7 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
}
#endif
break;
#endif /* CONFIG_SAMDL_SERCOM5 */
#endif /* CONFIG_SAMD2L2_SERCOM5 */
/* Unsupported or invalid SERCOM number provided */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_sercom.h
* arch/arm/src/samd2l2/sam_sercom.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_SERCOM_H
#define __ARCH_ARM_SRC_SAMDL_SAM_SERCOM_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_SERCOM_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_SERCOM_H
/****************************************************************************
* Included Files
@ -96,7 +96,7 @@ extern "C"
static inline void sercom_enable(int sercom)
{
#ifdef SAMDL_HAVE_SERCOM5
#ifdef SAMD2L2_HAVE_SERCOM5
/* SERCOM5 is a special case */
if (sercom == 5)
@ -155,4 +155,4 @@ void sercom_slowclk_configure(int sercom, int gclkgen);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_SERCOM_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_SERCOM_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_serial.c
* arch/arm/src/samd2l2/sam_serial.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -64,7 +64,7 @@
#include "sam_lowputc.h"
#include "sam_serial.h"
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
/****************************************************************************
* Pre-processor Definitions
@ -104,22 +104,22 @@
# define TTYS0_DEV g_usart5port /* USART5 is ttyS0 */
#else
# undef CONSOLE_DEV /* No console */
# if defined(SAMDL_HAVE_USART0)
# if defined(SAMD2L2_HAVE_USART0)
# define TTYS0_DEV g_usart0port /* USART0 is ttyS0 */
# define USART0_ASSIGNED 1
# elif defined(SAMDL_HAVE_USART1)
# elif defined(SAMD2L2_HAVE_USART1)
# define TTYS0_DEV g_usart1port /* USART1 is ttyS0 */
# define USART1_ASSIGNED 1
# elif defined(SAMDL_HAVE_USART2)
# elif defined(SAMD2L2_HAVE_USART2)
# define TTYS0_DEV g_usart2port /* USART2 is ttyS0 */
# define USART2_ASSIGNED 1
# elif defined(SAMDL_HAVE_USART3)
# elif defined(SAMD2L2_HAVE_USART3)
# define TTYS0_DEV g_usart3port /* USART3 is ttyS0 */
# define USART3_ASSIGNED 1
# elif defined(SAMDL_HAVE_USART4)
# elif defined(SAMD2L2_HAVE_USART4)
# define TTYS0_DEV g_usart4port /* USART4 is ttyS0 */
# define USART4_ASSIGNED 1
# elif defined(SAMDL_HAVE_USART5)
# elif defined(SAMD2L2_HAVE_USART5)
# define TTYS0_DEV g_usart5port /* USART5 is ttyS0 */
# define USART5_ASSIGNED 1
# endif
@ -127,22 +127,22 @@
/* Pick ttys1. This could be any of USART0-5 excluding the console USART. */
#if defined(SAMDL_HAVE_USART0) && !defined(USART0_ASSIGNED)
#if defined(SAMD2L2_HAVE_USART0) && !defined(USART0_ASSIGNED)
# define TTYS1_DEV g_usart0port /* USART0 is ttyS1 */
# define USART0_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART1) && !defined(USART1_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART1) && !defined(USART1_ASSIGNED)
# define TTYS1_DEV g_usart1port /* USART1 is ttyS1 */
# define USART1_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART2) && !defined(USART2_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART2) && !defined(USART2_ASSIGNED)
# define TTYS1_DEV g_usart2port /* USART2 is ttyS1 */
# define USART2_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART3) && !defined(USART3_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART3) && !defined(USART3_ASSIGNED)
# define TTYS1_DEV g_usart3port /* USART3 is ttyS1 */
# define USART3_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART4) && !defined(USART4_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART4) && !defined(USART4_ASSIGNED)
# define TTYS1_DEV g_usart4port /* USART4 is ttyS1 */
# define USART4_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART5) && !defined(USART5_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART5) && !defined(USART5_ASSIGNED)
# define TTYS1_DEV g_usart5port /* USART5 is ttyS1 */
# define USART5_ASSIGNED 1
#endif
@ -152,19 +152,19 @@
* could also be the console.
*/
#if defined(SAMDL_HAVE_USART1) && !defined(USART1_ASSIGNED)
#if defined(SAMD2L2_HAVE_USART1) && !defined(USART1_ASSIGNED)
# define TTYS2_DEV g_usart1port /* USART1 is ttyS2 */
# define USART1_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART2) && !defined(USART2_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART2) && !defined(USART2_ASSIGNED)
# define TTYS2_DEV g_usart2port /* USART2 is ttyS2 */
# define USART2_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART3) && !defined(USART3_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART3) && !defined(USART3_ASSIGNED)
# define TTYS2_DEV g_usart3port /* USART3 is ttyS2 */
# define USART3_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART4) && !defined(USART4_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART4) && !defined(USART4_ASSIGNED)
# define TTYS2_DEV g_usart4port /* USART4 is ttyS2 */
# define USART4_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART5) && !defined(USART5_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART5) && !defined(USART5_ASSIGNED)
# define TTYS2_DEV g_usart5port /* USART5 is ttyS2 */
# define USART5_ASSIGNED 1
#endif
@ -174,16 +174,16 @@
* USART2-5 could also be the console.
*/
#if defined(SAMDL_HAVE_USART2) && !defined(USART2_ASSIGNED)
#if defined(SAMD2L2_HAVE_USART2) && !defined(USART2_ASSIGNED)
# define TTYS3_DEV g_usart2port /* USART2 is ttyS3 */
# define USART2_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART3) && !defined(USART3_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART3) && !defined(USART3_ASSIGNED)
# define TTYS3_DEV g_usart3port /* USART3 is ttyS3 */
# define USART3_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART4) && !defined(USART4_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART4) && !defined(USART4_ASSIGNED)
# define TTYS3_DEV g_usart4port /* USART4 is ttyS3 */
# define USART4_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART5) && !defined(USART5_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART5) && !defined(USART5_ASSIGNED)
# define TTYS3_DEV g_usart5port /* USART5 is ttyS3 */
# define USART5_ASSIGNED 1
#endif
@ -193,13 +193,13 @@
* USART3-5 could also be the console.
*/
#if defined(SAMDL_HAVE_USART3) && !defined(USART3_ASSIGNED)
#if defined(SAMD2L2_HAVE_USART3) && !defined(USART3_ASSIGNED)
# define TTYS4_DEV g_usart3port /* USART3 is ttyS4 */
# define USART3_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART4) && !defined(USART4_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART4) && !defined(USART4_ASSIGNED)
# define TTYS4_DEV g_usart4port /* USART4 is ttyS4 */
# define USART4_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART5) && !defined(USART5_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART5) && !defined(USART5_ASSIGNED)
# define TTYS4_DEV g_usart5port /* USART5 is ttyS4 */
# define USART5_ASSIGNED 1
#endif
@ -209,10 +209,10 @@
* One of USART4-5 could also be the console.
*/
#if defined(SAMDL_HAVE_USART4) && !defined(USART4_ASSIGNED)
#if defined(SAMD2L2_HAVE_USART4) && !defined(USART4_ASSIGNED)
# define TTYS5_DEV g_usart4port /* USART4 is ttyS5 */
# define USART4_ASSIGNED 1
#elif defined(SAMDL_HAVE_USART5) && !defined(USART5_ASSIGNED)
#elif defined(SAMD2L2_HAVE_USART5) && !defined(USART5_ASSIGNED)
# define TTYS5_DEV g_usart5port /* USART5 is ttyS5 */
# define USART5_ASSIGNED 1
#endif
@ -288,34 +288,34 @@ static const struct uart_ops_s g_uart_ops =
/* I/O buffers */
#ifdef SAMDL_HAVE_USART0
#ifdef SAMD2L2_HAVE_USART0
static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE];
#endif
#ifdef SAMDL_HAVE_USART1
#ifdef SAMD2L2_HAVE_USART1
static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
#endif
#ifdef SAMDL_HAVE_USART2
#ifdef SAMD2L2_HAVE_USART2
static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
#endif
#ifdef SAMDL_HAVE_USART3
#ifdef SAMD2L2_HAVE_USART3
static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
#endif
#ifdef SAMDL_HAVE_USART4
#ifdef SAMD2L2_HAVE_USART4
static char g_usart4rxbuffer[CONFIG_USART4_RXBUFSIZE];
static char g_usart4txbuffer[CONFIG_USART4_TXBUFSIZE];
#endif
#ifdef SAMDL_HAVE_USART5
#ifdef SAMD2L2_HAVE_USART5
static char g_usart5rxbuffer[CONFIG_USART5_RXBUFSIZE];
static char g_usart5txbuffer[CONFIG_USART5_TXBUFSIZE];
#endif
/* This describes the state of the USART0 port. */
#ifdef SAMDL_HAVE_USART0
#ifdef SAMD2L2_HAVE_USART0
static struct sam_dev_s g_usart0priv =
{
.config = &g_usart0config,
@ -340,7 +340,7 @@ static uart_dev_t g_usart0port =
/* This describes the state of the USART1 port. */
#ifdef SAMDL_HAVE_USART1
#ifdef SAMD2L2_HAVE_USART1
static struct sam_dev_s g_usart1priv =
{
.config = &g_usart1config,
@ -365,7 +365,7 @@ static uart_dev_t g_usart1port =
/* This describes the state of the USART2 port. */
#ifdef SAMDL_HAVE_USART2
#ifdef SAMD2L2_HAVE_USART2
static struct sam_dev_s g_usart2priv =
{
.config = &g_usart2config,
@ -390,7 +390,7 @@ static uart_dev_t g_usart2port =
/* This describes the state of the USART3 port. */
#ifdef SAMDL_HAVE_USART3
#ifdef SAMD2L2_HAVE_USART3
static struct sam_dev_s g_usart3priv =
{
.config = &g_usart3config,
@ -415,7 +415,7 @@ static uart_dev_t g_usart3port =
/* This describes the state of the USART4 port. */
#ifdef SAMDL_HAVE_USART4
#ifdef SAMD2L2_HAVE_USART4
static struct sam_dev_s g_usart4priv =
{
.config = &g_usart4config,
@ -440,7 +440,7 @@ static uart_dev_t g_usart4port =
/* This describes the state of the USART5 port. */
#ifdef SAMDL_HAVE_USART5
#ifdef SAMD2L2_HAVE_USART5
static struct sam_dev_s g_usart5priv =
{
.config = &g_usart5config,
@ -1009,4 +1009,4 @@ int up_putc(int ch)
}
#endif /* USE_SERIALDRIVER */
#endif /* SAMDL_HAVE_USART */
#endif /* SAMD2L2_HAVE_USART */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_serial.h
* arch/arm/src/samd2l2/sam_serial.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_SERIAL_H
#define __ARCH_ARM_SRC_SAMDL_SAM_SERIAL_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_SERIAL_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_SERIAL_H
/****************************************************************************
* Included Files
@ -64,4 +64,4 @@
* Public Functions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_SERIAL_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_SERIAL_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_spi.c
* arch/arm/src/samd2l2/sam_spi.c
*
* Copyright (C) 2014-2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
@ -69,20 +69,20 @@
#include "sam_sercom.h"
#include "sam_spi.h"
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
# include "sam_dmac.h"
#endif
#include <arch/board/board.h>
#ifdef SAMDL_HAVE_SPI
#ifdef SAMD2L2_HAVE_SPI
/****************************************************************************
* Pre-process Definitions
****************************************************************************/
#ifndef CONFIG_DEBUG_SPI_INFO
# undef CONFIG_SAMDL_SPI_REGDEBUG
# undef CONFIG_SAMD2L2_SPI_REGDEBUG
#endif
/****************************************************************************
@ -122,7 +122,7 @@ struct sam_spidev_s
uint8_t mode; /* Mode 0,1,2,3 */
uint8_t nbits; /* Width of word in bits (8 to 16) */
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
/* DMA */
uint8_t dma_tx_trig; /* DMA TX trigger source to use */
@ -134,7 +134,7 @@ struct sam_spidev_s
/* Debug stuff */
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
bool wr; /* Last was a write */
uint32_t regaddr; /* Last address */
uint32_t regval; /* Last value */
@ -148,7 +148,7 @@ struct sam_spidev_s
/* Helpers */
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
static bool spi_checkreg(struct sam_spidev_s *priv, bool wr,
uint32_t regval, uint32_t regaddr);
#else
@ -168,7 +168,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv,
static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
unsigned int offset);
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
static void spi_dma_setup(struct sam_spidev_s *priv);
#endif
@ -209,7 +209,7 @@ static void spi_pad_configure(struct sam_spidev_s *priv);
* Private Data
****************************************************************************/
#ifdef SAMDL_HAVE_SPI0
#ifdef SAMD2L2_HAVE_SPI0
/* SPI0 driver operations */
static const struct spi_ops_s g_spi0ops =
@ -255,14 +255,14 @@ static struct sam_spidev_s g_spi0dev =
.srcfreq = BOARD_SERCOM0_FREQUENCY,
.base = SAM_SERCOM0_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM0_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM0_RX,
#endif
};
#endif
#ifdef SAMDL_HAVE_SPI1
#ifdef SAMD2L2_HAVE_SPI1
/* SPI1 driver operations */
static const struct spi_ops_s g_spi1ops =
@ -305,14 +305,14 @@ static struct sam_spidev_s g_spi1dev =
.srcfreq = BOARD_SERCOM1_FREQUENCY,
.base = SAM_SERCOM1_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM1_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM1_RX,
#endif
};
#endif
#ifdef SAMDL_HAVE_SPI2
#ifdef SAMD2L2_HAVE_SPI2
/* SPI2 driver operations */
static const struct spi_ops_s g_spi2ops =
@ -355,14 +355,14 @@ static struct sam_spidev_s g_spi2dev =
.srcfreq = BOARD_SERCOM2_FREQUENCY,
.base = SAM_SERCOM2_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM2_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM2_RX,
#endif
};
#endif
#ifdef SAMDL_HAVE_SPI3
#ifdef SAMD2L2_HAVE_SPI3
/* SPI3 driver operations */
static const struct spi_ops_s g_spi3ops =
@ -405,14 +405,14 @@ static struct sam_spidev_s g_spi3dev =
.srcfreq = BOARD_SERCOM3_FREQUENCY,
.base = SAM_SERCOM3_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM3_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM3_RX,
#endif
};
#endif
#ifdef SAMDL_HAVE_SPI4
#ifdef SAMD2L2_HAVE_SPI4
/* SPI4 driver operations */
static const struct spi_ops_s g_spi4ops =
@ -455,14 +455,14 @@ static struct sam_spidev_s g_spi4dev =
.srcfreq = BOARD_SERCOM4_FREQUENCY,
.base = SAM_SERCOM4_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM4_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM4_RX,
#endif
};
#endif
#ifdef SAMDL_HAVE_SPI5
#ifdef SAMD2L2_HAVE_SPI5
/* SPI5 driver operations */
static const struct spi_ops_s g_spi5ops =
@ -505,7 +505,7 @@ static struct sam_spidev_s g_spi5dev =
.srcfreq = BOARD_SERCOM5_FREQUENCY,
.base = SAM_SERCOM5_BASE,
.spilock = SEM_INITIALIZER(1),
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
.dma_tx_trig = DMAC_TRIGSRC_SERCOM5_TX,
.dma_rx_trig = DMAC_TRIGSRC_SERCOM5_RX,
#endif
@ -532,7 +532,7 @@ static struct sam_spidev_s g_spi5dev =
*
****************************************************************************/
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t regval,
uint32_t regaddr)
{
@ -583,7 +583,7 @@ static uint8_t spi_getreg8(struct sam_spidev_s *priv, unsigned int offset)
uintptr_t regaddr = priv->base + offset;
uint8_t regval = getreg8(regaddr);
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{
spiinfo("%08x->%02x\n", regaddr, regval);
@ -606,7 +606,7 @@ static void spi_putreg8(struct sam_spidev_s *priv, uint8_t regval,
{
uintptr_t regaddr = priv->base + offset;
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{
spiinfo("%08x<-%02x\n", regaddr, regval);
@ -629,7 +629,7 @@ static uint16_t spi_getreg16(struct sam_spidev_s *priv, unsigned int offset)
uintptr_t regaddr = priv->base + offset;
uint16_t regval = getreg16(regaddr);
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{
spiinfo("%08x->%04x\n", regaddr, regval);
@ -652,7 +652,7 @@ static void spi_putreg16(struct sam_spidev_s *priv, uint16_t regval,
{
uintptr_t regaddr = priv->base + offset;
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{
spiinfo("%08x<-%04x\n", regaddr, regval);
@ -675,7 +675,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv, unsigned int offset)
uintptr_t regaddr = priv->base + offset;
uint32_t regval = getreg32(regaddr);
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, false, regval, regaddr))
{
spiinfo("%08x->%08x\n", regaddr, regval);
@ -698,7 +698,7 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
{
uintptr_t regaddr = priv->base + offset;
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
#ifdef CONFIG_SAMD2L2_SPI_REGDEBUG
if (spi_checkreg(priv, true, regval, regaddr))
{
spiinfo("%08x<-%08x\n", regaddr, regval);
@ -1119,7 +1119,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
*
****************************************************************************/
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
static void spi_dma_callback(DMA_HANDLE dma, void *arg, int result)
{
struct sam_spidev_s *priv = (struct sam_spidev_s *)arg;
@ -1171,7 +1171,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
{
struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
uint32_t regval;
int ret;
@ -1443,7 +1443,7 @@ static void spi_pad_configure(struct sam_spidev_s *priv)
*
****************************************************************************/
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
static void spi_dma_setup(struct sam_spidev_s *priv)
{
/* Allocate a pair of DMA channels */
@ -1497,7 +1497,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spiinfo("port: %d \n", port);
#ifdef SAMDL_HAVE_SPI0
#ifdef SAMD2L2_HAVE_SPI0
if (port == 0)
{
priv = &g_spi0dev;
@ -1505,7 +1505,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
#ifdef SAMDL_HAVE_SPI1
#ifdef SAMD2L2_HAVE_SPI1
if (port == 1)
{
priv = &g_spi1dev;
@ -1513,7 +1513,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
#ifdef SAMDL_HAVE_SPI2
#ifdef SAMD2L2_HAVE_SPI2
if (port == 2)
{
priv = &g_spi2dev;
@ -1521,7 +1521,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
#ifdef SAMDL_HAVE_SPI3
#ifdef SAMD2L2_HAVE_SPI3
if (port == 3)
{
priv = &g_spi3dev;
@ -1529,7 +1529,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
#ifdef SAMDL_HAVE_SPI4
#ifdef SAMD2L2_HAVE_SPI4
if (port == 4)
{
priv = &g_spi4dev;
@ -1537,7 +1537,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
#ifdef SAMDL_HAVE_SPI5
#ifdef SAMD2L2_HAVE_SPI5
if (port == 5)
{
priv = &g_spi5dev;
@ -1549,7 +1549,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
return NULL;
}
#ifdef CONFIG_SAMDL_SPI_DMA
#ifdef CONFIG_SAMD2L2_SPI_DMA
spi_dma_setup(priv);
#endif
@ -1647,4 +1647,4 @@ struct spi_dev_s *sam_spibus_initialize(int port)
return (struct spi_dev_s *)priv;
}
#endif /* SAMDL_HAVE_SPI */
#endif /* SAMD2L2_HAVE_SPI */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_spi.h
* arch/arm/src/samd2l2/sam_spi.h
*
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_SPI_H
#define __ARCH_ARM_SRC_SAMDL_SAM_SPI_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_SPI_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_SPI_H
/****************************************************************************
* Included Files
@ -53,7 +53,7 @@
# include "chip/saml_spi.h"
#endif
#ifdef SAMDL_HAVE_SPI
#ifdef SAMD2L2_HAVE_SPI
/****************************************************************************
* Pre-processor Definitions
@ -166,32 +166,32 @@ struct spi_dev_s *sam_spibus_initialize(int port);
*
****************************************************************************/
#ifdef SAMDL_HAVE_SPI0
#ifdef SAMD2L2_HAVE_SPI0
void sam_spi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI1
#ifdef SAMD2L2_HAVE_SPI1
void sam_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI2
#ifdef SAMD2L2_HAVE_SPI2
void sam_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI3
#ifdef SAMD2L2_HAVE_SPI3
void sam_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI4
#ifdef SAMD2L2_HAVE_SPI4
void sam_spi4select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMDL_HAVE_SPI5
#ifdef SAMD2L2_HAVE_SPI5
void sam_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
@ -211,27 +211,27 @@ void sam_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
*
****************************************************************************/
#ifdef SAMDL_HAVE_SPI0
#ifdef SAMD2L2_HAVE_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI1
#ifdef SAMD2L2_HAVE_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI2
#ifdef SAMD2L2_HAVE_SPI2
uint8_t sam_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI3
#ifdef SAMD2L2_HAVE_SPI3
uint8_t sam_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI4
#ifdef SAMD2L2_HAVE_SPI4
uint8_t sam_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMDL_HAVE_SPI5
#ifdef SAMD2L2_HAVE_SPI5
uint8_t sam_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
@ -260,27 +260,27 @@ uint8_t sam_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef SAMDL_HAVE_SPI0
#ifdef SAMD2L2_HAVE_SPI0
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI1
#ifdef SAMD2L2_HAVE_SPI1
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI2
#ifdef SAMD2L2_HAVE_SPI2
int sam_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI3
#ifdef SAMD2L2_HAVE_SPI3
int sam_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI4
#ifdef SAMD2L2_HAVE_SPI4
int sam_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMDL_HAVE_SPI5
#ifdef SAMD2L2_HAVE_SPI5
int sam_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
@ -291,5 +291,5 @@ int sam_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif /* __ASSEMBLY__ */
#endif /* SAMDL_HAVE_SPI */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_SPI_H */
#endif /* SAMD2L2_HAVE_SPI */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_SPI_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_start.c
* arch/arm/src/samd2l2/sam_start.c
*
* Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_start.h
* arch/arm/src/samd2l2/sam_start.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_START_H
#define __ARCH_ARM_SRC_SAMDL_SAM_START_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_START_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_START_H
/************************************************************************************
* Included Files
@ -59,4 +59,4 @@
void sam_boardinitialize(void);
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_START_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_START_H */

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_timerisr.c
* arch/arm/src/samd2l2/sam_timerisr.c
*
* Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samdl/sam_usart.c
* arch/arm/src/samd2l2/sam_usart.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -56,7 +56,7 @@
* Public Data
****************************************************************************/
#ifdef SAMDL_HAVE_USART0
#ifdef SAMD2L2_HAVE_USART0
const struct sam_usart_config_s g_usart0config =
{
.sercom = 0,
@ -77,7 +77,7 @@ const struct sam_usart_config_s g_usart0config =
};
#endif
#ifdef SAMDL_HAVE_USART1
#ifdef SAMD2L2_HAVE_USART1
const struct sam_usart_config_s g_usart1config =
{
.sercom = 1,
@ -98,7 +98,7 @@ const struct sam_usart_config_s g_usart1config =
};
#endif
#ifdef SAMDL_HAVE_USART2
#ifdef SAMD2L2_HAVE_USART2
const struct sam_usart_config_s g_usart2config =
{
.sercom = 2,
@ -119,7 +119,7 @@ const struct sam_usart_config_s g_usart2config =
};
#endif
#ifdef SAMDL_HAVE_USART3
#ifdef SAMD2L2_HAVE_USART3
const struct sam_usart_config_s g_usart3config =
{
.sercom = 3,
@ -140,7 +140,7 @@ const struct sam_usart_config_s g_usart3config =
};
#endif
#ifdef SAMDL_HAVE_USART4
#ifdef SAMD2L2_HAVE_USART4
const struct sam_usart_config_s g_usart4config =
{
.sercom = 4,
@ -161,7 +161,7 @@ const struct sam_usart_config_s g_usart4config =
};
#endif
#ifdef SAMDL_HAVE_USART5
#ifdef SAMD2L2_HAVE_USART5
const struct sam_usart_config_s g_usart5config =
{
.sercom = 5,
@ -182,50 +182,50 @@ const struct sam_usart_config_s g_usart5config =
};
#endif
const struct sam_usart_config_s *g_usartconfig[SAMDL_NSERCOM] =
const struct sam_usart_config_s *g_usartconfig[SAMD2L2_NSERCOM] =
{
#if SAMDL_NSERCOM > 5
#ifdef SAMDL_HAVE_USART5
#if SAMD2L2_NSERCOM > 5
#ifdef SAMD2L2_HAVE_USART5
&g_usart5config,
#else
(const struct sam_usart_config_s *)0,
#endif
#endif
#if SAMDL_NSERCOM > 1
#ifdef SAMDL_HAVE_USART1
#if SAMD2L2_NSERCOM > 1
#ifdef SAMD2L2_HAVE_USART1
&g_usart1config,
#else
(const struct sam_usart_config_s *)0,
#endif
#endif
#if SAMDL_NSERCOM > 2
#ifdef SAMDL_HAVE_USART2
#if SAMD2L2_NSERCOM > 2
#ifdef SAMD2L2_HAVE_USART2
&g_usart2config,
#else
(const struct sam_usart_config_s *)0,
#endif
#endif
#if SAMDL_NSERCOM > 3
#ifdef SAMDL_HAVE_USART3
#if SAMD2L2_NSERCOM > 3
#ifdef SAMD2L2_HAVE_USART3
&g_usart3config,
#else
(const struct sam_usart_config_s *)0,
#endif
#endif
#if SAMDL_NSERCOM > 4
#ifdef SAMDL_HAVE_USART4
#if SAMD2L2_NSERCOM > 4
#ifdef SAMD2L2_HAVE_USART4
&g_usart4config,
#else
(const struct sam_usart_config_s *)0,
#endif
#endif
#if SAMDL_NSERCOM > 5
#ifdef SAMDL_HAVE_USART5
#if SAMD2L2_NSERCOM > 5
#ifdef SAMD2L2_HAVE_USART5
&g_usart5config,
#else
(const struct sam_usart_config_s *)0,

View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/samdl/sam_usart.h
* arch/arm/src/samd2l2/sam_usart.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_USART_H
#define __ARCH_ARM_SRC_SAMDL_SAM_USART_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_USART_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_USART_H
/************************************************************************************
* Included Files
@ -115,7 +115,7 @@ struct sam_usart_config_s
*
***********************************************************************************/
#ifdef SAMDL_HAVE_USART
#ifdef SAMD2L2_HAVE_USART
static inline bool usart_syncbusy(const struct sam_usart_config_s * const config)
{
#if defined(CONFIG_ARCH_FAMILY_SAMD20)
@ -144,31 +144,31 @@ extern "C"
#define EXTERN extern
#endif
#ifdef SAMDL_HAVE_USART0
#ifdef SAMD2L2_HAVE_USART0
EXTERN const struct sam_usart_config_s g_usart0config;
#endif
#ifdef SAMDL_HAVE_USART1
#ifdef SAMD2L2_HAVE_USART1
EXTERN const struct sam_usart_config_s g_usart1config;
#endif
#ifdef SAMDL_HAVE_USART2
#ifdef SAMD2L2_HAVE_USART2
EXTERN const struct sam_usart_config_s g_usart2config;
#endif
#ifdef SAMDL_HAVE_USART3
#ifdef SAMD2L2_HAVE_USART3
EXTERN const struct sam_usart_config_s g_usart3config;
#endif
#ifdef SAMDL_HAVE_USART4
#ifdef SAMD2L2_HAVE_USART4
EXTERN const struct sam_usart_config_s g_usart4config;
#endif
#ifdef SAMDL_HAVE_USART5
#ifdef SAMD2L2_HAVE_USART5
EXTERN const struct sam_usart_config_s g_usart5config;
#endif
EXTERN const struct sam_usart_config_s *g_usartconfig[SAMDL_NSERCOM];
EXTERN const struct sam_usart_config_s *g_usartconfig[SAMD2L2_NSERCOM];
/************************************************************************************
* Public Functions
@ -179,4 +179,4 @@ EXTERN const struct sam_usart_config_s *g_usartconfig[SAMDL_NSERCOM];
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_USART_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_USART_H */

View File

@ -1,5 +1,5 @@
/*****************************************************************************
* arch/arm/src/samdl/sam_usb.h
* arch/arm/src/samd2l2/sam_usb.h
*
* Copyright (C) 2015 Filament - www.filament.com
* Copyright (C) 2015 Offcode Ltd. All rights reserved.
@ -115,11 +115,11 @@
#include "sam_fuses.h"
#include "sam_periphclks.h"
#if defined(CONFIG_USBHOST) && defined(CONFIG_SAMDL_USB)
#if defined(CONFIG_USBHOST) && defined(CONFIG_SAMD2L2_USB)
# error USBHOST mode not yet implemented!
#endif
#if defined(CONFIG_USBDEV) && defined(CONFIG_SAMDL_USB)
#if defined(CONFIG_USBDEV) && defined(CONFIG_SAMD2L2_USB)
/****************************************************************************
* Pre-processor Definitions
@ -136,7 +136,7 @@
*/
#ifndef CONFIG_DEBUG_USB
# undef CONFIG_SAMDL_USB_REGDEBUG
# undef CONFIG_SAMD2L2_USB_REGDEBUG
#endif
/* Driver Definitions *******************************************************/
@ -328,7 +328,7 @@ struct sam_ep_s
struct usbdev_ep_s ep; /* Standard endpoint structure */
/* SAMDL-specific fields */
/* SAMD2L2-specific fields */
struct sam_usbdev_s *dev; /* Reference to private driver data */
struct sam_rqhead_s reqq; /* Read/write request queue */
@ -391,7 +391,7 @@ struct sam_usbdev_s
/* Register operations ******************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite);
static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite);
static uint32_t sam_getreg32(uintptr_t regaddr);
@ -652,11 +652,11 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
* Name: sam_printreg
*
* Description:
* Print the SAMDL USB register access
* Print the SAMD2L2 USB register access
*
*******************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
uinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
@ -667,12 +667,12 @@ static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
* Name: sam_checkreg
*
* Description:
* Check if it is time to output debug information for accesses to a SAMDL
* Check if it is time to output debug information for accesses to a SAMD2L2
* USB registers
*
*******************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
static uintptr_t prevaddr = 0;
@ -732,11 +732,11 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
* Name: sam_getreg32
*
* Description:
* Get the contents of an 32-bit SAMDL USB register
* Get the contents of an 32-bit SAMD2L2 USB register
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static uint32_t sam_getreg32(uintptr_t regaddr)
{
/* Read the value from the register */
@ -759,11 +759,11 @@ static inline uint32_t sam_getreg32(uintptr_t regaddr)
* Name: sam_putreg32
*
* Description:
* Set the contents of an 32-bit SAMDL USB register to a value
* Set the contents of an 32-bit SAMD2L2 USB register to a value
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_putreg32(uint32_t regval, uintptr_t regaddr)
{
/* Check if we need to print this value */
@ -785,11 +785,11 @@ static inline void sam_putreg32(uint32_t regval, uint32_t regaddr)
* Name: sam_getreg16
*
* Description:
* Get the contents of an 16-bit SAMDL USB register
* Get the contents of an 16-bit SAMD2L2 USB register
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static uint32_t sam_getreg16(uintptr_t regaddr)
{
/* Read the value from the register */
@ -812,11 +812,11 @@ static inline uint32_t sam_getreg16(uintptr_t regaddr)
* Name: sam_putreg16
*
* Description:
* Set the contents of an 16-bit SAMDL USB register to a value
* Set the contents of an 16-bit SAMD2L2 USB register to a value
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_putreg16(uint16_t regval, uintptr_t regaddr)
{
/* Check if we need to print this value */
@ -838,11 +838,11 @@ static inline void sam_putreg16(uint16_t regval, uint32_t regaddr)
* Name: sam_getreg8
*
* Description:
* Get the contents of an 8-bit SAMDL USB register
* Get the contents of an 8-bit SAMD2L2 USB register
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static uint32_t sam_getreg8(uintptr_t regaddr)
{
/* Read the value from the register */
@ -865,11 +865,11 @@ static inline uint32_t sam_getreg8(uintptr_t regaddr)
* Name: sam_putreg8
*
* Description:
* Set the contents of an 8-bit SAMDL USB register to a value
* Set the contents of an 8-bit SAMD2L2 USB register to a value
*
****************************************************************************/
#ifdef CONFIG_SAMDL_USB_REGDEBUG
#ifdef CONFIG_SAMD2L2_USB_REGDEBUG
static void sam_putreg8(uint8_t regval, uintptr_t regaddr)
{
/* Check if we need to print this value */
@ -892,7 +892,7 @@ static inline void sam_putreg8(uint8_t regval, uint32_t regaddr)
* Name: sam_dumpep
****************************************************************************/
#if defined(CONFIG_SAMDL_USB_REGDEBUG) && defined(CONFIG_DEBUG_USB)
#if defined(CONFIG_SAMD2L2_USB_REGDEBUG) && defined(CONFIG_DEBUG_USB)
static void sam_dumpep(struct sam_usbdev_s *priv, uint8_t epno)
{
/* Global Registers */
@ -4099,4 +4099,4 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
return OK;
}
#endif /* CONFIG_USBDEV && CONFIG_SAMDL_USB */
#endif /* CONFIG_USBDEV && CONFIG_SAMD2L2_USB */

View File

@ -1,5 +1,5 @@
/******************************************************************************
* arch/arm/src/samdl/sam_usb.h
* arch/arm/src/samd2l2/sam_usb.h
*
* Copyright (C) 2015 Filament - www.filament.com
* Copyright (C) 2015 Offcode Ltd. All rights reserved.
@ -38,8 +38,8 @@
*
*****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMDL_SAM_USB_H
#define __ARCH_ARM_SRC_SAMDL_SAM_USB_H
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_USB_H
#define __ARCH_ARM_SRC_SAMD2L2_SAM_USB_H
/*****************************************************************************
* Included Files
@ -96,4 +96,4 @@ void sam_usb_suspend(FAR struct usbdev_s *dev, bool resume);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMDL_SAM_USB_H */
#endif /* __ARCH_ARM_SRC_SAMD2L2_SAM_USB_H */

Some files were not shown because too many files have changed in this diff Show More