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Xtensa: Fix some compilation issues

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This commit is contained in:
Gregory Nutt 2016-10-23 10:06:30 -06:00
parent 9b5fedc81e
commit c3d76d56bc
5 changed files with 20 additions and 17 deletions
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8
arch/xtensa/include/irq.h
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@ -115,18 +115,18 @@
# define REG_TMP0 (_REG_CALL0_START + 0) # define REG_TMP0 (_REG_CALL0_START + 0)
# define REG_TMP1 (_REG_CALL0_START + 1) # define REG_TMP1 (_REG_CALL0_START + 1)
# define REG_TMP2 (_REG_CALL0_START + 2) # define REG_TMP2 (_REG_CALL0_START + 2)
# define _REG_OVLY_START (_REG_CALL0_START + 3) # define _REG_OVLY_START (_REG_CALL0_START + 3)
#else #else
# define _REG_OVLY_START _REG_CALL0_START # define _REG_OVLY_START _REG_CALL0_START
#endif #endif
#ifdef CONFIG_XTENSA_USE_OVLY #ifdef CONFIG_XTENSA_USE_OVLY
/* Storage for overlay state */ /* Storage for overlay state */
# error Overlays not supported # error Overlays not supported
# define XCPTCONTEXT_REGS _REG_OVLY_START # define XCPTCONTEXT_REGS _REG_OVLY_START
#else #else
# define XCPTCONTEXT_REGS _REG_OVLY_START # define XCPTCONTEXT_REGS _REG_OVLY_START
#endif #endif
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) #define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)

2
arch/xtensa/src/common/xtensa_timer.h
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@ -38,7 +38,7 @@
#endif #endif
#include <arch/xtensa/xtensa_corebits.h> #include <arch/xtensa/xtensa_corebits.h>
#include <xtensa/config/system.h> //#include <xtensa/config/system.h>
/* Select timer to use for periodic tick, and determine its interrupt number /* Select timer to use for periodic tick, and determine its interrupt number
* and priority. User may specify a timer by defining XT_TIMER_INDEX with -D, * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,

2
arch/xtensa/src/esp32/esp32_irq.c
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@ -117,8 +117,6 @@ static int esp32_nmi(int irq, FAR void *context)
void xtensa_irq_initialize(void) void xtensa_irq_initialize(void)
{ {
int i;
/* Disable all interrupts */ /* Disable all interrupts */
#warning Missing logic #warning Missing logic

8
arch/xtensa/src/esp32/esp32_region.c
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@ -61,7 +61,7 @@ static inline void xtensa_write_dtlb(uint32_t vpn, unsigned int attr)
( (
"wdtlb %1, %0\n" "wdtlb %1, %0\n"
"dsync\n" "dsync\n"
: : "r" (vpn), "r" (attr)); : : "r" (vpn), "r" (attr)
); );
} }
@ -71,7 +71,7 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr)
( (
"witlb %1, %0\n" "witlb %1, %0\n"
"isync\n" "isync\n"
: : "r" (vpn), "r" (attr)); : : "r" (vpn), "r" (attr)
); );
} }
@ -95,7 +95,9 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr)
void esp32_region_protection(void) void esp32_region_protection(void)
{ {
for (int i = 0; i < NPROTECTED_PAGES; ++i) int i;
for (i = 0; i < NPROTECTED_PAGES; ++i)
{ {
xtensa_write_dtlb(g_protected_pages[i], 0xf); xtensa_write_dtlb(g_protected_pages[i], 0xf);
xtensa_write_itlb(g_protected_pages[i], 0xf); xtensa_write_itlb(g_protected_pages[i], 0xf);

17
arch/xtensa/src/esp32/esp32_timerisr.c
View File

@ -48,6 +48,7 @@
#include <arch/xtensa/xtensa_specregs.h> #include <arch/xtensa/xtensa_specregs.h>
#include "clock/clock.h" #include "clock/clock.h"
#include "xtensa_timer.h"
#include "xtensa.h" #include "xtensa.h"
/**************************************************************************** /****************************************************************************
@ -106,7 +107,7 @@ static inline uint32_t xtensa_getcompare(void)
/* Set the value of the compare register */ /* Set the value of the compare register */
static inline void xtensa_setps(uint32_t compare) static inline void xtensa_setcompare(uint32_t compare)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
@ -122,10 +123,10 @@ static inline void xtensa_enable_timer(void)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
"rsr a2, INTENABLE" "rsr a2, INTENABLE\n"
"ori a2, XT_TIMER_INTEN" "ori a2, XT_TIMER_INTEN\n"
"wsr a2, INTENABLE" "wsr a2, INTENABLE\n"
: : "a2" : : : "a2"
); );
} }
@ -150,15 +151,17 @@ static inline void xtensa_enable_timer(void)
static int esp32_timerisr(int irq, uint32_t *regs) static int esp32_timerisr(int irq, uint32_t *regs)
{ {
uint32_t divisor;
uint32_t compare; uint32_t compare;
uint32_t diff; uint32_t diff;
divisor = g_tick_divisor;
do do
{ {
/* Increment the compare register for the next tick */ /* Increment the compare register for the next tick */
compare = xtensa_getcompare(); compare = xtensa_getcompare();
xtensa_setcompare(count + g_tick_divisor); xtensa_setcompare(compare + divisor);
/* Process one timer tick */ /* Process one timer tick */
@ -168,7 +171,7 @@ static int esp32_timerisr(int irq, uint32_t *regs)
* interrupts. * interrupts.
*/ */
diff = xtensa_readcount() - compare; diff = xtensa_getcount() - compare;
} }
while (diff < divisor); while (diff < divisor);