Xtensa: Fix some compilation issues
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@ -115,18 +115,18 @@
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# define REG_TMP0 (_REG_CALL0_START + 0)
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# define REG_TMP1 (_REG_CALL0_START + 1)
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# define REG_TMP2 (_REG_CALL0_START + 2)
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# define _REG_OVLY_START (_REG_CALL0_START + 3)
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# define _REG_OVLY_START (_REG_CALL0_START + 3)
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#else
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# define _REG_OVLY_START _REG_CALL0_START
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# define _REG_OVLY_START _REG_CALL0_START
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#endif
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#ifdef CONFIG_XTENSA_USE_OVLY
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/* Storage for overlay state */
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# error Overlays not supported
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# define XCPTCONTEXT_REGS _REG_OVLY_START
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# define XCPTCONTEXT_REGS _REG_OVLY_START
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#else
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# define XCPTCONTEXT_REGS _REG_OVLY_START
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# define XCPTCONTEXT_REGS _REG_OVLY_START
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#endif
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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@ -38,7 +38,7 @@
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#endif
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#include <arch/xtensa/xtensa_corebits.h>
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#include <xtensa/config/system.h>
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//#include <xtensa/config/system.h>
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/* Select timer to use for periodic tick, and determine its interrupt number
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* and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
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@ -117,8 +117,6 @@ static int esp32_nmi(int irq, FAR void *context)
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void xtensa_irq_initialize(void)
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{
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int i;
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/* Disable all interrupts */
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#warning Missing logic
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@ -61,7 +61,7 @@ static inline void xtensa_write_dtlb(uint32_t vpn, unsigned int attr)
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(
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"wdtlb %1, %0\n"
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"dsync\n"
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: : "r" (vpn), "r" (attr));
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: : "r" (vpn), "r" (attr)
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);
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}
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@ -71,7 +71,7 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr)
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(
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"witlb %1, %0\n"
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"isync\n"
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: : "r" (vpn), "r" (attr));
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: : "r" (vpn), "r" (attr)
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);
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}
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@ -95,7 +95,9 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr)
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void esp32_region_protection(void)
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{
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for (int i = 0; i < NPROTECTED_PAGES; ++i)
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int i;
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for (i = 0; i < NPROTECTED_PAGES; ++i)
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{
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xtensa_write_dtlb(g_protected_pages[i], 0xf);
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xtensa_write_itlb(g_protected_pages[i], 0xf);
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@ -48,6 +48,7 @@
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#include <arch/xtensa/xtensa_specregs.h>
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#include "clock/clock.h"
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#include "xtensa_timer.h"
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#include "xtensa.h"
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/****************************************************************************
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@ -106,7 +107,7 @@ static inline uint32_t xtensa_getcompare(void)
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/* Set the value of the compare register */
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static inline void xtensa_setps(uint32_t compare)
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static inline void xtensa_setcompare(uint32_t compare)
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{
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__asm__ __volatile__
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(
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@ -122,10 +123,10 @@ static inline void xtensa_enable_timer(void)
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{
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__asm__ __volatile__
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(
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"rsr a2, INTENABLE"
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"ori a2, XT_TIMER_INTEN"
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"wsr a2, INTENABLE"
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: : "a2"
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"rsr a2, INTENABLE\n"
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"ori a2, XT_TIMER_INTEN\n"
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"wsr a2, INTENABLE\n"
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: : : "a2"
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);
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}
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@ -150,15 +151,17 @@ static inline void xtensa_enable_timer(void)
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static int esp32_timerisr(int irq, uint32_t *regs)
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{
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uint32_t divisor;
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uint32_t compare;
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uint32_t diff;
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divisor = g_tick_divisor;
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do
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{
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/* Increment the compare register for the next tick */
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compare = xtensa_getcompare();
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xtensa_setcompare(count + g_tick_divisor);
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xtensa_setcompare(compare + divisor);
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/* Process one timer tick */
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@ -168,7 +171,7 @@ static int esp32_timerisr(int irq, uint32_t *regs)
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* interrupts.
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*/
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diff = xtensa_readcount() - compare;
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diff = xtensa_getcount() - compare;
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}
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while (diff < divisor);
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