Merge branch 'master' into l432kc

This commit is contained in:
Sebastien Lorquet 2017-05-04 01:35:51 +02:00
commit c4556bf33d
10 changed files with 71 additions and 49 deletions

View File

@ -1272,7 +1272,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* device.
*/
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
irqstate_t flags = enter_critical_section();
#endif
/* Receive a byte */
@ -1287,7 +1287,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
}
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
leave_critical_section(flags);
#endif
}
@ -1454,8 +1454,8 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
*
************************************************************************************/
#ifdef CONFIG_I2C_POLLED
static int stm32_i2c2_isr(int irq, void *context, FAR void *arg)
#ifndef CONFIG_I2C_POLLED
static int stm32_i2c_isr(int irq, void *context, FAR void *arg)
{
struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)arg;

View File

@ -1332,7 +1332,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* device.
*/
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
irqstate_t flags = enter_critical_section();
#endif
/* Receive a byte */
@ -1347,7 +1347,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
/* autoend? */
}
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
leave_critical_section(flags);
#endif
}

View File

@ -1306,7 +1306,7 @@ static int stm32f0_i2c_isr_process(struct stm32f0_i2c_priv_s *priv)
* device.
*/
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
irqstate_t flags = enter_critical_section();
#endif
/* Receive a byte */
@ -1321,7 +1321,7 @@ static int stm32f0_i2c_isr_process(struct stm32f0_i2c_priv_s *priv)
/* autoend? */
}
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
leave_critical_section(flags);
#endif
}

View File

@ -26,7 +26,7 @@ config ARCH_CHIP_STM32F745VE
select STM32F7_FLASH_CONFIG_E
select STM32F7_IO_CONFIG_V
---help---
STM32 F7 Cortex M7, 512 320K FLASH, 320K (240+16+64) Kb SRAM
STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM
config ARCH_CHIP_STM32F745IG
bool "STM32F745IG"
@ -835,7 +835,7 @@ config STM32F7_FLASH_CONFIG_E
bool
default n
config STM32F7_FLASH_CONFIG_I
config STM32F7_FLASH_CONFIG_G
bool
default n
@ -844,7 +844,7 @@ config STM32F7_FLASH_CONFIG_I
default n
choice
prompt "Overrdide Flash Size Designator"
prompt "Override Flash Size Designator"
depends on ARCH_CHIP_STM32F7
default STM32F7_FLASH_OVERRIDE_DEFAULT
---help---
@ -862,7 +862,7 @@ choice
Examples:
If the STM32F745VE is chosen, the Flash configuration would be 'E', if a variant of
the part with a 2048 KiB Flash is released in the future one could simply select
the part with a 2048 KiB Flash is released in the future one could simply select
the 'I' designator here.
If an STM32F7xxx Series parts is chosen the default Flash configuration will be set
@ -880,7 +880,7 @@ config STM32F7_FLASH_OVERRIDE_G
config STM32F7_FLASH_OVERRIDE_I
bool "I 2048KiB"
endchoice # "Overrdide Flash Size Designator"
endchoice # "Override Flash Size Designator"
menu "STM32 Peripheral Support"
@ -895,7 +895,6 @@ config STM32F7_HAVE_FSMC
bool
default n
config STM32F7_HAVE_ETHRNET
bool
default n
@ -928,7 +927,6 @@ config STM32F7_HAVE_ADC3_DMA
bool
default n
config STM32F7_HAVE_CAN3
bool
default n
@ -966,7 +964,7 @@ config STM32F7_HAVE_DFSDM1
default n
# These "hidden" settings are the OR of individual peripheral selections
# indicating that the general capabilitiy is required.
# indicating that the general capability is required.
config STM32F7_ADC
bool

View File

@ -56,13 +56,11 @@
#define _K(x) ((x)*1024)
#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \
!defined(CONFIG_STM32_FLASH_CONFIG_E) && \
!defined(CONFIG_STM32_FLASH_CONFIG_F) && \
!defined(CONFIG_STM32_FLASH_CONFIG_G)
# define CONFIG_STM32_FLASH_OVERRIDE_E
!defined(CONFIG_STM32F7_FLASH_OVERRIDE_E) && \
!defined(CONFIG_STM32F7_FLASH_OVERRIDE_G) && \
!defined(CONFIG_STM32F7_FLASH_CONFIG_E) && \
!defined(CONFIG_STM32F7_FLASH_CONFIG_G)
# define CONFIG_STM32F7_FLASH_OVERRIDE_E
# warning "Flash size not defined defaulting to 512KiB (E)"
#endif
@ -82,14 +80,14 @@
# endif
#endif
#if defined(CONFIG_STM32_FLASH_CONFIG_E)
#if defined(CONFIG_STM32F7_FLASH_CONFIG_E)
# define STM32_FLASH_NPAGES 6
# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (1 * 256))
# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \
_K(128), _K(256)}
#elif defined(CONFIG_STM32_FLASH_CONFIG_G)
#elif defined(CONFIG_STM32F7_FLASH_CONFIG_G)
# define STM32_FLASH_NPAGES 8
# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (3 * 256))

View File

@ -56,15 +56,13 @@
#define _K(x) ((x)*1024)
#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \
!defined(CONFIG_STM32_FLASH_OVERRIDE_I) && \
!defined(CONFIG_STM32_FLASH_CONFIG_E) && \
!defined(CONFIG_STM32_FLASH_CONFIG_F) && \
!defined(CONFIG_STM32_FLASH_CONFIG_G) && \
!defined(CONFIG_STM32_FLASH_CONFIG_I)
# define CONFIG_STM32_FLASH_OVERRIDE_E
!defined(CONFIG_STM32F7_FLASH_OVERRIDE_E) && \
!defined(CONFIG_STM32F7_FLASH_OVERRIDE_G) && \
!defined(CONFIG_STM32F7_FLASH_OVERRIDE_I) && \
!defined(CONFIG_STM32F7_FLASH_CONFIG_E) && \
!defined(CONFIG_STM32F7_FLASH_CONFIG_G) && \
!defined(CONFIG_STM32F7_FLASH_CONFIG_I)
# define CONFIG_STM32F7_FLASH_OVERRIDE_E
# warning "Flash size not defined defaulting to 512KiB (E)"
#endif
@ -89,21 +87,21 @@
# endif
#endif
#if defined(CONFIG_STM32_FLASH_CONFIG_E)
#if defined(CONFIG_STM32F7_FLASH_CONFIG_E)
# define STM32_FLASH_NPAGES 6
# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (1 * 256))
# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \
_K(128), _K(256)}
#elif defined(CONFIG_STM32_FLASH_CONFIG_G)
#elif defined(CONFIG_STM32F7_FLASH_CONFIG_G)
# define STM32_FLASH_NPAGES 8
# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (3 * 256))
# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \
_K(128), _K(256), _K(256), _K(256)}
#elif defined(CONFIG_STM32_FLASH_CONFIG_I)
#elif defined(CONFIG_STM32F7_FLASH_CONFIG_I)
# define STM32_FLASH_NPAGES 12
# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (7 * 256))

View File

@ -1776,7 +1776,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* sequence. Otherwise, additional bytes may be received.
*/
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
irqstate_t state = enter_critical_section();
#endif
/* Receive a byte */
@ -1793,7 +1793,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
priv->dcnt--;
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
leave_critical_section(state);
#endif
}

View File

@ -163,7 +163,36 @@
#define GPIO_DCMI_HSYNC_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DCMI_HSYNC_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN8)
#define GPIO_DCMI_VSYNC_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN7)
/* TODO: DCMI data pins missing */
#define GPIO_DCMI_VSYNC_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN5)
#define GPIO_DCMI_D0_1 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN9)
#define GPIO_DCMI_D0_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN6)
#define GPIO_DCMI_D1_1 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN10)
#define GPIO_DCMI_D1_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN7)
#define GPIO_DCMI_D2_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN8)
#define GPIO_DCMI_D2_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN0)
#define GPIO_DCMI_D3_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN9)
#define GPIO_DCMI_D3_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN1)
#define GPIO_DCMI_D4_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN11)
#define GPIO_DCMI_D4_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN4)
#define GPIO_DCMI_D5_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTD|GPIO_PIN3)
#define GPIO_DCMI_D5_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN6)
#define GPIO_DCMI_D6_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN8)
#define GPIO_DCMI_D6_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN5)
#define GPIO_DCMI_D7_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN9)
#define GPIO_DCMI_D7_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN6)
#define GPIO_DCMI_D8_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN10)
#define GPIO_DCMI_D8_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN6)
#define GPIO_DCMI_D9_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN12)
#define GPIO_DCMI_D9_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN7)
#define GPIO_DCMI_D10_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTD|GPIO_PIN6)
#define GPIO_DCMI_D10_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN5)
#define GPIO_DCMI_D11_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN2)
#define GPIO_DCMI_D11_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN10)
#define GPIO_DCMI_D12_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN4)
#define GPIO_DCMI_D12_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN11)
#define GPIO_DCMI_D13_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTG|GPIO_PIN15)
#define GPIO_DCMI_D13_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN0)
/* Digital Filter for Sigma-Delta Modulators (DFSDM) */
@ -300,14 +329,15 @@
#define GPIO_I2C4_SDA_2 (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN11)
#define GPIO_I2C4_SDA_3 (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN1)
#define GPIO_I2C4_SDA_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN13)
#define GPIO_I2C4_SDA_5 (GPIO_ALT|GPIO_AF4 |GPIO_PORTF|GPIO_PIN15)
#define GPIO_I2C4_SCL_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN6)
#define GPIO_I2C4_SCL_2 (GPIO_ALT|GPIO_AF3 |GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C4_SCL_3 (GPIO_ALT|GPIO_AF2 |GPIO_PORTC|GPIO_PIN0)
#define GPIO_I2C4_SCL_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN12)
#define GPIO_I2C4_SCL_5 (GPIO_ALT|GPIO_AF4 |GPIO_PORTF|GPIO_PIN14)
#define GPIO_I2C4_SMBA_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN14)
#define GPIO_I2C4_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN11)
#define GPIO_I2C4_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_PORTD|GPIO_PIN11)
#define GPIO_I2C4_SMBA_4 (GPIO_ALT|GPIO_AF4 |GPIO_PORTF|GPIO_PIN13)
#define GPIO_I2C4_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_PORTF|GPIO_PIN13)
/* JTAG */

View File

@ -1384,7 +1384,7 @@ static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv)
* device.
*/
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
irqstate_t flags = enter_critical_section();
#endif
/* Receive a byte */
@ -1399,7 +1399,7 @@ static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv)
/* autoend? */
}
#ifdef CONFIG_I2C_POLLED
#ifndef CONFIG_I2C_POLLED
leave_critical_section(flags);
#endif
}
@ -1535,7 +1535,7 @@ static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv)
#ifdef CONFIG_STM32L4_I2C2
static int stm32l4_i2c_isr(int irq, void *context, FAR void *arg)
{
struct stm32l4_i2c_priv_s *priv = (struct stm32l4_i2c_priv_s *priv)arg;
struct stm32l4_i2c_priv_s *priv = (struct stm32l4_i2c_priv_s *)arg;
DEBUGASSERT(priv != NULL);
return stm32l4_i2c_isr_process(priv);

View File

@ -94,9 +94,9 @@ extern "C"
* Public Function Prototypes
****************************************************************************/
struct eth_hdr_s; /* Forward reference */
struct net_driver_s; /* Forward reference */
struct eth_hdr_s; /* Forward reference */
/* Defined in pkt_conn.c ****************************************************/
/****************************************************************************
* Name: pkt_initialize()
*
@ -158,7 +158,6 @@ struct pkt_conn_s *pkt_active(FAR struct eth_hdr_s *buf);
struct pkt_conn_s *pkt_nextconn(FAR struct pkt_conn_s *conn);
/* Defined in pkt_callback.c ************************************************/
/****************************************************************************
* Name: pkt_callback
*
@ -176,7 +175,6 @@ struct pkt_conn_s *pkt_nextconn(FAR struct pkt_conn_s *conn);
uint16_t pkt_callback(FAR struct net_driver_s *dev,
FAR struct pkt_conn_s *conn, uint16_t flags);
/* Defined in pkt_input.c ***************************************************/
/****************************************************************************
* Name: pkt_input
*