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esp32c3-devkit: Improve documentation related to Protected Mode

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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei 2022-07-11 15:22:05 -03:00 committed by Xiang Xiao
parent 5e32aa14bf
commit c462ea6088
1 changed files with 14 additions and 7 deletions
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21
boards/risc-v/esp32c3/esp32c3-devkit/scripts/protected.template.ld
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@ -22,8 +22,12 @@
* This file describes the memory layout (memory blocks) as virtual * This file describes the memory layout (memory blocks) as virtual
* memory addresses. * memory addresses.
* *
* kernel-space.ld and user-space.ld contain output sections to link compiler
* output into these memory blocks for the Kernel and User images,
* respectively.
*
* NOTE: That this is not the actual linker script but rather a "template" * NOTE: That this is not the actual linker script but rather a "template"
* for the esp32c3_out.ld script. This template script is passed through * for the esp32c3_out.ld script. This template script is passed through
* the C preprocessor to include selected configuration options. * the C preprocessor to include selected configuration options.
* *
****************************************************************************/ ****************************************************************************/
@ -66,7 +70,8 @@ MEMORY
/* Flash mapped instruction data. */ /* Flash mapped instruction data. */
/* The 0x20 offset is a convenience for the app binary image generation. /* The 0x20 offset for the KIROM region is a convenience for the Kernel
* binary image generation in Espressif Application Image format.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip * Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment * has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's * header. Setting this offset makes it simple to meet the flash cache MMU's
@ -83,11 +88,13 @@ MEMORY
/* Flash mapped constant data */ /* Flash mapped constant data */
/* The 0x20 offset is a convenience for the app binary image generation. /* See KIROM region documentation above for the meaning of the 0x20 offset.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip *
* has a 0x18 byte file header, and each segment has a 0x08 byte segment * The 0x18 offset for the UDROM region is a convenience for the User
* header. Setting this offset makes it simple to meet the flash cache MMU's * binary image generation following a custom image format, which defines
* constraint that (paddr % 64KB == vaddr % 64KB). * a "metadata" output section containing some information that the Kernel
* needs for properly configuring the External Flash MMU when loading the
* User application image.
*/ */
KDROM (R) : org = 0x3c000020, len = 0x80000 - 0x20 KDROM (R) : org = 0x3c000020, len = 0x80000 - 0x20