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Fix some bad SDIO debug instrumentation

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4195 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-17 16:45:40 +00:00
parent 9d4d5cda5d
commit c47c297f1b
2 changed files with 34 additions and 24 deletions
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37
arch/arm/src/stm32/stm32_adc.c
View File

@ -350,14 +350,22 @@ static void tim_putreg(struct stm32_dev_s *priv, int offset, uint32_t value)
static int adc_timinit(FAR struct stm32_dev_s *priv)
{
uint32_t regval;
/* Configure the time base: Timer period, prescaler, clock division,
* counter mode (up).
*
* EXTTRIG: External Trigger Conversion mode for regular channels
/* If the timer base address is zero, then this ADC was not configured to
* use a timer.
*/
if (!priv->tbase)
{
#warning "Does anything need to be configured if there is no timer for this ADC?"
return OK;
}
/* Configure the ADC to use the selected timer and timer channel as the trigger */
/* EXTTRIG: External Trigger Conversion mode for regular channels */
regval = tim_getreg(priv, STM32_ADC_CR2_OFFSET)
regval = adc_getreg(priv, STM32_ADC_CR2_OFFSET)
regval |= ADC_CR2_EXTTRIG;
/* EXTSEL selection: These bits select the external event used to trigger
@ -371,11 +379,10 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
regval &= ~ADC_CR2_EXTSEL_MASK;
regval |= priv->extsel;
tim_putreg(priv, STM32_ADC_CR2_OFFSET, regval);
/* ADC Prescaler (ADCPRE) selection: Set and cleared by software to select
* the frequency of the clock to the ADCs.
*/
adc_putreg(priv, STM32_ADC_CR2_OFFSET, regval);
/* Configure the timer channel to drive the ADC */
#warning "LOTS of missing timer setup logic"
regval = priv->presc;
@ -399,13 +406,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
tim_putreg(priv, STM32_BTIM_PSC_OFFSET, regval);
#if 0 // What is this?
regval = getreg32(STM32_RCC_CFGR);
regval |= presc << RCC_CFGR_ADCPRE_SHIFT;
putreg32(regval, STM32_RCC_CFGR);
#endif
/* Enable the counter */
/* Enable the timer counter */
regval = stm32_tim_getreg(priv, STM32_BTIM_CR1_OFFSET);
regval |= ATIM_CR1_CEN;

21
arch/arm/src/stm32/stm32_sdio.c
View File

@ -1006,8 +1006,9 @@ static void stm32_eventtimeout(int argc, uint32_t arg)
{
struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
DEBUGASSERT(argc == 1 && priv != NULL);
DEBUGASSERT((priv->waitevents & SDIOWAIT_TIMEOUT) != 0);
/* There is always race conditions with timer expirations. */
DEBUGASSERT((priv->waitevents & SDIOWAIT_TIMEOUT) != 0 || priv->wkupevent != 0);
/* Is a data transfer complete event expected? */
@ -2162,6 +2163,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
{
struct stm32_dev_s *priv = (struct stm32_dev_s*)dev;
sdio_eventset_t wkupevent = 0;
irqstate_t flags;
int ret;
/* There is a race condition here... the event may have completed before
@ -2169,8 +2171,8 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
* be non-zero (and, hopefully, the semaphore count will also be non-zero.
*/
DEBUGASSERT((priv->waitevents != 0 && priv->wkupevent == 0) ||
(priv->waitevents == 0 && priv->wkupevent != 0));
flags = irqsave();
DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0);
/* Check if the timeout event is specified in the event set */
@ -2178,11 +2180,16 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
{
int delay;
/* Yes.. Handle a cornercase */
/* Yes.. Handle a cornercase: The user request a timeout event but
* with timeout == 0?
*/
if (!timeout)
{
return SDIOWAIT_TIMEOUT;
/* Then just tell the caller that we already timed out */
wkupevent = SDIOWAIT_TIMEOUT;
goto errout;
}
/* Start the watchdog timer */
@ -2231,6 +2238,8 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
priv->xfrflags = 0;
#endif
errout:
irqrestore(flags);
return wkupevent;
}