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Update kconfig2html.c

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Fix nuttx coding style
This commit is contained in:
simbit18 2023-12-14 15:22:07 +01:00 committed by Xiang Xiao
parent e03599d9ae
commit c494ce4a96
78 changed files with 193 additions and 154 deletions
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2
arch/arm/include/cxd56xx/gnss_type.h
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@ -223,7 +223,7 @@ extern "C"
/* GNSS positionig data elements */ /* GNSS positionig data elements */
/* Day (UTC) */ /* Day (UTC) */
struct cxd56_gnss_date_s struct cxd56_gnss_date_s
{ {

2
arch/arm/include/eoss3/chip.h
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@ -40,4 +40,4 @@
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ #define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Three bits of interrupt pri used */ #define NVIC_SYSH_PRIORITY_STEP 0x20 /* Three bits of interrupt pri used */
#endif /* __ARCH_ARM_INCLUDE_EFM32_CHIP_H */ #endif /* __ARCH_ARM_INCLUDE_EFM32_CHIP_H */

2
arch/arm/include/imxrt/imxrt105x_irq.h
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@ -136,7 +136,7 @@
#define IMXRT_IRQ_SRC (IMXRT_IRQ_EXTINT + 98) /* SRC interrupt */ #define IMXRT_IRQ_SRC (IMXRT_IRQ_EXTINT + 98) /* SRC interrupt */
#define IMXRT_IRQ_RESERVED99 (IMXRT_IRQ_EXTINT + 99) /* Reserved */ #define IMXRT_IRQ_RESERVED99 (IMXRT_IRQ_EXTINT + 99) /* Reserved */
#define IMXRT_IRQ_GPT1 (IMXRT_IRQ_EXTINT + 100) /* GPT1 interrupt */ #define IMXRT_IRQ_GPT1 (IMXRT_IRQ_EXTINT + 100) /* GPT1 interrupt */
#define IMXRT_IRQ_GPT2 (IMXRT_IRQ_EXTINT + 101) /* GPT2 interrupt */ #define IMXRT_IRQ_GPT2 (IMXRT_IRQ_EXTINT + 101) /* GPT2 interrupt */
#define IMXRT_IRQ_FLEXPWM1_0 (IMXRT_IRQ_EXTINT + 102) /* FLEXPWM1 capture/compare/reload 0 interrupt */ #define IMXRT_IRQ_FLEXPWM1_0 (IMXRT_IRQ_EXTINT + 102) /* FLEXPWM1 capture/compare/reload 0 interrupt */
#define IMXRT_IRQ_FLEXPWM1_1 (IMXRT_IRQ_EXTINT + 103) /* FLEXPWM1 capture/compare/reload 1 interrupt */ #define IMXRT_IRQ_FLEXPWM1_1 (IMXRT_IRQ_EXTINT + 103) /* FLEXPWM1 capture/compare/reload 1 interrupt */
#define IMXRT_IRQ_FLEXPWM1_2 (IMXRT_IRQ_EXTINT + 104) /* FLEXPWM1 capture/compare/reload 2 interrupt */ #define IMXRT_IRQ_FLEXPWM1_2 (IMXRT_IRQ_EXTINT + 104) /* FLEXPWM1 capture/compare/reload 2 interrupt */

2
arch/arm/include/imxrt/imxrt106x_irq.h
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@ -136,7 +136,7 @@
#define IMXRT_IRQ_SRC (IMXRT_IRQ_EXTINT + 98) /* SRC interrupt */ #define IMXRT_IRQ_SRC (IMXRT_IRQ_EXTINT + 98) /* SRC interrupt */
#define IMXRT_IRQ_RESERVED99 (IMXRT_IRQ_EXTINT + 99) /* Reserved */ #define IMXRT_IRQ_RESERVED99 (IMXRT_IRQ_EXTINT + 99) /* Reserved */
#define IMXRT_IRQ_GPT1 (IMXRT_IRQ_EXTINT + 100) /* GPT1 interrupt */ #define IMXRT_IRQ_GPT1 (IMXRT_IRQ_EXTINT + 100) /* GPT1 interrupt */
#define IMXRT_IRQ_GPT2 (IMXRT_IRQ_EXTINT + 101) /* GPT2 interrupt */ #define IMXRT_IRQ_GPT2 (IMXRT_IRQ_EXTINT + 101) /* GPT2 interrupt */
#define IMXRT_IRQ_FLEXPWM1_0 (IMXRT_IRQ_EXTINT + 102) /* FLEXPWM1 capture/compare/reload 0 interrupt */ #define IMXRT_IRQ_FLEXPWM1_0 (IMXRT_IRQ_EXTINT + 102) /* FLEXPWM1 capture/compare/reload 0 interrupt */
#define IMXRT_IRQ_FLEXPWM1_1 (IMXRT_IRQ_EXTINT + 103) /* FLEXPWM1 capture/compare/reload 1 interrupt */ #define IMXRT_IRQ_FLEXPWM1_1 (IMXRT_IRQ_EXTINT + 103) /* FLEXPWM1 capture/compare/reload 1 interrupt */
#define IMXRT_IRQ_FLEXPWM1_2 (IMXRT_IRQ_EXTINT + 104) /* FLEXPWM1 capture/compare/reload 2 interrupt */ #define IMXRT_IRQ_FLEXPWM1_2 (IMXRT_IRQ_EXTINT + 104) /* FLEXPWM1 capture/compare/reload 2 interrupt */

2
arch/arm/include/kinetis/kinetis_k40irq.h
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@ -93,7 +93,7 @@
#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST + 39) /* 39: CAN1 Error */ #define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST + 39) /* 39: CAN1 Error */
#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST + 40) /* 40: CAN1 Transmit Warning */ #define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST + 40) /* 40: CAN1 Transmit Warning */
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 41) /* 41: CAN1 Receive Warning */ #define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 41) /* 41: CAN1 Receive Warning */
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 42) /* 42: CAN1 Wake UP */ #define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 42) /* 42: CAN1 Wake UP */
#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST + 43) /* 43: Reserved */ #define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST + 43) /* 43: Reserved */
#define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST + 44) /* 44: Reserved */ #define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST + 44) /* 44: Reserved */
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST + 45) /* 45: UART0 status */ #define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST + 45) /* 45: UART0 status */

2
arch/arm/include/kinetis/kinetis_k60irq.h
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@ -93,7 +93,7 @@
#define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST + 39) /* 39: CAN1 Error */ #define KINETIS_IRQ_CAN1ERR (KINETIS_IRQ_FIRST + 39) /* 39: CAN1 Error */
#define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST + 40) /* 40: CAN1 Transmit Warning */ #define KINETIS_IRQ_CAN1TW (KINETIS_IRQ_FIRST + 40) /* 40: CAN1 Transmit Warning */
#define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 41) /* 41: CAN1 Receive Warning */ #define KINETIS_IRQ_CAN1RW (KINETIS_IRQ_FIRST + 41) /* 41: CAN1 Receive Warning */
#define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 42) /* 42: CAN1 Wake UP */ #define KINETIS_IRQ_CAN1WU (KINETIS_IRQ_FIRST + 42) /* 42: CAN1 Wake UP */
#define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST + 43) /* 43: Reserved */ #define KINETIS_IRQ_RESVD43 (KINETIS_IRQ_FIRST + 43) /* 43: Reserved */
#define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST + 44) /* 44: Reserved */ #define KINETIS_IRQ_RESVD44 (KINETIS_IRQ_FIRST + 44) /* 44: Reserved */
#define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST + 45) /* 45: UART0 status */ #define KINETIS_IRQ_UART0S (KINETIS_IRQ_FIRST + 45) /* 45: UART0 status */

4
arch/arm/include/samv7/same70_irq.h
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@ -153,11 +153,11 @@
#define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */ #define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */
#define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */ #define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */
#define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */ #define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */
#define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */ #define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */
#define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */ #define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */
#define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */ #define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */
#define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */ #define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */
#define SAM_IRQ_QSPI (SAM_IRQ_EXTINT+SAM_PID_QSPI) /* Quad I/O Serial Peripheral Interface */ #define SAM_IRQ_QSPI (SAM_IRQ_EXTINT+SAM_PID_QSPI) /* Quad I/O Serial Peripheral Interface */
#define SAM_IRQ_UART2 (SAM_IRQ_EXTINT+SAM_PID_UART2) /* Universal Asynchronous Receiver Transmitter 2 */ #define SAM_IRQ_UART2 (SAM_IRQ_EXTINT+SAM_PID_UART2) /* Universal Asynchronous Receiver Transmitter 2 */
#define SAM_IRQ_UART3 (SAM_IRQ_EXTINT+SAM_PID_UART3) /* Universal Asynchronous Receiver Transmitter 3 */ #define SAM_IRQ_UART3 (SAM_IRQ_EXTINT+SAM_PID_UART3) /* Universal Asynchronous Receiver Transmitter 3 */
#define SAM_IRQ_UART4 (SAM_IRQ_EXTINT+SAM_PID_UART4) /* Universal Asynchronous Receiver Transmitter 4 */ #define SAM_IRQ_UART4 (SAM_IRQ_EXTINT+SAM_PID_UART4) /* Universal Asynchronous Receiver Transmitter 4 */

4
arch/arm/include/samv7/samv71_irq.h
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@ -153,11 +153,11 @@
#define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */ #define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */
#define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */ #define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */
#define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */ #define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */
#define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */ #define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */
#define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */ #define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */
#define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */ #define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */
#define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */ #define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */
#define SAM_IRQ_QSPI (SAM_IRQ_EXTINT+SAM_PID_QSPI) /* Quad I/O Serial Peripheral Interface */ #define SAM_IRQ_QSPI (SAM_IRQ_EXTINT+SAM_PID_QSPI) /* Quad I/O Serial Peripheral Interface */
#define SAM_IRQ_UART2 (SAM_IRQ_EXTINT+SAM_PID_UART2) /* Universal Asynchronous Receiver Transmitter 2 */ #define SAM_IRQ_UART2 (SAM_IRQ_EXTINT+SAM_PID_UART2) /* Universal Asynchronous Receiver Transmitter 2 */
#define SAM_IRQ_UART3 (SAM_IRQ_EXTINT+SAM_PID_UART3) /* Universal Asynchronous Receiver Transmitter 3 */ #define SAM_IRQ_UART3 (SAM_IRQ_EXTINT+SAM_PID_UART3) /* Universal Asynchronous Receiver Transmitter 3 */
#define SAM_IRQ_UART4 (SAM_IRQ_EXTINT+SAM_PID_UART4) /* Universal Asynchronous Receiver Transmitter 4 */ #define SAM_IRQ_UART4 (SAM_IRQ_EXTINT+SAM_PID_UART4) /* Universal Asynchronous Receiver Transmitter 4 */

6
arch/arm/src/at32/at32_can_sock.c
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@ -1149,10 +1149,10 @@ static int at32can_txavail(struct net_driver_s *dev)
static int at32can_netdev_ioctl(struct net_driver_s *dev, int cmd, static int at32can_netdev_ioctl(struct net_driver_s *dev, int cmd,
unsigned long arg) unsigned long arg)
{ {
#if 0 #if 0
struct at32_can_s *priv = (struct at32_can_s *)dev->d_private; struct at32_can_s *priv = (struct at32_can_s *)dev->d_private;
#endif #endif
int ret = OK; int ret = OK;
switch (cmd) switch (cmd)
{ {

2
arch/arm/src/at32/at32_eth.c
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@ -4020,7 +4020,7 @@ void arm_netinitialize(void)
#ifdef CONFIG_AT32_CAN2 #ifdef CONFIG_AT32_CAN2
at32_cansockinitialize(2); at32_cansockinitialize(2);
#endif #endif
#endif #endif
} }

2
arch/arm/src/at32/at32_serial.c
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@ -105,7 +105,7 @@
DMA_CCR_MSIZE_8BITS | \ DMA_CCR_MSIZE_8BITS | \
CONFIG_USART_RXDMAPRIO) CONFIG_USART_RXDMAPRIO)
#endif /* SERIAL_HAVE_RXDMA */ #endif /* SERIAL_HAVE_RXDMA */
#ifdef SERIAL_HAVE_TXDMA #ifdef SERIAL_HAVE_TXDMA

4
arch/arm/src/at32/at32f43xx_flash.c
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@ -102,7 +102,7 @@ static void flash_unlock(void)
putreg32(FLASH_KEY2, AT32_FLASH_UNLOCK2); putreg32(FLASH_KEY2, AT32_FLASH_UNLOCK2);
} }
} }
#endif #endif
} }
static void flash_lock(void) static void flash_lock(void)
@ -112,7 +112,7 @@ static void flash_lock(void)
#ifdef AT32_FLASH_BANK2_START #ifdef AT32_FLASH_BANK2_START
if (AT32_FLASH_BANK2_START < AT32_FLASH_NPAGES) if (AT32_FLASH_BANK2_START < AT32_FLASH_NPAGES)
modifyreg32(AT32_FLASH_CTRL2, 0, FLASH_CTRL_OPLK); modifyreg32(AT32_FLASH_CTRL2, 0, FLASH_CTRL_OPLK);
#endif #endif
} }
#if defined(CONFIG_AT32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW) #if defined(CONFIG_AT32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW)

8
arch/arm/src/cxd56xx/cxd56_nxaudio.c
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@ -352,13 +352,13 @@ static int cxd56_start(struct audio_lowerhalf_s *lower,
#ifndef CONFIG_AUDIO_EXCLUDE_STOP #ifndef CONFIG_AUDIO_EXCLUDE_STOP
static int cxd56_stop(struct audio_lowerhalf_s *lower, static int cxd56_stop(struct audio_lowerhalf_s *lower,
void *session); void *session);
#endif /* CONFIG_AUDIO_EXCLUDE_STOP */ #endif /* CONFIG_AUDIO_EXCLUDE_STOP */
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME #ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
static int cxd56_pause(struct audio_lowerhalf_s *lower, static int cxd56_pause(struct audio_lowerhalf_s *lower,
void *session); void *session);
static int cxd56_resume(struct audio_lowerhalf_s *lower, static int cxd56_resume(struct audio_lowerhalf_s *lower,
void *session); void *session);
#endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */ #endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */
static int cxd56_reserve(struct audio_lowerhalf_s *lower, static int cxd56_reserve(struct audio_lowerhalf_s *lower,
void **session); void **session);
static int cxd56_release(struct audio_lowerhalf_s *lower, static int cxd56_release(struct audio_lowerhalf_s *lower,
@ -370,11 +370,11 @@ static int cxd56_configure(struct audio_lowerhalf_s *lower,
static int cxd56_start(struct audio_lowerhalf_s *lower); static int cxd56_start(struct audio_lowerhalf_s *lower);
#ifndef CONFIG_AUDIO_EXCLUDE_STOP #ifndef CONFIG_AUDIO_EXCLUDE_STOP
static int cxd56_stop(struct audio_lowerhalf_s *lower); static int cxd56_stop(struct audio_lowerhalf_s *lower);
#endif /* CONFIG_AUDIO_EXCLUDE_STOP */ #endif /* CONFIG_AUDIO_EXCLUDE_STOP */
#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME #ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME
static int cxd56_pause(struct audio_lowerhalf_s *lower); static int cxd56_pause(struct audio_lowerhalf_s *lower);
static int cxd56_resume(struct audio_lowerhalf_s *lower); static int cxd56_resume(struct audio_lowerhalf_s *lower);
#endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */ #endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */
static int cxd56_reserve(struct audio_lowerhalf_s *lower); static int cxd56_reserve(struct audio_lowerhalf_s *lower);
static int cxd56_release(struct audio_lowerhalf_s *lower); static int cxd56_release(struct audio_lowerhalf_s *lower);
#endif /* CONFIG_AUDIO_MULTI_SESSION */ #endif /* CONFIG_AUDIO_MULTI_SESSION */

2
arch/arm/src/cxd56xx/cxd56_nxaudio.h
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@ -282,7 +282,7 @@ struct cxd56_dev_s
uint32_t samplerate; /* Sample rate */ uint32_t samplerate; /* Sample rate */
#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME #ifndef CONFIG_AUDIO_EXCLUDE_VOLUME
int16_t volume; /* Output volume {0..63} */ int16_t volume; /* Output volume {0..63} */
#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ #endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */
uint8_t channels; /* Number of channels (1..8) */ uint8_t channels; /* Number of channels (1..8) */
uint16_t mic_gain; /* Mic gain */ uint16_t mic_gain; /* Mic gain */

2
arch/arm/src/imxrt/imxrt_lpspi.c
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@ -1584,7 +1584,7 @@ static void imxrt_lpspi_exchange(struct spi_dev_s *dev,
} }
} }
#endif /* CONFIG_IMXRT_SPI_DMA */ #endif /* CONFIG_IMXRT_SPI_DMA */
/**************************************************************************** /****************************************************************************
* Name: imxrt_lpspi_sndblock * Name: imxrt_lpspi_sndblock

2
arch/arm/src/kinetis/kinetis_spi.c
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@ -1275,7 +1275,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
0); 0);
} }
#endif /* CONFIG_KINETIS_SPI_DMA */ #endif /* CONFIG_KINETIS_SPI_DMA */
/**************************************************************************** /****************************************************************************
* Name: spi_sndblock * Name: spi_sndblock
* *

2
arch/arm/src/nrf53/nrf53_adc.h
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@ -159,4 +159,4 @@ struct adc_dev_s *nrf53_adcinitialize(
const struct nrf53_adc_channel_s *chan, const struct nrf53_adc_channel_s *chan,
int channels); int channels);
#endif /* __ARCH_ARM_SRC_NRF53_NRF53_ADC_H */ #endif /* __ARCH_ARM_SRC_NRF53_NRF53_ADC_H */

2
arch/arm/src/nrf53/nrf53_qspi.c
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@ -135,7 +135,7 @@ static const struct qspi_ops_s g_qspi_ops =
.setbits = nrf53_qspi_setbits, .setbits = nrf53_qspi_setbits,
#ifdef CONFIG_QSPI_HWFEATURES #ifdef CONFIG_QSPI_HWFEATURES
.hwfeatures = NULL, .hwfeatures = NULL,
#endif #endif
.command = nrf53_qspi_command, .command = nrf53_qspi_command,
.memory = nrf53_qspi_memory, .memory = nrf53_qspi_memory,
.alloc = nrf53_qspi_alloc, .alloc = nrf53_qspi_alloc,

2
arch/arm/src/nrf91/nrf91_spu.c
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@ -169,7 +169,7 @@ static void nrf91_spu_periph(void)
modifyreg32(NRF91_SPU_GPIOPORTPERM(0), 0xffffffff, 0); modifyreg32(NRF91_SPU_GPIOPORTPERM(0), 0xffffffff, 0);
} }
#endif /* NRF91_CONFIG_NONSECURE */ #endif /* NRF91_CONFIG_NONSECURE */
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions

2
arch/arm/src/phy62xx/core_bumbee_m0.h
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@ -102,4 +102,4 @@ extern "C"
} }
#endif #endif
#endif /* PHY_BUMBEE_M0 */ #endif /* PHY_BUMBEE_M0 */

12
arch/arm/src/rp2040/rp2040_ws2812.c
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@ -412,17 +412,17 @@ static ssize_t my_write(struct file *filep,
/* Copy swapping WWRRGGBB to GGRRBBWW */ /* Copy swapping WWRRGGBB to GGRRBBWW */
#ifdef CONFIG_BIG_ENDIAN #ifdef CONFIG_BIG_ENDIAN
xfer_p[3] = *data++; xfer_p[3] = *data++;
xfer_p[1] = *data++; xfer_p[1] = *data++;
xfer_p[0] = *data++; xfer_p[0] = *data++;
xfer_p[2] = *data++; xfer_p[2] = *data++;
#else /* CONFIG_BIG_ENDIAN */ #else /* CONFIG_BIG_ENDIAN */
xfer_p[1] = *data++; xfer_p[1] = *data++;
xfer_p[3] = *data++; xfer_p[3] = *data++;
xfer_p[2] = *data++; xfer_p[2] = *data++;
xfer_p[0] = *data++; xfer_p[0] = *data++;
#endif /* CONFIG_BIG_ENDIAN */ #endif /* CONFIG_BIG_ENDIAN */
xfer_p += 4; xfer_p += 4;
position += 4; position += 4;
@ -490,17 +490,17 @@ static ssize_t my_read(struct file *filep,
/* Copy swapping GGRRBBWW to WWRRGGBB */ /* Copy swapping GGRRBBWW to WWRRGGBB */
#ifdef CONFIG_BIG_ENDIAN #ifdef CONFIG_BIG_ENDIAN
*data++ = xfer_p[3]; *data++ = xfer_p[3];
*data++ = xfer_p[1]; *data++ = xfer_p[1];
*data++ = xfer_p[0]; *data++ = xfer_p[0];
*data++ = xfer_p[2]; *data++ = xfer_p[2];
#else /* CONFIG_BIG_ENDIAN */ #else /* CONFIG_BIG_ENDIAN */
*data++ = xfer_p[1]; *data++ = xfer_p[1];
*data++ = xfer_p[3]; *data++ = xfer_p[3];
*data++ = xfer_p[2]; *data++ = xfer_p[2];
*data++ = xfer_p[0]; *data++ = xfer_p[0];
#endif /* CONFIG_BIG_ENDIAN */ #endif /* CONFIG_BIG_ENDIAN */
xfer_p += 4; xfer_p += 4;
position += 4; position += 4;

2
arch/arm/src/s32k1xx/s32k1xx_lpspi.c
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@ -1763,7 +1763,7 @@ static void s32k1xx_lpspi_exchange(struct spi_dev_s *dev,
(uintptr_t)rxbuffer + nbytes); (uintptr_t)rxbuffer + nbytes);
} }
#endif /* CONFIG_S32K1XX_SPI_DMA */ #endif /* CONFIG_S32K1XX_SPI_DMA */
/**************************************************************************** /****************************************************************************
* Name: s32k1xx_lpspi_sndblock * Name: s32k1xx_lpspi_sndblock

2
arch/arm/src/s32k3xx/s32k3xx_lpspi.c
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@ -1827,7 +1827,7 @@ static void s32k3xx_lpspi_exchange(struct spi_dev_s *dev,
} }
} }
#endif /* CONFIG_S32K3XX_SPI_DMA */ #endif /* CONFIG_S32K3XX_SPI_DMA */
/**************************************************************************** /****************************************************************************
* Name: s32k3xx_lpspi_sndblock * Name: s32k3xx_lpspi_sndblock

2
arch/arm/src/sama5/sam_spi.c
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@ -302,7 +302,7 @@ static const struct spi_ops_s g_spi0ops =
.setfrequency = spi_setfrequency, .setfrequency = spi_setfrequency,
#ifdef CONFIG_SPI_DELAY_CONTROL #ifdef CONFIG_SPI_DELAY_CONTROL
.setdelay = spi_setdelay, .setdelay = spi_setdelay,
#endif #endif
.setmode = spi_setmode, .setmode = spi_setmode,
.setbits = spi_setbits, .setbits = spi_setbits,
#ifdef CONFIG_SPI_HWFEATURES #ifdef CONFIG_SPI_HWFEATURES

2
arch/arm/src/samv7/hardware/sam_pwm.h
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@ -463,4 +463,4 @@
#define LEBR_PWMHFEN (1 << 18) /* Bit 17: PWMH Falling Edge Enable */ #define LEBR_PWMHFEN (1 << 18) /* Bit 17: PWMH Falling Edge Enable */
#define LEBR_PWMHREN (1 << 19) /* Bit 18: PWMH Rising Edge Enable */ #define LEBR_PWMHREN (1 << 19) /* Bit 18: PWMH Rising Edge Enable */
#endif /* CONFIG_SAMV7_PWM */ #endif /* CONFIG_SAMV7_PWM */

2
arch/arm/src/samv7/sam_qspi_spi.c
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@ -741,7 +741,7 @@ static void qspi_spi_recvblock(struct spi_dev_s *dev, void *buffer,
qspi_spi_exchange(dev, NULL, buffer, nwords); qspi_spi_exchange(dev, NULL, buffer, nwords);
} }
#endif /* CONFIG_SPI_EXCHANGE */ #endif /* CONFIG_SPI_EXCHANGE */
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions

4
arch/arm/src/stm32/hardware/stm32_dbgmcu.h
View File

@ -145,7 +145,7 @@
# define DBGMCU_APB2_TIM10STOP (1 << 3) /* Bit 3: TIM10 stopped when core is halted */ # define DBGMCU_APB2_TIM10STOP (1 << 3) /* Bit 3: TIM10 stopped when core is halted */
# define DBGMCU_APB2_TIM11STOP (1 << 4) /* Bit 4: TIM11 stopped when core is halted */ # define DBGMCU_APB2_TIM11STOP (1 << 4) /* Bit 4: TIM11 stopped when core is halted */
#endif #endif
#endif /* CONFIG_STM32_HAVE_IP_DBGMCU_V2 */ #endif /* CONFIG_STM32_HAVE_IP_DBGMCU_V2 */
#ifdef CONFIG_STM32_HAVE_IP_DBGMCU_V3 #ifdef CONFIG_STM32_HAVE_IP_DBGMCU_V3
@ -178,7 +178,7 @@
# define DBGMCU_APB2_TIM20STOP (1 << 20) /* Bit 20: TIM20 stopped when core is halted */ # define DBGMCU_APB2_TIM20STOP (1 << 20) /* Bit 20: TIM20 stopped when core is halted */
# define DBGMCU_APB2_HRTIMSTOP (1 << 26) /* Bit 20: HRTIM stopped when core is halted */ # define DBGMCU_APB2_HRTIMSTOP (1 << 26) /* Bit 20: HRTIM stopped when core is halted */
#endif /* CONFIG_STM32_HAVE_IP_DBGMCU_V3 */ #endif /* CONFIG_STM32_HAVE_IP_DBGMCU_V3 */
/**************************************************************************** /****************************************************************************
* Public Types * Public Types

2
arch/arm/src/stm32/hardware/stm32f33xxx_comp.h
View File

@ -113,4 +113,4 @@
#define COMP_CSR_OUT (1 << 30) /* Bit 30: comparator output */ #define COMP_CSR_OUT (1 << 30) /* Bit 30: comparator output */
#define COMP_CSR_LOCK (1 << 31) /* Bit 31: comparator lock */ #define COMP_CSR_LOCK (1 << 31) /* Bit 31: comparator lock */
#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F33XXX_COMP_H */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F33XXX_COMP_H */

2
arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h
View File

@ -164,4 +164,4 @@
#define COMP_CSR_VALUE (1 << 30) /* Bit 30: Comparator output status */ #define COMP_CSR_VALUE (1 << 30) /* Bit 30: Comparator output status */
#define COMP_CSR_LOCK (1 << 31) /* Bit 31: Register lock */ #define COMP_CSR_LOCK (1 << 31) /* Bit 31: Register lock */
#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_COMP_H */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_COMP_H */

2
arch/arm/src/stm32/stm32_fdcan_sock.c
View File

@ -3191,7 +3191,7 @@ static int fdcan_netdev_ioctl(struct net_driver_s *dev, int cmd,
return ret; return ret;
} }
#endif /* CONFIG_NETDEV_IOCTL */ #endif /* CONFIG_NETDEV_IOCTL */
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions

6
arch/arm/src/stm32/stm32_foc.c
View File

@ -161,7 +161,7 @@
# if CONFIG_STM32_TIM1_MODE != 2 # if CONFIG_STM32_TIM1_MODE != 2
# error TIM1 must be configured in center-aligned mode 1 # error TIM1 must be configured in center-aligned mode 1
# endif # endif
#endif /* CONFIG_STM32_FOC_FOC0 */ #endif /* CONFIG_STM32_FOC_FOC0 */
/* FOC1 always use TIMER8 for PWM */ /* FOC1 always use TIMER8 for PWM */
@ -901,7 +901,7 @@ static struct stm32_foc_adccmn_s g_stm32_foc_adccmn123 =
.cntr = 0, .cntr = 0,
.lock = NXMUTEX_INITIALIZER, .lock = NXMUTEX_INITIALIZER,
}; };
# endif /* CONFIG_STM32_HAVE_IP_ADC_V1 */ # endif /* CONFIG_STM32_HAVE_IP_ADC_V1 */
# ifdef CONFIG_STM32_HAVE_IP_ADC_V2 # ifdef CONFIG_STM32_HAVE_IP_ADC_V2
# if defined(CONFIG_STM32_HAVE_ADC1) || defined(CONFIG_STM32_HAVE_ADC2) # if defined(CONFIG_STM32_HAVE_ADC1) || defined(CONFIG_STM32_HAVE_ADC2)
@ -2457,7 +2457,7 @@ struct adc_dev_s *stm32_foc_adc_init(struct stm32_foc_adc_s *adc_cfg)
{ {
adc_chan[i] = adc_cfg->chan[i - 1]; adc_chan[i] = adc_cfg->chan[i - 1];
} }
#endif /* CONFIG_STM32_FOC_G4_ADCCHAN0_WORKAROUND */ #endif /* CONFIG_STM32_FOC_G4_ADCCHAN0_WORKAROUND */
/* Get the ADC interface */ /* Get the ADC interface */

4
arch/arm/src/stm32/stm32_serial.c
View File

@ -218,7 +218,7 @@
CONFIG_USART_RXDMAPRIO) CONFIG_USART_RXDMAPRIO)
# endif # endif
#endif /* SERIAL_HAVE_RXDMA */ #endif /* SERIAL_HAVE_RXDMA */
#ifdef SERIAL_HAVE_TXDMA #ifdef SERIAL_HAVE_TXDMA
@ -368,7 +368,7 @@
# error "Unknown STM32 DMA" # error "Unknown STM32 DMA"
# endif # endif
#endif /* SERIAL_HAVE_TXDMA */ #endif /* SERIAL_HAVE_TXDMA */
/* Power management definitions */ /* Power management definitions */

2
arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c
View File

@ -226,7 +226,7 @@ static inline void rcc_enableahb1(void)
regval |= RCC_AHB1ENR_OTGHSEN; regval |= RCC_AHB1ENR_OTGHSEN;
#endif #endif
#endif /* CONFIG_STM32F7_OTGFSHS */ #endif /* CONFIG_STM32F7_OTGFSHS */
putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */ putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */
} }

2
arch/arm/src/stm32h7/stm32_rcc.c
View File

@ -120,7 +120,7 @@ void stm32_clockconfig(void)
stm32_stdclockconfig(); stm32_stdclockconfig();
# endif # endif
#endif /* !CONFIG_STM32H7_BYPASS_CLOCKCONFIG */ #endif /* !CONFIG_STM32H7_BYPASS_CLOCKCONFIG */
/* Enable peripheral clocking */ /* Enable peripheral clocking */

6
arch/arm/src/stm32h7/stm32_spi_slave.c
View File

@ -121,7 +121,7 @@
# if SPI123_KERNEL_CLOCK_FREQ > 200000000 # if SPI123_KERNEL_CLOCK_FREQ > 200000000
# error Not supported SPI123 frequency # error Not supported SPI123 frequency
# endif # endif
#endif /* SPI123 */ #endif /* SPI123 */
#if defined(CONFIG_STM32H7_SPI4_SLAVE) || defined(CONFIG_STM32H7_SPI5_SLAVE) #if defined(CONFIG_STM32H7_SPI4_SLAVE) || defined(CONFIG_STM32H7_SPI5_SLAVE)
# if STM32_RCC_D2CCIP1R_SPI45SRC == RCC_D2CCIP1R_SPI45SEL_APB # if STM32_RCC_D2CCIP1R_SPI45SRC == RCC_D2CCIP1R_SPI45SEL_APB
@ -132,7 +132,7 @@
# if SPI45_KERNEL_CLOCK_FREQ > 100000000 # if SPI45_KERNEL_CLOCK_FREQ > 100000000
# error Not supported SPI45 frequency # error Not supported SPI45 frequency
# endif # endif
#endif /* SPI45 */ #endif /* SPI45 */
#if defined(CONFIG_STM32H7_SPI6_SLAVE) #if defined(CONFIG_STM32H7_SPI6_SLAVE)
# if STM32_RCC_D3CCIPR_SPI6SRC == RCC_D3CCIPR_SPI6SEL_PCLK4 # if STM32_RCC_D3CCIPR_SPI6SRC == RCC_D3CCIPR_SPI6SEL_PCLK4
@ -143,7 +143,7 @@
# if SPI6_KERNEL_CLOCK_FREQ > 100000000 # if SPI6_KERNEL_CLOCK_FREQ > 100000000
# error Not supported SPI6 frequency # error Not supported SPI6 frequency
# endif # endif
#endif /* SPI6 */ #endif /* SPI6 */
#if defined (CONFIG_STM32H7_SPI_SLAVE_QSIZE) #if defined (CONFIG_STM32H7_SPI_SLAVE_QSIZE)
# if CONFIG_STM32H7_SPI_SLAVE_QSIZE > 65535 # if CONFIG_STM32H7_SPI_SLAVE_QSIZE > 65535

12
arch/arm/src/stm32l4/stm32l4_adc.c
View File

@ -1169,7 +1169,7 @@ static void adc_inj_startconv(struct stm32_dev_s *priv, bool enable)
} }
} }
} }
#endif /* ADC_HAVE_INJECTED */ #endif /* ADC_HAVE_INJECTED */
/**************************************************************************** /****************************************************************************
* Name: adc_rccreset * Name: adc_rccreset
@ -2279,7 +2279,7 @@ static int adc3_interrupt(int irq, void *context, void *arg)
return OK; return OK;
} }
#endif #endif
#endif /* CONFIG_STM32L4_ADC_NOIRQ */ #endif /* CONFIG_STM32L4_ADC_NOIRQ */
#ifdef ADC_HAVE_DMA #ifdef ADC_HAVE_DMA
/**************************************************************************** /****************************************************************************
@ -2408,7 +2408,7 @@ static void adc_dmaconvcallback(DMA_HANDLE handle,
adc_modifyreg(priv, STM32L4_ADC_CFGR_OFFSET, 0, ADC_CFGR_DMAEN); adc_modifyreg(priv, STM32L4_ADC_CFGR_OFFSET, 0, ADC_CFGR_DMAEN);
} }
#endif #endif
#endif /* ADC_HAVE_DMA */ #endif /* ADC_HAVE_DMA */
#ifdef CONFIG_STM32L4_ADC_LL_OPS #ifdef CONFIG_STM32L4_ADC_LL_OPS
@ -2589,7 +2589,7 @@ static void adc_llops_dma_stop(struct stm32_adc_dev_s *adc)
} }
} }
#endif /* ADC_HAVE_DMA */ #endif /* ADC_HAVE_DMA */
/**************************************************************************** /****************************************************************************
* Name: adc_llops_extsel_set * Name: adc_llops_extsel_set
@ -2644,7 +2644,7 @@ static void adc_llops_inj_startconv(struct stm32_adc_dev_s *dev,
adc_inj_startconv(priv, enable); adc_inj_startconv(priv, enable);
} }
#endif /* ADC_HAVE_INJECTED */ #endif /* ADC_HAVE_INJECTED */
/**************************************************************************** /****************************************************************************
* Name: adc_llops_dumpregs * Name: adc_llops_dumpregs
@ -2657,7 +2657,7 @@ static void adc_llops_dumpregs(struct stm32_adc_dev_s *dev)
adc_dumpregs(priv); adc_dumpregs(priv);
} }
#endif /* CONFIG_STM32L4_ADC_LL_OPS */ #endif /* CONFIG_STM32L4_ADC_LL_OPS */
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions

2
arch/arm/src/stm32l4/stm32l4_adc.h
View File

@ -582,7 +582,7 @@ struct stm32_adc_ops_s
void (*dump_regs)(struct stm32_adc_dev_s *dev); void (*dump_regs)(struct stm32_adc_dev_s *dev);
}; };
#endif /* CONFIG_STM32L4_ADC_LL_OPS */ #endif /* CONFIG_STM32L4_ADC_LL_OPS */
/**************************************************************************** /****************************************************************************
* Public Function Prototypes * Public Function Prototypes

2
arch/mips/src/pic32mx/pic32mx_decodeirq.c
View File

@ -24,7 +24,7 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <debug.h> #include <debug.h>
#include <stdint.h> #include <stdint.h>
#include <assert.h> #include <assert.h>

2
arch/mips/src/pic32mz/pic32mz_decodeirq.c
View File

@ -24,7 +24,7 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <debug.h> #include <debug.h>
#include <stdint.h> #include <stdint.h>
#include <assert.h> #include <assert.h>

2
arch/risc-v/include/litex/irq.h
View File

@ -29,7 +29,7 @@
#include CONFIG_LITEX_CUSTOM_IRQ_DEFINITIONS_PATH #include CONFIG_LITEX_CUSTOM_IRQ_DEFINITIONS_PATH
#else #else
#include <arch/mode.h> #include <arch/mode.h>
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions

4
arch/xtensa/src/esp32/esp32_wlan.c
View File

@ -1594,7 +1594,7 @@ static int wlan_ioctl(struct net_driver_s *dev,
return ret; return ret;
} }
#endif /* CONFIG_NETDEV_IOCTL */ #endif /* CONFIG_NETDEV_IOCTL */
/**************************************************************************** /****************************************************************************
* Name: esp32_net_initialize * Name: esp32_net_initialize
@ -1923,4 +1923,4 @@ int esp32_wlan_softap_initialize(void)
} }
#endif /* ESP32_WLAN_HAS_SOFTAP */ #endif /* ESP32_WLAN_HAS_SOFTAP */
#endif /* CONFIG_ESP32_WIFI */ #endif /* CONFIG_ESP32_WIFI */

4
arch/xtensa/src/esp32s2/esp32s2_i2s.c
View File

@ -356,12 +356,12 @@ static int i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
static const struct i2s_ops_s g_i2sops = static const struct i2s_ops_s g_i2sops =
{ {
#ifdef I2S_HAVE_TX #ifdef I2S_HAVE_TX
.i2s_txchannels = i2s_txchannels, .i2s_txchannels = i2s_txchannels,
.i2s_txsamplerate = i2s_txsamplerate, .i2s_txsamplerate = i2s_txsamplerate,
.i2s_txdatawidth = i2s_txdatawidth, .i2s_txdatawidth = i2s_txdatawidth,
.i2s_send = i2s_send, .i2s_send = i2s_send,
#endif /* I2S_HAVE_TX */ #endif /* I2S_HAVE_TX */
#ifdef I2S_HAVE_RX #ifdef I2S_HAVE_RX
.i2s_rxchannels = i2s_rxchannels, .i2s_rxchannels = i2s_rxchannels,

4
arch/xtensa/src/esp32s3/esp32s3_wlan.c
View File

@ -1258,7 +1258,7 @@ static int wlan_ioctl(struct net_driver_s *dev,
return ret; return ret;
} }
#endif /* CONFIG_NETDEV_IOCTL */ #endif /* CONFIG_NETDEV_IOCTL */
/**************************************************************************** /****************************************************************************
* Name: esp32s3_net_initialize * Name: esp32s3_net_initialize
@ -1595,4 +1595,4 @@ int esp32s3_wlan_softap_initialize(void)
} }
#endif /* ESP32S3_WLAN_HAS_SOFTAP */ #endif /* ESP32S3_WLAN_HAS_SOFTAP */
#endif /* CONFIG_ESP32S3_WIFI */ #endif /* CONFIG_ESP32S3_WIFI */

4
boards/arm/at32/at32f437-mini/src/at32_gpio.c
View File

@ -101,9 +101,9 @@ static const struct gpio_operations_s gpint_ops =
#if (BOARD_NGPIOIN > 0) #if (BOARD_NGPIOIN > 0)
static const uint32_t g_gpioinputs[BOARD_NGPIOIN] = static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
{ {
#if 0 #if 0
GPIO_IN1, GPIO_IN1,
#endif #endif
}; };
static struct at32gpio_dev_s g_gpin[BOARD_NGPIOIN]; static struct at32gpio_dev_s g_gpin[BOARD_NGPIOIN];

6
boards/arm/at32/at32f437-mini/src/at32_usb.c
View File

@ -141,7 +141,7 @@ void at32_usbinitialize(void)
at32_configgpio(GPIO_OTGFS_VBUS); at32_configgpio(GPIO_OTGFS_VBUS);
at32_configgpio(GPIO_OTGFS_PWRON); at32_configgpio(GPIO_OTGFS_PWRON);
at32_configgpio(GPIO_OTGFS_OVER); at32_configgpio(GPIO_OTGFS_OVER);
#endif #endif
#endif #endif
} }
@ -294,7 +294,7 @@ void at32_usbhost_vbusdrive(int iface, bool enable)
at32_gpiowrite(GPIO_OTGFS_PWRON, true); at32_gpiowrite(GPIO_OTGFS_PWRON, true);
} }
#endif #endif
} }
#endif #endif
@ -320,7 +320,7 @@ int at32_setup_overcurrent(xcpt_t handler, void *arg)
{ {
#ifdef CONFIG_AT32_OTGFS_VBUS_CONTROL #ifdef CONFIG_AT32_OTGFS_VBUS_CONTROL
return at32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg); return at32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
#endif #endif
return 0; return 0;
} }

4
boards/arm/cxd56xx/common/src/cxd56_bmi160_scu.c
View File

@ -165,5 +165,5 @@ int board_bmi160_initialize(int bus)
return ret; return ret;
} }
#endif /* CONFIG_SENSORS_BMI160_SCU_SPI */ #endif /* CONFIG_SENSORS_BMI160_SCU_SPI */
#endif /* CONFIG_SENSORS_BMI160_SCU */ #endif /* CONFIG_SENSORS_BMI160_SCU */

4
boards/arm/cxd56xx/drivers/sensors/cxd5610_gnss.c
View File

@ -46,11 +46,11 @@
#ifndef MIN #ifndef MIN
# define MIN(a,b) (((a) < (b)) ? (a) : (b)) # define MIN(a,b) (((a) < (b)) ? (a) : (b))
#endif /* MIN */ #endif /* MIN */
#ifndef MAX #ifndef MAX
# define MAX(a,b) (((a) > (b)) ? (a) : (b)) # define MAX(a,b) (((a) > (b)) ? (a) : (b))
#endif /* MAX */ #endif /* MAX */
/* Configurations */ /* Configurations */

2
boards/arm/cxd56xx/spresense/include/board_lcdpins.h
View File

@ -143,4 +143,4 @@
#endif #endif
#endif /* __BOARDS_ARM_CXD56XX_SPRESENSE_INCLUDE_BOARD_LCDPINS_H */ #endif /* __BOARDS_ARM_CXD56XX_SPRESENSE_INCLUDE_BOARD_LCDPINS_H */

2
boards/arm/imxrt/imxrt1064-evk/src/imxrt1064-evk.h
View File

@ -329,7 +329,7 @@ int imxrt_flexspi_nor_initialize(void);
#ifdef HAVE_PROGMEM_CHARDEV #ifdef HAVE_PROGMEM_CHARDEV
int imxrt_progmem_init(void); int imxrt_progmem_init(void);
#endif /* HAVE_PROGMEM_CHARDEV */ #endif /* HAVE_PROGMEM_CHARDEV */
#endif #endif
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */

2
boards/arm/imxrt/teensy-4.x/src/imxrt_autoleds.c
View File

@ -161,4 +161,4 @@ void board_autoled_off(int led)
imxrt_gpio_write(GPIO_LED, false); /* Low illuminates */ imxrt_gpio_write(GPIO_LED, false); /* Low illuminates */
} }
#endif /* CONFIG_ARCH_LEDS */ #endif /* CONFIG_ARCH_LEDS */

2
boards/arm/imxrt/teensy-4.x/src/imxrt_boot.c
View File

@ -115,4 +115,4 @@ void board_late_initialize(void)
imxrt_bringup(); imxrt_bringup();
} }
#endif /* CONFIG_BOARD_LATE_INITIALIZE */ #endif /* CONFIG_BOARD_LATE_INITIALIZE */

4
boards/arm/imxrt/teensy-4.x/src/teensy-4.h
View File

@ -268,5 +268,5 @@ void imxrt_i2c_setup(void);
void imxrt_autoled_initialize(void); void imxrt_autoled_initialize(void);
#endif #endif
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_TEENSY_4X_SRC_TEENSY_4_H */ #endif /* __BOARDS_ARM_TEENSY_4X_SRC_TEENSY_4_H */

2
boards/arm/s32k1xx/rddrone-bms772/include/board.h
View File

@ -147,4 +147,4 @@
#define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */ #define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */
#define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */ #define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */
#endif /* __BOARDS_ARM_S32K1XX_RDDRONE_BMS772_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_RDDRONE_BMS772_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/s32k118evb/include/board.h
View File

@ -129,4 +129,4 @@
#define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */ #define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */
#define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */ #define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */
#endif /* __BOARDS_ARM_S32K1XX_S32K118EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K118EVB_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/s32k144evb/include/board.h
View File

@ -131,4 +131,4 @@
#define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */ #define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */
#define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */ #define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */
#endif /* __BOARDS_ARM_S32K1XX_S32K144EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K144EVB_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/s32k146evb/include/board.h
View File

@ -131,4 +131,4 @@
#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ #define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */
#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ #define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */
#endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/s32k148evb/include/board.h
View File

@ -131,4 +131,4 @@
#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ #define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */
#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ #define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */
#endif /* __BOARDS_ARM_S32K1XX_S32K148EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K148EVB_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/ucans32k146/include/board.h
View File

@ -158,4 +158,4 @@
#define PIN_CAN1_TX PIN_CAN1_TX_1 /* PTA13 */ #define PIN_CAN1_TX PIN_CAN1_TX_1 /* PTA13 */
#define PIN_CAN1_STB (PIN_PTE10 | GPIO_OUTPUT) #define PIN_CAN1_STB (PIN_PTE10 | GPIO_OUTPUT)
#endif /* __BOARDS_ARM_S32K1XX_UCANS32K146_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_UCANS32K146_INCLUDE_BOARD_H */

2
boards/arm/s32k3xx/mr-canhubk3/include/board.h
View File

@ -321,4 +321,4 @@
#define PIN_EMAC_MII_RMII_MDIO PIN_EMAC_MII_RMII_MDIO_2 /* PTD16 */ #define PIN_EMAC_MII_RMII_MDIO PIN_EMAC_MII_RMII_MDIO_2 /* PTD16 */
#define PIN_EMAC_MII_RMII_TX_CLK PIN_EMAC_MII_RMII_TX_CLK_2 /* PTD6 */ #define PIN_EMAC_MII_RMII_TX_CLK PIN_EMAC_MII_RMII_TX_CLK_2 /* PTD6 */
#endif /* __BOARDS_ARM_S32K3XX_MR_CANHUBK3_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K3XX_MR_CANHUBK3_INCLUDE_BOARD_H */

2
boards/arm/s32k3xx/s32k344evb/include/board.h
View File

@ -165,4 +165,4 @@
#define PIN_CAN0_TX PIN_CAN0_TX_1 /* PTA7 */ #define PIN_CAN0_TX PIN_CAN0_TX_1 /* PTA7 */
#define PIN_CAN0_RX PIN_CAN0_RX_1 /* PTA6 */ #define PIN_CAN0_RX PIN_CAN0_RX_1 /* PTA6 */
#endif /* __BOARDS_ARM_S32K3XX_S32K344EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K3XX_S32K344EVB_INCLUDE_BOARD_H */

2
boards/arm/sama5/giant-board/include/board_492mhz.h
View File

@ -204,4 +204,4 @@ extern "C"
#endif #endif
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_492MHZ_H */ #endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_492MHZ_H */

2
boards/arm/sama5/jupiter-nano/include/board_498mhz.h
View File

@ -203,4 +203,4 @@ extern "C"
#endif #endif
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_498MHZ_H */ #endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_498MHZ_H */

4
boards/arm/stm32/b-g431b-esc1/include/board.h
View File

@ -122,7 +122,7 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#endif /* CONFIG_BOARD_STM32_BG431BESC1_USE_HSI */ #endif /* CONFIG_BOARD_STM32_BG431BESC1_USE_HSI */
#ifdef CONFIG_BOARD_STM32_BG431BESC1_USE_HSE #ifdef CONFIG_BOARD_STM32_BG431BESC1_USE_HSE
@ -206,7 +206,7 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#endif /* CONFIG_BOARD_STM32_BG431BESC1_USE_HSE */ #endif /* CONFIG_BOARD_STM32_BG431BESC1_USE_HSE */
/* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */ /* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */

2
boards/arm/stm32/nucleo-f103rb/include/board.h
View File

@ -207,6 +207,6 @@
# define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \ # define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5) GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5)
#endif /* CONFIG_BOARD_STM32_IHM07M1 */ #endif /* CONFIG_BOARD_STM32_IHM07M1 */
#endif /* __BOARDS_ARM_STM32_NUCLEO_F103RB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_STM32_NUCLEO_F103RB_INCLUDE_BOARD_H */

2
boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c
View File

@ -109,4 +109,4 @@ int stm32_dac_setup(void)
return OK; return OK;
} }
#endif /* CONFIG_DAC */ #endif /* CONFIG_DAC */

6
boards/arm/stm32/nucleo-g431rb/include/board.h
View File

@ -122,7 +122,7 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#endif /* CONFIG_BOARD_NUCLEO_G431RB_USE_HSI */ #endif /* CONFIG_BOARD_NUCLEO_G431RB_USE_HSI */
#ifdef CONFIG_BOARD_NUCLEO_G431RB_USE_HSE #ifdef CONFIG_BOARD_NUCLEO_G431RB_USE_HSE
@ -206,7 +206,7 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#endif /* CONFIG_BOARD_NUCLEO_G431RB_USE_HSE */ #endif /* CONFIG_BOARD_NUCLEO_G431RB_USE_HSE */
/* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */ /* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */
@ -392,6 +392,6 @@
# define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \ # define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN12) GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN12)
#endif /* CONFIG_BOARD_STM32_IHM16M1 */ #endif /* CONFIG_BOARD_STM32_IHM16M1 */
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_INCLUDE_BOARD_H */

2
boards/arm/stm32h7/nucleo-h743zi/src/nucleo-h743zi.h
View File

@ -388,7 +388,7 @@ int stm32_pwm_setup(void);
#ifdef HAVE_PROGMEM_CHARDEV #ifdef HAVE_PROGMEM_CHARDEV
int stm32_progmem_init(void); int stm32_progmem_init(void);
#endif /* HAVE_PROGMEM_CHARDEV */ #endif /* HAVE_PROGMEM_CHARDEV */
#endif #endif
/**************************************************************************** /****************************************************************************

4
boards/xtensa/esp32/esp32-audio-kit/src/esp32_bringup.c
View File

@ -368,7 +368,7 @@ int esp32_bringup(void)
} }
#endif /* CONFIG_AUDIO_ES8388 */ #endif /* CONFIG_AUDIO_ES8388 */
#endif /* CONFIG_ESP32_I2S0 */ #endif /* CONFIG_ESP32_I2S0 */
#ifdef CONFIG_ESP32_I2S1 #ifdef CONFIG_ESP32_I2S1
@ -381,7 +381,7 @@ int esp32_bringup(void)
CONFIG_ESP32_I2S0, ret); CONFIG_ESP32_I2S0, ret);
} }
#endif /* CONFIG_ESP32_I2S1 */ #endif /* CONFIG_ESP32_I2S1 */
#endif /* CONFIG_ESP32_I2S */ #endif /* CONFIG_ESP32_I2S */

4
boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c
View File

@ -550,7 +550,7 @@ int esp32_bringup(void)
#endif /* CONFIG_AUDIO_CS4344 */ #endif /* CONFIG_AUDIO_CS4344 */
#endif /* CONFIG_ESP32_I2S0 */ #endif /* CONFIG_ESP32_I2S0 */
#ifdef CONFIG_ESP32_I2S1 #ifdef CONFIG_ESP32_I2S1
@ -575,7 +575,7 @@ int esp32_bringup(void)
CONFIG_ESP32_I2S1, ret); CONFIG_ESP32_I2S1, ret);
} }
#endif /* CONFIG_ESP32_I2S1 */ #endif /* CONFIG_ESP32_I2S1 */
#endif /* CONFIG_ESP32_I2S */ #endif /* CONFIG_ESP32_I2S */

4
boards/xtensa/esp32/esp32-lyrat/src/esp32_bringup.c
View File

@ -368,7 +368,7 @@ int esp32_bringup(void)
} }
#endif /* CONFIG_AUDIO_ES8388 */ #endif /* CONFIG_AUDIO_ES8388 */
#endif /* CONFIG_ESP32_I2S0 */ #endif /* CONFIG_ESP32_I2S0 */
#ifdef CONFIG_ESP32_I2S1 #ifdef CONFIG_ESP32_I2S1
@ -381,7 +381,7 @@ int esp32_bringup(void)
CONFIG_ESP32_I2S0, ret); CONFIG_ESP32_I2S0, ret);
} }
#endif /* CONFIG_ESP32_I2S1 */ #endif /* CONFIG_ESP32_I2S1 */
#endif /* CONFIG_ESP32_I2S */ #endif /* CONFIG_ESP32_I2S */

4
boards/xtensa/esp32/esp32-pico-kit/src/esp32_bringup.c
View File

@ -388,7 +388,7 @@ int esp32_bringup(void)
CONFIG_ESP32_I2S0, ret); CONFIG_ESP32_I2S0, ret);
} }
#endif /* CONFIG_ESP32_I2S0 */ #endif /* CONFIG_ESP32_I2S0 */
#ifdef CONFIG_ESP32_I2S1 #ifdef CONFIG_ESP32_I2S1
@ -413,7 +413,7 @@ int esp32_bringup(void)
CONFIG_ESP32_I2S1, ret); CONFIG_ESP32_I2S1, ret);
} }
#endif /* CONFIG_ESP32_I2S1 */ #endif /* CONFIG_ESP32_I2S1 */
#endif /* CONFIG_ESP32_I2S */ #endif /* CONFIG_ESP32_I2S */

2
boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
View File

@ -316,7 +316,7 @@ int esp32s3_bringup(void)
CONFIG_ESP32S3_I2S1, ret); CONFIG_ESP32S3_I2S1, ret);
} }
#endif /* CONFIG_ESP32S3_I2S1 */ #endif /* CONFIG_ESP32S3_I2S1 */
#endif /* CONFIG_ESP32S3_I2S */ #endif /* CONFIG_ESP32S3_I2S */

4
drivers/audio/wm8994.h
View File

@ -1610,9 +1610,9 @@ struct wm8994_dev_s
#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME #ifndef CONFIG_AUDIO_EXCLUDE_VOLUME
#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE #ifndef CONFIG_AUDIO_EXCLUDE_BALANCE
uint16_t balance; /* Current balance level (b16) */ uint16_t balance; /* Current balance level (b16) */
#endif /* CONFIG_AUDIO_EXCLUDE_BALANCE */ #endif /* CONFIG_AUDIO_EXCLUDE_BALANCE */
uint8_t volume; /* Current volume level {0..63} */ uint8_t volume; /* Current volume level {0..63} */
#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ #endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */
uint8_t nchannels; /* Number of channels (1 or 2) */ uint8_t nchannels; /* Number of channels (1 or 2) */
uint8_t bpsamp; /* Bits per sample (8 or 16) */ uint8_t bpsamp; /* Bits per sample (8 or 16) */
volatile uint8_t inflight; /* Number of audio buffers in-flight */ volatile uint8_t inflight; /* Number of audio buffers in-flight */

2
drivers/modem/alt1250/alt1250.h
View File

@ -56,4 +56,4 @@
uint64_t get_event_lapibuffer(FAR struct alt1250_dev_s *dev, uint64_t get_event_lapibuffer(FAR struct alt1250_dev_s *dev,
uint32_t lapicmdid, alt_evtbuf_inst_t **inst); uint32_t lapicmdid, alt_evtbuf_inst_t **inst);
#endif /* __DRIVERS_MODEM_ALT1250_ALT1250_H */ #endif /* __DRIVERS_MODEM_ALT1250_ALT1250_H */

2
sched/sched/sched_get_stackinfo.c
View File

@ -61,7 +61,7 @@ int nxsched_get_stackinfo(pid_t pid, FAR struct stackinfo_s *stackinfo)
DEBUGASSERT(rtcb != NULL && stackinfo != NULL); DEBUGASSERT(rtcb != NULL && stackinfo != NULL);
/* Pid of 0 means that we are querying ourself */ /* Pid of 0 means that we are querying ourself */
if (pid == 0) if (pid == 0)
{ {

6
sched/task/task_exit.c
View File

@ -22,11 +22,11 @@
* Included Files * Included Files
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sched.h> #include <sched.h>
#include "sched/sched.h" #include "sched/sched.h"
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
# include "irq/irq.h" # include "irq/irq.h"

107
tools/kconfig2html.c
View File

@ -196,7 +196,8 @@ static int g_menu_number;
static int g_choice_number; static int g_choice_number;
static int g_toggle_number; static int g_toggle_number;
static const char g_delimiters[] = " ,"; static const char g_delimiters[] =
" ,";
static struct reserved_s g_reserved[] = static struct reserved_s g_reserved[] =
{ {
@ -225,7 +226,7 @@ static struct reserved_s g_reserved[] =
{TOKEN_SOURCE, "source"}, {TOKEN_SOURCE, "source"},
{TOKEN_IF, "if"}, {TOKEN_IF, "if"},
{TOKEN_ENDIF, "endif"}, {TOKEN_ENDIF, "endif"},
{TOKEN_NOTRESERVED, NULL} /* Terminates list */ {TOKEN_NOTRESERVED, NULL}
}; };
/**************************************************************************** /****************************************************************************
@ -898,7 +899,7 @@ static char *get_token(void)
if (*pbegin == '"') if (*pbegin == '"')
{ {
/* Search for the trailing quotation mark */ /* Search for the trailing quotation mark */
pend = findchar(pbegin + 1, '"'); pend = findchar(pbegin + 1, '"');
@ -1869,7 +1870,8 @@ static inline char *process_config(FILE *stream, const char *varname,
if (config.c_select.s_nvar > 0) if (config.c_select.s_nvar > 0)
{ {
outfunc(" <li><i>Selects</i>: <a href=\"#CONFIG_%s\"><code>CONFIG_%s</code></a>", outfunc(" <li><i>Selects</i>: <a href=\"#CONFIG_%s\">"
"<code>CONFIG_%s</code></a>",
config.c_select.s_varname[0], config.c_select.s_varname[0]); config.c_select.s_varname[0], config.c_select.s_varname[0]);
for (i = 1; i < config.c_select.s_nvar; i++) for (i = 1; i < config.c_select.s_nvar; i++)
@ -2168,14 +2170,16 @@ static inline char *process_menu(FILE *stream, const char *kconfigdir,
paranum = get_paranum(); paranum = get_paranum();
if (menu.m_name) if (menu.m_name)
{ {
output("<li><a name=\"menu_%d_toc\"><a href=\"#menu_%d\">%s Menu: %s</a></a></li>\n", output("<li><a name=\"menu_%d_toc\">"
"<a href=\"#menu_%d\">%s Menu: %s</a></a></li>\n",
g_menu_number, g_menu_number, paranum, menu.m_name); g_menu_number, g_menu_number, paranum, menu.m_name);
body("\n<h1><a name=\"menu_%d\">%s Menu: %s</a></h1>\n", body("\n<h1><a name=\"menu_%d\">%s Menu: %s</a></h1>\n",
g_menu_number, paranum, menu.m_name); g_menu_number, paranum, menu.m_name);
} }
else else
{ {
output("<li><a name=\"menu_%d_toc\"><a href=\"#menu_%d\">%s Menu</a></a></li>\n", output("<li><a name=\"menu_%d_toc\">"
"<a href=\"#menu_%d\">%s Menu</a></a></li>\n",
g_menu_number, g_menu_number, paranum); g_menu_number, g_menu_number, paranum);
body("\n<h1><a name=\"menu_%d\">%s Menu</a></h1>\n", body("\n<h1><a name=\"menu_%d\">%s Menu</a></h1>\n",
g_menu_number, paranum); g_menu_number, paranum);
@ -2186,10 +2190,13 @@ static inline char *process_menu(FILE *stream, const char *kconfigdir,
*/ */
#ifdef USE_JQUERY #ifdef USE_JQUERY
output("<a id=\"link_%d\" href=\"#menu_%d_toc\" onclick=\"toggle('toggle_%d', 'link_%d')\">Expand</a>\n", output("<a id=\"link_%d\" "
"href=\"#menu_%d_toc\" onclick=\"toggle('toggle_%d', 'link_%d')\">"
"Expand</a>\n",
g_menu_number, g_toggle_number, g_toggle_number); g_menu_number, g_toggle_number, g_toggle_number);
#else #else
output("<a href=\"#menu_%d_toc\" onclick=\"toggle('toggle_%d', this)\">Expand</a>\n", output("<a href=\"#menu_%d_toc\" onclick=\"toggle('toggle_%d', this)\">"
"Expand</a>\n",
g_menu_number, g_toggle_number); g_menu_number, g_toggle_number);
#endif #endif
output("<ul id=\"toggle_%d\" style=\"display:none\">\n", output("<ul id=\"toggle_%d\" style=\"display:none\">\n",
@ -2293,17 +2300,20 @@ static char *parse_kconfigfile(FILE *stream, const char *kconfigdir,
*appsdir = '\0'; *appsdir = '\0';
asprintf(&dirpath, "%s/%s%s%s", asprintf(&dirpath, "%s/%s%s%s",
g_kconfigroot, subdir, g_appsdir, tmp); g_kconfigroot, subdir,
g_appsdir, tmp);
} }
else else
{ {
asprintf(&dirpath, "%s/%s", g_kconfigroot, subdir); asprintf(&dirpath, "%s/%s",
g_kconfigroot, subdir);
} }
} }
configname = strdup(configname); configname = strdup(configname);
debug("parse_kconfigfile: Recursing for TOKEN_SOURCE\n"); debug("parse_kconfigfile: "
"Recursing for TOKEN_SOURCE\n");
debug(" source: %s\n", source); debug(" source: %s\n", source);
debug(" subdir: %s\n", subdir); debug(" subdir: %s\n", subdir);
debug(" dirpath: %s\n", dirpath); debug(" dirpath: %s\n", dirpath);
@ -2317,8 +2327,8 @@ static char *parse_kconfigfile(FILE *stream, const char *kconfigdir,
free(configname); free(configname);
} }
/* Set the token string to NULL to indicate that we need to read /* Set the token string to NULL to indicate that
* the next line * we need to read the next line
*/ */
token = NULL; token = NULL;
@ -2371,8 +2381,8 @@ static char *parse_kconfigfile(FILE *stream, const char *kconfigdir,
case TOKEN_ENDMENU: case TOKEN_ENDMENU:
{ {
/* Reduce table of contents indentation level. NOTE that /* Reduce table of contents indentation level. NOTE that
* this also terminates the toggle block that began with the * this also terminates the toggle block that
* matching <ul> * began with the matching <ul>
*/ */
output("</ul>\n"); output("</ul>\n");
@ -2588,14 +2598,16 @@ int main(int argc, char **argv, char **envp)
output("<table width =\"100%%\">\n"); output("<table width =\"100%%\">\n");
output("<tr align=\"center\" bgcolor=\"#e4e4e4\">\n"); output("<tr align=\"center\" bgcolor=\"#e4e4e4\">\n");
output("<td>\n"); output("<td>\n");
output("<h1><big><font color=\"#3c34ec\"><i>NuttX Configuration Variables</i></font></big></h1>\n"); output("<h1><big><font color=\"#3c34ec\">"
"<i>NuttX Configuration Variables</i></font></big></h1>\n");
output("<p>Last Updated: %s</p>\n", g_scratch); output("<p>Last Updated: %s</p>\n", g_scratch);
output("</td>\n"); output("</td>\n");
output("</tr>\n"); output("</tr>\n");
output("</table>\n"); output("</table>\n");
#ifdef USE_JQUERY #ifdef USE_JQUERY
output("<script src=\"http://code.jquery.com/jquery-1.9.1.js\"></script>\n"); output("<script src=\"http://code.jquery.com/jquery-1.9.1.js\">"
"</script>\n");
output("<script type=\"text/javascript\">\n"); output("<script type=\"text/javascript\">\n");
output("function toggle(list_id, link_id) {\n"); output("function toggle(list_id, link_id) {\n");
output(" var list = $('#' + list_id);\n"); output(" var list = $('#' + list_id);\n");
@ -2661,24 +2673,39 @@ int main(int argc, char **argv, char **envp)
body("<p>\n"); body("<p>\n");
body(" <b>Overview</b>.\n"); body(" <b>Overview</b>.\n");
body(" The NuttX RTOS is highly configurable.\n"); body(" The NuttX RTOS is highly configurable.\n");
body(" The NuttX configuration files are maintained using the <a href=\"https://bitbucket.org/nuttx/tools/src/master/kconfig-frontends\">kconfig-frontends</a> tool.\n"); body(" The NuttX configuration files are maintained using the "
body(" That configuration tool uses <code>Kconfig</code> files that can be found through the NuttX source tree.\n"); "kconfig-frontends</a> tool.\n");
body(" Each <code>Kconfig</code> files contains declarations of configuration variables.\n"); body(" That configuration tool uses <code>Kconfig</code> "
body(" Each configuration variable provides one configuration option for the NuttX RTOS.\n"); "files that can be found through the NuttX source tree.\n");
body(" Each <code>Kconfig</code> files contains "
"declarations of configuration variables.\n");
body(" Each configuration variable provides one configuration "
"option for the NuttX RTOS.\n");
body(" This configurable options are described in this document.\n"); body(" This configurable options are described in this document.\n");
body("</p>\n"); body("</p>\n");
body("<p>\n"); body("<p>\n");
body(" <b>Main Menu</b>.\n"); body(" <b>Main Menu</b>.\n");
body(" The normal way to start the NuttX configuration is to enter this command line from the NuttX build directory: <code>make menuconfig</code>.\n"); body(" The normal way to start the NuttX configuration is to enter "
body(" Note that NuttX must first be configured <i>before</i> this command so that the configuration file (<code>.config</code>) is present in the top-level build directory.\n"); "this command line from the NuttX build directory: "
body(" The main menu is the name give to the opening menu display after this command is executed.\n"); "<code>make menuconfig</code>.\n");
body(" Note that NuttX must first be configured <i>before</i> "
"this command so that the configuration file (<code>.config</code>) "
"is present in the top-level build directory.\n");
body(" The main menu is the name give to the opening menu display "
"after this command is executed.\n");
body("</p>\n"); body("</p>\n");
body("<p>\n"); body("<p>\n");
body(" <b>Maintenance Note</b>.\n"); body(" <b>Maintenance Note</b>.\n");
body(" This documentation was auto-generated using the <a href=\"https://bitbucket.org/nuttx/nuttx/src/master/tools/kconfig2html.c\">kconfig2html</a> tool\n"); body(" This documentation was auto-generated using the "
body(" That tool analyzes the NuttX <code>Kconfig</code> files and generates this HTML document.\n"); "kconfig2html tool\n");
body(" That tool analyzes the NuttX <code>Kconfig</code> "
"files and generates this HTML document.\n");
body(" This HTML document file should not be edited manually.\n"); body(" This HTML document file should not be edited manually.\n");
body(" In order to make changes to this document, you should instead modify the <code>Kconfig</code> file(s) that were used to generated this document and then execute the <code>kconfig2html</code> again to regenerate the HTML document file.\n"); body(" In order to make changes to this document, "
"you should instead modify the <code>Kconfig</code> file(s) "
"that were used to generated this document and then execute the "
"<code>kconfig2html</code> again "
"to regenerate the HTML document file.\n");
body("</p>\n"); body("</p>\n");
/* Process the Kconfig files through recursive descent */ /* Process the Kconfig files through recursive descent */
@ -2687,7 +2714,8 @@ int main(int argc, char **argv, char **envp)
/* Terminate the table of contents */ /* Terminate the table of contents */
output("<li><a href=\"#appendixa\">Appendix A: Hidden Configuration Variables</a></li>\n"); output("<li><a href=\"#appendixa\">"
"Appendix A: Hidden Configuration Variables</a></li>\n");
output("</ul>\n"); output("</ul>\n");
/* Close the HMTL body file and copy it to the output file */ /* Close the HMTL body file and copy it to the output file */
@ -2700,17 +2728,28 @@ int main(int argc, char **argv, char **envp)
output("<table width =\"100%%\">\n"); output("<table width =\"100%%\">\n");
output(" <tr bgcolor=\"#e4e4e4\">\n"); output(" <tr bgcolor=\"#e4e4e4\">\n");
output(" <td>\n"); output(" <td>\n");
output(" <a name=\"appendixa\"><h1>Appendix A: Hidden Configuration Variables</h1></a>\n"); output(" <a name=\"appendixa\">"
"<h1>Appendix A: Hidden Configuration Variables</h1></a>\n");
output(" </td>\n"); output(" </td>\n");
output(" </tr>\n"); output(" </tr>\n");
output("</table>\n"); output("</table>\n");
output("<p>\n"); output("<p>\n");
output(" This appendix holds internal configurations variables that are not visible to the user.\n"); output(" This appendix holds internal configurations variables that "
output(" These settings are presented out-of-context because they cannot be directly controlled by the user.\n"); "are not visible to the user.\n");
output(" Many of these settings are selected automatically and indirectly when other, visible configuration variables are selected.\n"); output(" These settings are presented out-of-context because "
output(" One purpose of these hidden configuration variables is to control menuing in the kconfig-frontends configuration tool.\n"); "they cannot be directly controlled by the user.\n");
output(" Many configuration variables with a form like <code>CONFIG_ARCH_HAVE_</code><i>feature</i>, for example, are used only to indicate that the selected architecture supports <i>feature</i> and so addition selection associated with <i>feature</i> will become accessible to the user.\n"); output(" Many of these settings are selected automatically and "
"indirectly when other, visible configuration variables "
"are selected.\n");
output(" One purpose of these hidden configuration variables "
"is to control menuing in the kconfig-frontends "
"configuration tool.\n");
output(" Many configuration variables with a form like "
"<code>CONFIG_ARCH_HAVE_</code><i>feature</i>, for example, "
"are used only to indicate that the selected architecture supports "
"<i>feature</i> and so addition selection associated with "
"<i>feature</i> will become accessible to the user.\n");
output("</p>\n"); output("</p>\n");
output("<ul>\n"); output("<ul>\n");

2
tools/nxstyle.c
View File

@ -1924,7 +1924,7 @@ int main(int argc, char **argv, char **envp)
strncmp(&line[indent], "goto ", 5) == 0 || strncmp(&line[indent], "goto ", 5) == 0 ||
strncmp(&line[indent], "if ", 3) == 0 || strncmp(&line[indent], "if ", 3) == 0 ||
strncmp(&line[indent], "return ", 7) == 0 || strncmp(&line[indent], "return ", 7) == 0 ||
#if 0 /* Doesn't follow pattern */ #if 0 /* Doesn't follow pattern */
strncmp(&line[indent], "switch ", 7) == 0 || strncmp(&line[indent], "switch ", 7) == 0 ||
#endif #endif
strncmp(&line[indent], "while ", 6) == 0) strncmp(&line[indent], "while ", 6) == 0)