arch/xtensa/esp32s2: switch from semaphore to mutex for exclusive access
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
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c415ce518f
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c4cf1eeb2b
@ -38,7 +38,7 @@
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#include <nuttx/arch.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/irq.h>
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#include <nuttx/clock.h>
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#include <nuttx/clock.h>
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#include <nuttx/semaphore.h>
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#include <nuttx/mutex.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/spi/spi.h>
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@ -150,7 +150,7 @@ struct esp32s2_spi_priv_s
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const struct esp32s2_spi_config_s *config;
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const struct esp32s2_spi_config_s *config;
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int refs; /* Reference count */
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int refs; /* Reference count */
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sem_t exclsem; /* Held while chip is selected for mutual exclusion */
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mutex_t lock; /* Held while chip is selected for mutual exclusion */
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#if defined(CONFIG_ESP32S2_SPI2_DMA) || defined(CONFIG_ESP32S2_SPI3_DMA)
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#if defined(CONFIG_ESP32S2_SPI2_DMA) || defined(CONFIG_ESP32S2_SPI3_DMA)
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sem_t sem_isr; /* Interrupt wait semaphore */
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sem_t sem_isr; /* Interrupt wait semaphore */
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int cpuint; /* SPI interrupt ID */
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int cpuint; /* SPI interrupt ID */
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@ -356,7 +356,7 @@ static struct esp32s2_spi_priv_s esp32s2_spi2_priv =
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},
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},
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.config = &esp32s2_spi2_config,
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.config = &esp32s2_spi2_config,
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.refs = 0,
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.refs = 0,
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.exclsem = SEM_INITIALIZER(0),
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.lock = NXMUTEX_INITIALIZER,
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#ifdef CONFIG_ESP32S2_SPI2_DMA
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#ifdef CONFIG_ESP32S2_SPI2_DMA
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.sem_isr = SEM_INITIALIZER(0),
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.sem_isr = SEM_INITIALIZER(0),
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.cpuint = -ENOMEM,
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.cpuint = -ENOMEM,
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@ -441,7 +441,7 @@ static struct esp32s2_spi_priv_s esp32s2_spi3_priv =
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},
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},
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.config = &esp32s2_spi3_config,
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.config = &esp32s2_spi3_config,
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.refs = 0,
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.refs = 0,
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.exclsem = SEM_INITIALIZER(0),
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.lock = NXMUTEX_INITIALIZER,
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#ifdef CONFIG_ESP32S2_SPI3_DMA
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#ifdef CONFIG_ESP32S2_SPI3_DMA
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.sem_isr = SEM_INITIALIZER(0),
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.sem_isr = SEM_INITIALIZER(0),
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.cpuint = -ENOMEM,
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.cpuint = -ENOMEM,
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@ -563,11 +563,11 @@ static int esp32s2_spi_lock(struct spi_dev_s *dev, bool lock)
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if (lock)
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if (lock)
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{
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{
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ret = nxsem_wait_uninterruptible(&priv->exclsem);
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ret = nxmutex_lock(&priv->lock);
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}
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}
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else
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else
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{
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{
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ret = nxsem_post(&priv->exclsem);
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ret = nxmutex_unlock(&priv->lock);
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}
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}
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return ret;
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return ret;
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@ -895,7 +895,7 @@ static int esp32s2_spi_hwfeatures(struct spi_dev_s *dev,
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* uint16_t's
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* uint16_t's
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*
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*
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* Returned Value:
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* Returned Value:
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* None
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* None.
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*
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*
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****************************************************************************/
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****************************************************************************/
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@ -1365,10 +1365,6 @@ static void esp32s2_spi_init(struct spi_dev_s *dev)
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const uint32_t id = config->id;
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const uint32_t id = config->id;
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uint32_t regval;
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uint32_t regval;
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/* Initialize the SPI semaphore that enforces mutually exclusive access */
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nxsem_init(&priv->exclsem, 0, 1);
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esp32s2_gpiowrite(config->cs_pin, true);
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esp32s2_gpiowrite(config->cs_pin, true);
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esp32s2_gpiowrite(config->mosi_pin, true);
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esp32s2_gpiowrite(config->mosi_pin, true);
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esp32s2_gpiowrite(config->miso_pin, true);
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esp32s2_gpiowrite(config->miso_pin, true);
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@ -1519,7 +1515,6 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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{
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{
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struct spi_dev_s *spi_dev;
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struct spi_dev_s *spi_dev;
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struct esp32s2_spi_priv_s *priv;
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struct esp32s2_spi_priv_s *priv;
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irqstate_t flags;
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switch (port)
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switch (port)
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{
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{
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@ -1539,12 +1534,11 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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spi_dev = (struct spi_dev_s *)priv;
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spi_dev = (struct spi_dev_s *)priv;
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flags = enter_critical_section();
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nxmutex_lock(&priv->lock);
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if (priv->refs != 0)
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if (priv->refs != 0)
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{
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{
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leave_critical_section(flags);
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priv->refs++;
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nxmutex_unlock(&priv->lock);
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return spi_dev;
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return spi_dev;
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}
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}
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@ -1571,8 +1565,7 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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{
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{
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/* Failed to allocate a CPU interrupt of this type. */
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/* Failed to allocate a CPU interrupt of this type. */
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leave_critical_section(flags);
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nxmutex_unlock(&priv->lock);
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return NULL;
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return NULL;
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}
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}
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@ -1584,7 +1577,7 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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priv->cpuint = -ENOMEM;
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priv->cpuint = -ENOMEM;
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leave_critical_section(flags);
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nxmutex_unlock(&priv->lock);
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return NULL;
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return NULL;
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}
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}
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@ -1595,11 +1588,9 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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#endif
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#endif
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esp32s2_spi_init(spi_dev);
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esp32s2_spi_init(spi_dev);
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priv->refs++;
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priv->refs++;
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leave_critical_section(flags);
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nxmutex_unlock(&priv->lock);
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return spi_dev;
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return spi_dev;
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}
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}
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@ -1619,7 +1610,6 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
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int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
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int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
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{
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{
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irqstate_t flags;
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struct esp32s2_spi_priv_s *priv = (struct esp32s2_spi_priv_s *)dev;
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struct esp32s2_spi_priv_s *priv = (struct esp32s2_spi_priv_s *)dev;
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DEBUGASSERT(dev);
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DEBUGASSERT(dev);
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@ -1629,16 +1619,13 @@ int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
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return ERROR;
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return ERROR;
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}
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}
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flags = enter_critical_section();
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nxmutex_lock(&priv->lock);
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if (--priv->refs != 0)
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if (--priv->refs != 0)
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{
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{
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leave_critical_section(flags);
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nxmutex_unlock(&priv->lock);
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return OK;
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return OK;
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}
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}
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leave_critical_section(flags);
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#if defined(CONFIG_ESP32S2_SPI2_DMA) || defined(CONFIG_ESP32S2_SPI3_DMA)
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#if defined(CONFIG_ESP32S2_SPI2_DMA) || defined(CONFIG_ESP32S2_SPI3_DMA)
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up_disable_irq(priv->config->irq);
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up_disable_irq(priv->config->irq);
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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@ -1646,12 +1633,10 @@ int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
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priv->cpuint = -ENOMEM;
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priv->cpuint = -ENOMEM;
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nxsem_destroy(&priv->sem_isr);
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#endif
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#endif
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esp32s2_spi_deinit(dev);
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esp32s2_spi_deinit(dev);
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nxmutex_unlock(&priv->lock);
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nxsem_destroy(&priv->exclsem);
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return OK;
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return OK;
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}
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}
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