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Several fixes for LPC1788 GPIO

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5813 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-04-03 19:35:21 +00:00
parent 670e4e6ec8
commit c4dbaf3d2a
5 changed files with 205 additions and 170 deletions
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9
arch/arm/include/lpc17xx/lpc178x_irq.h
View File

@ -172,7 +172,6 @@
/* Set 1: 16 interrupts p0.0-p0.15 */
//~ # define LPC17_VALID_GPIOINT0L (0x00000ffful)
# define LPC17_VALID_SHIFT0L (0)
# define LPC17_VALID_FIRST0L (LPC17_IRQ_EXTINT+LPC17_IRQ_NEXTINT)
@ -196,8 +195,7 @@
/* Set 2: 16 interrupts p0.16-p0.31 */
//~ # define LPC17_VALID_GPIOINT0H (0x7fff8000ull)
# define LPC17_VALID_SHIFT0H (15)
# define LPC17_VALID_SHIFT0H (16)
# define LPC17_VALID_FIRST0H (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)
# define LPC17_IRQ_P0p16 (LPC17_VALID_FIRST0H+0)
@ -220,7 +218,6 @@
/* Set 3: 16 interrupts p2.0-p2.15 */
//~ # define LPC17_VALID_GPIOINT2 (0x00003ffful)
# define LPC17_VALID_SHIFT2L (0)
# define LPC17_VALID_FIRST2L (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)
@ -242,9 +239,9 @@
# define LPC17_IRQ_P2p15 (LPC17_VALID_FIRST2L+15)
# define LPC17_VALID_NIRQS2L (16)
/* Set 3: 16 interrupts p2.16 - p2.31 */
/* Set 4: 16 interrupts p2.16 - p2.31 */
# define LPC17_VALID_SHIFT2H (15)
# define LPC17_VALID_SHIFT2H (16)
# define LPC17_VALID_FIRST2H (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L)
# define LPC17_IRQ_P2p16 (LPC17_VALID_FIRST2H+0)

2
arch/arm/src/armv6-m/Toolchain.defs
View File

@ -130,7 +130,7 @@ ifeq ($(CONFIG_ARMV6M_TOOLCHAIN),CODESOURCERYL)
CROSSDEV ?= arm-none-eabi-
ARCROSSDEV ?= arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m0 -mthumb -march=armv6-m -mfloat-abi=soft
MAXOPTIMIZATION = -O2
MAXOPTIMIZATION = -Os
endif
# CodeSourcery under Windows

6
arch/arm/src/lpc17xx/lpc17_gpio.c
View File

@ -549,7 +549,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
* into the correct position in the register value.
*/
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT);
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Select input polarity */
@ -667,7 +667,7 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
* into the correct position in the register value.
*/
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT);
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Set IOCON register */
@ -735,7 +735,7 @@ static int lpc17_configalternate(lpc17_pinset_t cfgset, unsigned int port,
* into the correct position in the register value.
*/
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PINMODE_SHIFT) << IOCON_MODE_SHIFT);
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
/* Select open drain output */

133
arch/arm/src/lpc17xx/lpc17_gpio.h
View File

@ -137,38 +137,38 @@
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
# define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
#elif defined(LPC178x)
@ -241,7 +241,6 @@
/* Pin Mode: MM */
#define GPIO_PINMODE_SHIFT (7)
#define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */
#define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT)
# define GPIO_FLOAT (0 << GPIO_PUMODE_SHIFT) /* Neither pull-up nor -down */
@ -256,8 +255,8 @@
/* Initial value: V */
#define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */
#define GPIO_VALUE_ONE GPIO_VALUE
#define GPIO_VALUE_ZERO (0)
# define GPIO_VALUE_ONE GPIO_VALUE
# define GPIO_VALUE_ZERO (0)
/* Port number: PPP (0-5) */
@ -276,38 +275,38 @@
#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
# define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
#else
# error "Unrecognized LPC17xx family"

107
arch/arm/src/lpc17xx/lpc17_gpioint.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_gpioint.c
*
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -51,7 +51,6 @@
#include "chip.h"
#include "lpc17_gpio.h"
#ifdef CONFIG_GPIO_IRQ
/****************************************************************************
@ -114,7 +113,8 @@ static unsigned int lpc17_getintedge(unsigned int port, unsigned int pin)
*
****************************************************************************/
static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int edges)
static void lpc17_setintedge(uint32_t intbase, unsigned int pin,
unsigned int edges)
{
int regval;
@ -129,9 +129,10 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
{
regval &= ~GPIOINT(pin);
}
putreg32(regval, intbase + LPC17_GPIOINT_INTENR_OFFSET);
/* Set/clear the rising edge enable bit */
/* Set/clear the falling edge enable bit */
regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET);
if ((edges & 1) != 0)
@ -142,6 +143,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
{
regval &= ~GPIOINT(pin);
}
putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET);
}
@ -155,39 +157,56 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int ed
static int lpc17_irq2port(int irq)
{
/* Set 1: 12 interrupts p0.0-p0.11 */
/* Set 1:
* LPC176x: 12 interrupts p0.0-p0.11
* LPC178x: 16 interrupts p0.0-p0.15
*/
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L))
if (irq >= LPC17_VALID_FIRST0L &&
irq < (LPC17_VALID_FIRST0L + LPC17_VALID_NIRQS0L))
{
return 0;
}
/* Set 2: 16 interrupts p0.15-p0.30 */
/* Set 2:
* LPC176x: 16 interrupts p0.15-p0.30
* LPC178x: 16 interrupts p0.16-p0.31
*/
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H))
else if (irq >= LPC17_VALID_FIRST0H &&
irq < (LPC17_VALID_FIRST0H + LPC17_VALID_NIRQS0H))
{
return 0;
}
#if defined (LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13 */
/* Set 3:
* LPC17x: 14 interrupts p2.0-p2.13
*/
else if (irq >= LPC17_VALID_FIRST2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2))
else if (irq >= LPC17_VALID_FIRST2 &&
irq < (LPC17_VALID_FIRST2 + LPC17_VALID_NIRQS2))
{
return 2;
}
#elif defined (LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15 */
/* Set 3:
* LPC18x: 16 interrupts p2.0-p2.15
*/
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L))
else if (irq >= LPC17_VALID_FIRST2L &&
irq < (LPC17_VALID_FIRST2L + LPC17_VALID_NIRQS2L))
{
return 2;
}
/* Set 4: 15 interrupts p2.16-p2.30 */
/* Set 4:
* LPC178x: 16 interrupts p2.16-p2.31
*/
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2H))
else if (irq >= LPC17_VALID_FIRST2H &&
irq < (LPC17_VALID_FIRST2H + LPC17_VALID_NIRQS2H))
{
return 2;
}
@ -207,66 +226,83 @@ static int lpc17_irq2port(int irq)
static int lpc17_irq2pin(int irq)
{
/* Set 1: 12 interrupts p0.0-p0.11
/* Set 1:
* LPC17x: 12 interrupts p0.0-p0.11
* LPC18x: 16 interrupts p0.0-p0.15
*
* See arch/arm/include/lpc17xx/irq.h:
* LPC17_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of 12 interrupts
* LPC17_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of
* 12/16 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.0
* LPC17_VALID_NIRQS0L 12 - 12 interrupt bits in the group
* LPC17_VALID_NIRQS0L 12/16 - Number of interrupt bits in the group
*/
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L))
if (irq >= LPC17_VALID_FIRST0L &&
irq < (LPC17_VALID_FIRST0L + LPC17_VALID_NIRQS0L))
{
return irq - LPC17_VALID_FIRST0L + LPC17_VALID_SHIFT0L;
}
/* Set 2: 16 interrupts p0.15-p0.30
/* Set 2:
* LPC176x: 16 interrupts p0.15-p0.30
* LPC178x: 16 interrupts p0.16-p0.31
*
* LPC17_VALID_SHIFT0H 15 - Bit 15 is the first bit in a group of 16 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.15
* LPC17_VALID_SHIFT0H 15/16 - Bit number of the first bit in a group
* of 16 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.15/16
* LPC17_VALID_NIRQS0L 16 - 16 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H))
else if (irq >= LPC17_VALID_FIRST0H &&
irq < (LPC17_VALID_FIRST0H + LPC17_VALID_NIRQS0H))
{
return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT0H;
}
#if defined(LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13
/* Set 3:
* LPC17x: 14 interrupts p2.0-p2.13
*
* LPC17_VALID_SHIFT2 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_SHIFT2 0 - Bit 0 is the first bit in a group of 14
* interrupts
* LPC17_VALID_FIRST2 irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2 14 - 14 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2))
else if (irq >= LPC17_VALID_FIRST2 &&
irq < (LPC17_VALID_FIRST2 + LPC17_VALID_NIRQS2))
{
return irq - LPC17_VALID_FIRST2 + LPC17_VALID_SHIFT2;
}
#elif defined(LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15
/* Set 3:
* LPC18x: 16 interrupts p2.0-p2.15
*
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 16
* interrupts
* LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2L 15 - 15 interrupt bits in the group
* LPC17_VALID_NIRQS2L 16 - 16 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L))
else if (irq >= LPC17_VALID_FIRST2L &&
irq < (LPC17_VALID_FIRST2L + LPC17_VALID_NIRQS2L))
{
return irq - LPC17_VALID_FIRST2L + LPC17_VALID_SHIFT2L;
}
/* Set 3: 15 interrupts p2.16-p2.30
/* Set 3:
* LPC18x: 16 interrupts p2.16-p2.31
*
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_SHIFT2L 16 - Bit 16 is the first bit in a group of 16
* interrupts
* LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2L 15 - 15 interrupt bits in the group
* LPC17_VALID_NIRQS2L 16 - 16 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2H+LPC17_VALID_NIRQS2H))
else if (irq >= LPC17_VALID_FIRST2H &&
irq < (LPC17_VALID_FIRST2H + LPC17_VALID_NIRQS2H))
{
return irq - LPC17_VALID_FIRST2H + LPC17_VALID_SHIFT2H;
}
@ -305,7 +341,7 @@ static void lpc17_gpiodemux(uint32_t intbase, uint32_t intmask,
/* And get the OR of the enabled interrupt sources. We do not make any
* distinction between rising and falling edges (but the hardware does support
* the ability to differently if needed.
* the ability to handle them differently if needed).
*/
intstatus = intstatr | intstatf;
@ -429,6 +465,9 @@ void lpc17_gpioirqinitialize(void)
up_enable_irq(LPC17_IRQ_EINT3);
#elif defined(LPC178x)
/* the LPC178x family has a single, dedicated interrupt for GPIO0 and
* GPIO2.
*/
(void)irq_attach(LPC17_IRQ_GPIO, lpc17_gpiointerrupt);
up_enable_irq(LPC17_IRQ_GPIO);