Squashed commit of the following:
arch/arm/src/lpc54xx: LCD.. Fix some miconceptions about how the video address lines are used.
arch/arm/src/lpc54xx: Fix some LCD BPP and BRG vs RGB settings.
This commit is contained in:
Gregory Nutt
parent
1fbf788555
commit
c53d88c75c
@ -719,29 +719,19 @@ config LPC54_LCD_BPP16_565
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bool "16 BPP, 5:6:5 mode"
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depends on !LPC54_LCD_MONOCHROME
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config LPC54_LCD_BPP24_RGB565
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bool "24 BPP, 5:6:5 mode"
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depends on !LPC54_LCD_MONOCHROME && LPC54_LCD_TFTPANEL
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---help---
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16-bit color is, by default, provided on LCD VD0-VD15; 24-bit color
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is provided on VD0-23:
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16-bit: RRRRRGGG GGGB BBBB
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24-bit: ........ RRRRRRRR GGGGGGGG BBBBBBBB
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This option selects an alternative pin configuration where 16-bit
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RGB565 is provided on VD3-7, VD10-15, and VD19-23. This essentially
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accepts 32-bit RGB888 color as input but only uses the RGB565 color
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resolution:
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24-bit: ........ RRRRR... GGGGGG.. BBBBB...
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config LPC54_LCD_BPP24
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bool "24 BPP, 8:8:8 mode"
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depends on LPC54_LCD_TFTPANEL
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endchoice
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config LPC54_LCD_BGR
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bool "Blue-Green-Red color order"
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default n
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depends on !LPC54_LCD_MONOCHROME
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---help---
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This option selects BGR color order vs. default RGB
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config LPC54_LCD_BACKCOLOR
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hex "Initial background color"
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default 0x0
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@ -74,24 +74,7 @@
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/* Framebuffer characteristics in bytes */
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#if defined(CONFIG_LPC54_LCD_BPP1)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 1 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP2)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 2 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP4)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 4 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP8)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 8 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP16)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 16 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP24)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 32 + 7) / 8)
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#elif defined(CONFIG_LPC54_LCD_BPP16_565)
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 16 + 7) / 8)
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#else /* defined(CONFIG_LPC54_LCD_BPP12_444) */
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# define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * 16 + 7) / 8)
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#endif
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#define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * LPC54_BPP + 7) / 8)
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#define LPC54_FBSIZE (LPC54_STRIDE * CONFIG_LPC54_LCD_VHEIGHT)
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/* Delays */
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@ -99,10 +82,6 @@
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#define LPC54_LCD_PWRDIS_DELAY 10000
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#define LPC54_LCD_PWREN_DELAY 10000
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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@ -478,39 +457,56 @@ int up_fbinitialize(int display)
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int i;
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/* Configure pins */
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/* LCD panel data. Pins used depend on the panel configuration */
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/* LCD panel data. Pins used depend on the panel configuration:
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*
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* STN 4BPP: VD0-VD3 (single panel)
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* VD0-VD3, VD8-VD11 (dual panel)
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* STN 8BPP: VD0-VD7 (single panel)
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* VD0-VD15 (dual panel)
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* TFT 12BPP: VD4-VD7, VD12-VD15, VD20-VD23
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* TFT 16BPP: VD3-VD7, VD10-VD15, VD19-VD23
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* TFT 24BPP: VD0-VD23
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*/
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lcdinfo("Configuring pins\n");
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#ifndef CONFIG_LPC54_LCD_BPP24_RGB565
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#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
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lpc54_gpio_config(GPIO_LCD_VD0);
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lpc54_gpio_config(GPIO_LCD_VD1);
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lpc54_gpio_config(GPIO_LCD_VD2);
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#endif
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#ifndef CONFIG_LPC54_LCD_BPP12_444
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lpc54_gpio_config(GPIO_LCD_VD3);
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#endif
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lpc54_gpio_config(GPIO_LCD_VD4);
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lpc54_gpio_config(GPIO_LCD_VD5);
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lpc54_gpio_config(GPIO_LCD_VD6);
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lpc54_gpio_config(GPIO_LCD_VD7);
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#ifndef CONFIG_LPC54_LCD_BPP24_RGB565
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#if LPC54_BPP > 8 /* Or STN 8-BPP Dual panel */
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#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
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lpc54_gpio_config(GPIO_LCD_VD8);
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lpc54_gpio_config(GPIO_LCD_VD9);
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#endif
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#ifndef CONFIG_LPC54_LCD_BPP12_444
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lpc54_gpio_config(GPIO_LCD_VD10);
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lpc54_gpio_config(GPIO_LCD_VD11);
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#endif
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lpc54_gpio_config(GPIO_LCD_VD12);
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lpc54_gpio_config(GPIO_LCD_VD13);
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lpc54_gpio_config(GPIO_LCD_VD14);
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lpc54_gpio_config(GPIO_LCD_VD15);
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#endif
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#if LPC54_BPP > 16
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#ifndef CONFIG_LPC54_LCD_BPP24_RGB565
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#if LPC54_BPP > 16 || defined(CONFIG_LPC54_LCD_TFTPANEL)
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#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
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lpc54_gpio_config(GPIO_LCD_VD16);
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lpc54_gpio_config(GPIO_LCD_VD17);
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lpc54_gpio_config(GPIO_LCD_VD18);
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#endif
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#ifndef CONFIG_LPC54_LCD_BPP12_444
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lpc54_gpio_config(GPIO_LCD_VD19);
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#endif
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lpc54_gpio_config(GPIO_LCD_VD20);
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lpc54_gpio_config(GPIO_LCD_VD21);
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lpc54_gpio_config(GPIO_LCD_VD22);
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@ -595,15 +591,23 @@ int up_fbinitialize(int display)
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regval |= LCD_CTRL_LCDBPP_444; /* 12 bpp, 4:4:4 mode */
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#endif
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#ifdef CONFIG_LPC54_LCD_TFTPANEL
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/* TFT panel */
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#ifdef CONFIG_LPC54_LCD_TFTPANEL
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regval |= LCD_CTRL_LCDTFT;
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#else
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/* STN panel */
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regval &= ~LCD_CTRL_LCDTFT;
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#endif
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#ifdef CONFIG_LPC54_LCD_BGR
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/* Swap red and blue. The colors will be 0x00RRGGBB, not 0x00BBGGRR. */
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regval |= LCD_CTRL_BGR;
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#else
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regval &= ~LCD_CTRL_BGR;
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#endif
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/* Single panel */
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@ -618,11 +622,11 @@ int up_fbinitialize(int display)
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/* Select 4- or 8-bit monochrome interface */
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# if LPC54_BPP > 4
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#if LPC54_BPP > 4
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regval |= LCD_CTRL_LCDMONO8;
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# else
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#else
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regval &= ~LCD_CTRL_LCDMONO8;
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# endif
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#endif
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#else
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/* Select color LCD */
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@ -94,7 +94,7 @@
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#elif defined(CONFIG_LPC54_LCD_BPP16_565)
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# define LPC54_BPP 16
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# define LPC54_COLOR_FMT FB_FMT_RGB16_565
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#elif defined(CONFIG_LPC54_LCD_BPP24) || defined(CONFIG_LPC54_LCD_BPP24_RGB565)
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#elif defined(CONFIG_LPC54_LCD_BPP24)
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# define LPC54_BPP 32 /* Only 24 of 32 bits used for RGB */
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# define LPC54_COLOR_FMT FB_FMT_RGB24
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# ifndef CONFIG_LPC54_LCD_TFTPANEL
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@ -40,10 +40,12 @@ STATUS
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minor clock source setting). That port required modifications only
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for differences in some SYSCON and pin-related settings.
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2017-12-13: Created the fb configuration for testing the LCD. Only
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minimal testing has been performed. As of this writing, thre is
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minimal testing has been performed. As of this writing, there is
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some framebuffer functionality. There are recognizable but corrupted
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patterns on the LCD. There are color formatting problems and some
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horizontal elongation.
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2017-12-14: Corrected a misconception about how the video data lines
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were configured. Now the LCD appears to be fully functional.
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Configurations
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==============
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@ -120,12 +122,16 @@ Configurations
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enables the LPC54xx LCD driver in order to support the LPCXpresso's
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TFT panel. In this configuration, the framebuffer resides in the
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the lower half megabyte of SDRAM beginning at address 0xa0000000
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(only 522,240 bytes actually used for the framebuffer). The
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remainder of the SDRAM from 0xa0080000 up to 0xa1000000 is added
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The remainder of the SDRAM from 0xa0080000 up to 0xa1000000 is added
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to the heap.
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2. The pdcurses test relies on some positional input device and so
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is not yet usable.
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The is wasteful of SDRAM: Only 261,120 bytes actually used for the
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framebuffer. This memory could be reclaimed by changing the DRAM
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CS0 offset value in the .config file.
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2. Some of the pdcurses test rely on some positional input device and so
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is not yet usable. Others work fine with no user include: charset,
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xmas, firework, worms, rain, for examples.
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nsh:
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@ -173,4 +179,3 @@ Configurations
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RAMTest: Pattern test: a0000000 16777216 33333333 cccccccc
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RAMTest: Address-in-address test: a0000000 16777216
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nsh>
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@ -21,7 +21,8 @@ CONFIG_LPC54_EMC_DYNAMIC_CS0_OFFSET=0x00080000
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CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE=0x00f80000
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CONFIG_LPC54_EMC_DYNAMIC_CS0=y
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CONFIG_LPC54_EMC=y
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CONFIG_LPC54_LCD_BPP24_RGB565=y
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CONFIG_LPC54_LCD_BGR=y
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CONFIG_LPC54_LCD_BPP16_565=y
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CONFIG_LPC54_LCD_HBACKPORCH=43
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CONFIG_LPC54_LCD_HFRONTPORCH=8
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CONFIG_LPC54_LCD_VBACKPORCH=12
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@ -41,7 +42,6 @@ CONFIG_NSH_DISABLE_IFUPDOWN=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PDCURSES_COLORFMT_RGB888=y
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CONFIG_PDCURSES_FONT_6X9=y
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CONFIG_PREALLOC_MQ_MSGS=4
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CONFIG_PREALLOC_TIMERS=4
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