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arch/arm/src/tiva/common/tiva_ssi.c: Fix syslog formats

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YAMAMOTO Takashi 2020-11-30 13:32:43 +09:00 committed by Xiang Xiao
parent 3686f83892
commit c560c36716
1 changed files with 7 additions and 6 deletions
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13
arch/arm/src/tiva/common/tiva_ssi.c
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@ -25,6 +25,7 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sys/types.h> #include <sys/types.h>
#include <inttypes.h>
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include <errno.h> #include <errno.h>
@ -441,7 +442,7 @@ static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
retval = ssi_getreg(priv, TIVA_SSI_CR1_OFFSET); retval = ssi_getreg(priv, TIVA_SSI_CR1_OFFSET);
regval = (retval & ~SSI_CR1_SSE); regval = (retval & ~SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval); ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
spiinfo("CR1: %08x\n", regval); spiinfo("CR1: %08" PRIx32 "\n", regval);
return retval; return retval;
} }
@ -468,7 +469,7 @@ static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable)
regval &= ~SSI_CR1_SSE; regval &= ~SSI_CR1_SSE;
regval |= (enable & SSI_CR1_SSE); regval |= (enable & SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval); ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
spiinfo("CR1: %08x\n", regval); spiinfo("CR1: %08" PRIx32 "\n", regval);
} }
/**************************************************************************** /****************************************************************************
@ -1110,7 +1111,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t scr; uint32_t scr;
uint32_t actual; uint32_t actual;
spiinfo("frequency: %d\n", frequency); spiinfo("frequency: %" PRId32 "\n", frequency);
DEBUGASSERT(frequency); DEBUGASSERT(frequency);
/* Has the frequency changed? */ /* Has the frequency changed? */
@ -1180,7 +1181,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
regval &= ~SSI_CR0_SCR_MASK; regval &= ~SSI_CR0_SCR_MASK;
regval |= (scr << SSI_CR0_SCR_SHIFT); regval |= (scr << SSI_CR0_SCR_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval); ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
spiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr); spiinfo("CR0: %08" PRIx32 " CPSR: %08" PRIx32 "\n", regval, cpsdvsr);
/* Calculate the actual frequency */ /* Calculate the actual frequency */
@ -1275,7 +1276,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv,
regval &= ~(SSI_CR0_FRF_MASK | SSI_CR0_SPH | SSI_CR0_SPO); regval &= ~(SSI_CR0_FRF_MASK | SSI_CR0_SPH | SSI_CR0_SPO);
regval |= modebits; regval |= modebits;
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval); ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
spiinfo("CR0: %08x\n", regval); spiinfo("CR0: %08" PRIx32 "\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */ /* Save the mode so that subsequent re-configurations will be faster */
@ -1327,7 +1328,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
regval &= ~SSI_CR0_DSS_MASK; regval &= ~SSI_CR0_DSS_MASK;
regval |= ((nbits - 1) << SSI_CR0_DSS_SHIFT); regval |= ((nbits - 1) << SSI_CR0_DSS_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval); ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
spiinfo("CR0: %08x\n", regval); spiinfo("CR0: %08" PRIx32 "\n", regval);
priv->nbits = nbits; priv->nbits = nbits;
} }