Xtensa: A few changes to get esp32_start.c to compile
This commit is contained in:
Gregory Nutt
parent
51fc3de40b
commit
c5d14f9496
@ -68,8 +68,9 @@ else
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endif
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endif
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HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
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STARTUP_OBJS ?= $(HEAD_OBJ)
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HEAD_AOBJ = $(HEAD_ASRC:.S=$(OBJEXT))
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HEAD_COBJ = $(HEAD_CSRC:.c=$(OBJEXT))
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STARTUP_OBJS ?= $(HEAD_AOBJ) $(HEAD_COBJ)
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ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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@ -122,14 +123,14 @@ LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
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VPATH = chip:common:$(ARCH_SUBDIR)
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all: $(HEAD_OBJ) libarch$(LIBEXT)
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all: $(STARTUP_OBJS) libarch$(LIBEXT)
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.PHONY: board/libboard$(LIBEXT)
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$(AOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
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$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
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$(call ASSEMBLE, $<, $@)
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$(COBJS): %$(OBJEXT): %.c
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$(COBJS) $(HEAD_COBJ): %$(OBJEXT): %.c
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$(call COMPILE, $<, $@)
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libarch$(LIBEXT): $(OBJS)
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@ -138,9 +139,9 @@ libarch$(LIBEXT): $(OBJS)
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board/libboard$(LIBEXT):
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$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
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nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
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nuttx$(EXEEXT): $(STARTUP_OBJS) board/libboard$(LIBEXT)
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@echo "LD: nuttx"
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$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
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$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(STARTUP_OBJS) $(EXTRA_OBJS) \
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$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
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ifneq ($(CONFIG_WINDOWS_NATIVE),y)
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$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
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@ -164,6 +164,7 @@ extern void g_intstackbase;
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* of _data. like: uint32_t *pdata = &_sdata;
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*/
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extern uint32_t _init_start; /* Start of initialization logic */
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extern uint32_t _stext; /* Start of .text */
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extern uint32_t _etext; /* End+1 of .text + .rodata */
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extern const uint32_t _data_loaddr; /* Start of .data in FLASH */
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@ -176,9 +177,6 @@ extern uint32_t _sramfunc; /* Start of ramfuncs */
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extern uint32_t _eramfunc; /* End+1 of ramfuncs */
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extern uint32_t _ramfunc_loadaddr; /* Start of ramfuncs in FLASH */
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extern uint32_t _ramfunc_sizeof; /* Size of ramfuncs */
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extern uint32_t _bmxdkpba_address; /* BMX register setting */
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extern uint32_t _bmxdudba_address; /* BMX register setting */
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extern uint32_t _bmxdupba_address; /* BMX register setting */
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#endif /* CONFIG_ARCH_RAMFUNCS */
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#endif /* __ASSEMBLY__ */
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@ -3,7 +3,7 @@
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_LX6
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if ARCH_CHIP_ESP32
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endif # ARCH_LX6
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endif # ARCH_CHIP_ESP32
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@ -33,9 +33,10 @@
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#
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############################################################################
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# The start-up, "head", file
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# The start-up, "head", file. May be either a .S or a .c file.
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HEAD_ASRC = esp32_start.c
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HEAD_ASRC =
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HEAD_CSRC = esp32_start.c
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# Common XTENSA files (arch/xtensa/src/common)
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/xtensa/src/common/exp32_dport.h
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* arch/xtensa/src/common/esp32_dport.h
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*
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* Adapted from use in NuttX by:
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*
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@ -24,8 +24,8 @@
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H
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#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H
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#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
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#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
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/****************************************************************************
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* Included Files
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@ -3851,4 +3851,4 @@
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#define DPORT_DATE_S 0
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#define DPORT_DPORT_DATE_VERSION 0x1605190
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#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H */
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#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H */
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@ -24,8 +24,8 @@
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H
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#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H
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#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
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#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
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/****************************************************************************
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* Included Files
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@ -2001,9 +2001,4 @@
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#define RTC_CNTL_CNTL_DATE_S 0
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#define RTC_CNTL_RTC_CNTL_DATE_VERSION 0x1604280
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#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H */
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#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H */
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/xtensa/src/common/xtensa_att.h
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* arch/xtensa/src/esp32/chip/esp32_soc.h
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*
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* Adapted from use in NuttX by:
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*
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@ -19,12 +19,12 @@
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License./*
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* limitations under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
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#define __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
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#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
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#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
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/****************************************************************************
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* Included Files
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@ -125,7 +125,7 @@
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#define VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
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/* Set field value to a variable, used when _f is left shifted by _f##_S
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/* Set field value to a variable, used when _f is left shifted by _f##_S */
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#define VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
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@ -149,11 +149,11 @@
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#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
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/* Set bits of register controlled by mask
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/* Set bits of register controlled by mask */
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#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
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#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) */
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/* Get bits of register controlled by mask
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/* Get bits of register controlled by mask */
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#define GET_PERI_REG_MASK(reg, mask) (READ_PERI_REG(reg) & (mask))
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@ -353,4 +353,4 @@
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/* Other interrupt numbers should be managed by the user */
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#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H */
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#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H */
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63
arch/xtensa/src/esp32/esp32_clockconfig.h
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63
arch/xtensa/src/esp32/esp32_clockconfig.h
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@ -0,0 +1,63 @@
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/****************************************************************************
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* arch/xtensa/src/esp32/esp32_clockconfig.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
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#define __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32_clockconfig
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*
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* Description:
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* Called to initialize the ESP32. This does whatever setup is needed to
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* put the SoC in a usable state. This includes the initialization of
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* clocking using the settings in board.h.
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*
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****************************************************************************/
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void esp32_clockconfig(void);
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#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H */
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@ -37,6 +37,8 @@
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#include "xtensa_attr.h"
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#include "chip/esp32_dport.h"
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#include "chip/esp32_rtccntl.h"
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#include "esp32_clockconfig.h"
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#include "esp32_start.h"
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#include "xtensa.h"
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#warning REVISIT Need cpu_configure_region_protection() prototype
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@ -59,7 +61,7 @@ void cpu_configure_region_protection(void);
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*
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****************************************************************************/
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void IRAM_ATTR __start()
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void IRAM_ATTR __start(void)
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{
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uint32_t regval;
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@ -83,7 +85,7 @@ void IRAM_ATTR __start()
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/* Set .bss to zero */
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memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
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memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
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#warning Missing logic: Initialize .data
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@ -98,12 +100,12 @@ void IRAM_ATTR __start()
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/* Make sure that the APP_CPU is disabled for now */
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regval = getreg32(DPORT_APPCPU_CTRL_B_REG);
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regval &= ~DPORT_APPCPU_CLKGATE_EN
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regval &= ~DPORT_APPCPU_CLKGATE_EN;
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putreg32(regval, DPORT_APPCPU_CTRL_B_REG);
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/* Set CPU frequency configured in board.h */
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esp_set_cpu_freq();
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esp32_clockconfig();
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#ifdef USE_EARLYSERIALINIT
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/* Perform early serial initialization */
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69
arch/xtensa/src/esp32/esp32_start.h
Normal file
69
arch/xtensa/src/esp32/esp32_start.h
Normal file
@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/xtensa/src/esp32/esp32_start.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
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#define __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32_board_initialize
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*
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* Description:
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* All ESP32 architectures must provide the following entry point. This
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* entry point is called early in the initialization -- after all memory
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* has been configured but before any devices have been initialized.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void esp32_board_initialize(void);
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#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_START_H */
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