diff --git a/arch/xtensa/src/Makefile b/arch/xtensa/src/Makefile
index 0e22a4e010..e6f288ebc5 100644
--- a/arch/xtensa/src/Makefile
+++ b/arch/xtensa/src/Makefile
@@ -68,8 +68,9 @@ else
 endif
 endif
 
-HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
-STARTUP_OBJS ?= $(HEAD_OBJ)
+HEAD_AOBJ = $(HEAD_ASRC:.S=$(OBJEXT))
+HEAD_COBJ = $(HEAD_CSRC:.c=$(OBJEXT))
+STARTUP_OBJS ?= $(HEAD_AOBJ) $(HEAD_COBJ)
 
 ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
 AOBJS = $(ASRCS:.S=$(OBJEXT))
@@ -122,14 +123,14 @@ LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
 
 VPATH = chip:common:$(ARCH_SUBDIR)
 
-all: $(HEAD_OBJ) libarch$(LIBEXT)
+all: $(STARTUP_OBJS) libarch$(LIBEXT)
 
 .PHONY: board/libboard$(LIBEXT)
 
-$(AOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
+$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
 
-$(COBJS): %$(OBJEXT): %.c
+$(COBJS) $(HEAD_COBJ): %$(OBJEXT): %.c
 	$(call COMPILE, $<, $@)
 
 libarch$(LIBEXT): $(OBJS)
@@ -138,9 +139,9 @@ libarch$(LIBEXT): $(OBJS)
 board/libboard$(LIBEXT):
 	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
 
-nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
+nuttx$(EXEEXT): $(STARTUP_OBJS) board/libboard$(LIBEXT)
 	@echo "LD: nuttx"
-	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
+	$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(STARTUP_OBJS) $(EXTRA_OBJS) \
 		$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
 ifneq ($(CONFIG_WINDOWS_NATIVE),y)
 	$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
index 849500863c..5d4a65f788 100644
--- a/arch/xtensa/src/common/xtensa.h
+++ b/arch/xtensa/src/common/xtensa.h
@@ -164,6 +164,7 @@ extern void g_intstackbase;
  *    of _data.  like:  uint32_t *pdata = &_sdata;
  */
 
+extern uint32_t _init_start;        /* Start of initialization logic */
 extern uint32_t _stext;             /* Start of .text */
 extern uint32_t _etext;             /* End+1 of .text + .rodata */
 extern const uint32_t _data_loaddr; /* Start of .data in FLASH */
@@ -176,9 +177,6 @@ extern uint32_t _sramfunc;          /* Start of ramfuncs */
 extern uint32_t _eramfunc;          /* End+1 of ramfuncs */
 extern uint32_t _ramfunc_loadaddr;  /* Start of ramfuncs in FLASH */
 extern uint32_t _ramfunc_sizeof;    /* Size of ramfuncs */
-extern uint32_t _bmxdkpba_address;  /* BMX register setting */
-extern uint32_t _bmxdudba_address;  /* BMX register setting */
-extern uint32_t _bmxdupba_address;  /* BMX register setting */
 #endif /* CONFIG_ARCH_RAMFUNCS */
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig
index 8ccb4fe392..956d57c47b 100644
--- a/arch/xtensa/src/esp32/Kconfig
+++ b/arch/xtensa/src/esp32/Kconfig
@@ -3,7 +3,7 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_LX6
+if ARCH_CHIP_ESP32
 
-endif # ARCH_LX6
+endif # ARCH_CHIP_ESP32
 
diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index 71f583227c..4bda2cd0ab 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -33,9 +33,10 @@
 #
 ############################################################################
 
-# The start-up, "head", file
+# The start-up, "head", file.  May be either a .S or a .c file.
 
-HEAD_ASRC = esp32_start.c
+HEAD_ASRC =
+HEAD_CSRC = esp32_start.c
 
 # Common XTENSA files (arch/xtensa/src/common)
 
diff --git a/arch/xtensa/src/esp32/chip/xtensa_dport.h b/arch/xtensa/src/esp32/chip/esp32_dport.h
similarity index 99%
rename from arch/xtensa/src/esp32/chip/xtensa_dport.h
rename to arch/xtensa/src/esp32/chip/esp32_dport.h
index 85a145fe92..0dcf98b626 100644
--- a/arch/xtensa/src/esp32/chip/xtensa_dport.h
+++ b/arch/xtensa/src/esp32/chip/esp32_dport.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/xtensa/src/common/exp32_dport.h
+ * arch/xtensa/src/common/esp32_dport.h
  *
  * Adapted from use in NuttX by:
  *
@@ -24,8 +24,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H
-#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H
 
 /****************************************************************************
  * Included Files
@@ -3851,4 +3851,4 @@
 #define DPORT_DATE_S  0
 #define DPORT_DPORT_DATE_VERSION 0x1605190
 
-#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_DPORT_H */
+#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_DPORT_H */
diff --git a/arch/xtensa/src/esp32/chip/xtensa_rtccntl.h b/arch/xtensa/src/esp32/chip/esp32_rtccntl.h
similarity index 99%
rename from arch/xtensa/src/esp32/chip/xtensa_rtccntl.h
rename to arch/xtensa/src/esp32/chip/esp32_rtccntl.h
index f79fa9aa88..12f5ba07a9 100644
--- a/arch/xtensa/src/esp32/chip/xtensa_rtccntl.h
+++ b/arch/xtensa/src/esp32/chip/esp32_rtccntl.h
@@ -24,8 +24,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H
-#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H
 
 /****************************************************************************
  * Included Files
@@ -2001,9 +2001,4 @@
 #define RTC_CNTL_CNTL_DATE_S  0
 #define RTC_CNTL_RTC_CNTL_DATE_VERSION 0x1604280
 
-
-
-
-#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_RTCCNTL_H */
-
-
+#endif /*__ARCH_XTENSA_SRC_ESP32_CHIP_XTENSA_ESP32_H */
diff --git a/arch/xtensa/src/esp32/chip/xtensa_soc.h b/arch/xtensa/src/esp32/chip/esp32_soc.h
similarity index 98%
rename from arch/xtensa/src/esp32/chip/xtensa_soc.h
rename to arch/xtensa/src/esp32/chip/esp32_soc.h
index 99e3600284..6760b1509e 100644
--- a/arch/xtensa/src/esp32/chip/xtensa_soc.h
+++ b/arch/xtensa/src/esp32/chip/esp32_soc.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/xtensa/src/common/xtensa_att.h
+ * arch/xtensa/src/esp32/chip/esp32_soc.h
  *
  * Adapted from use in NuttX by:
  *
@@ -19,12 +19,12 @@
  * distributed under the License is distributed on an "AS IS" BASIS,
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
- * limitations under the License./*
+ * limitations under the License.
  *
  ****************************************************************************/
 
-#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
-#define __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H
+#ifndef __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
+#define __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H
 
 /****************************************************************************
  * Included Files
@@ -125,7 +125,7 @@
 
 #define VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
 
-/* Set field value to a variable, used when _f is left shifted by _f##_S
+/* Set field value to a variable, used when _f is left shifted by _f##_S */
 
 #define VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
 
@@ -149,11 +149,11 @@
 
 #define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
 
-/* Set bits of register controlled by mask
+/* Set bits of register controlled by mask */
 
-#define SET_PERI_REG_MASK(reg, mask)   WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
+#define SET_PERI_REG_MASK(reg, mask)   WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) */
 
-/* Get bits of register controlled by mask
+/* Get bits of register controlled by mask */
 
 #define GET_PERI_REG_MASK(reg, mask)   (READ_PERI_REG(reg) & (mask))
 
@@ -353,4 +353,4 @@
 
 /* Other interrupt numbers should be managed by the user */
 
-#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_ATTR_H */
+#endif /* __ARCH_XTENSA_SRC_ESP32_CHIP_ESP32_SOC_H */
diff --git a/arch/xtensa/src/esp32/esp32_clockconfig.h b/arch/xtensa/src/esp32/esp32_clockconfig.h
new file mode 100644
index 0000000000..a552f9b33d
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_clockconfig.h
@@ -0,0 +1,63 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_clockconfig.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_clockconfig
+ *
+ * Description:
+ *   Called to initialize the ESP32.  This does whatever setup is needed to
+ *   put the  SoC in a usable state.  This includes the initialization of
+ *   clocking using the settings in board.h.
+ *
+ ****************************************************************************/
+
+void esp32_clockconfig(void);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CLOCKCONFIG_H */
diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c
index e78c0cff17..b7c37b87ad 100644
--- a/arch/xtensa/src/esp32/esp32_start.c
+++ b/arch/xtensa/src/esp32/esp32_start.c
@@ -37,6 +37,8 @@
 #include "xtensa_attr.h"
 #include "chip/esp32_dport.h"
 #include "chip/esp32_rtccntl.h"
+#include "esp32_clockconfig.h"
+#include "esp32_start.h"
 #include "xtensa.h"
 
 #warning REVISIT Need cpu_configure_region_protection() prototype
@@ -59,7 +61,7 @@ void cpu_configure_region_protection(void);
  *
  ****************************************************************************/
 
-void IRAM_ATTR __start()
+void IRAM_ATTR __start(void)
 {
   uint32_t regval;
 
@@ -83,7 +85,7 @@ void IRAM_ATTR __start()
 
   /* Set .bss to zero */
 
-  memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
+  memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
 
 #warning Missing logic: Initialize .data
 
@@ -98,12 +100,12 @@ void IRAM_ATTR __start()
   /* Make sure that the APP_CPU is disabled for now */
 
   regval  = getreg32(DPORT_APPCPU_CTRL_B_REG);
-  regval &= ~DPORT_APPCPU_CLKGATE_EN
+  regval &= ~DPORT_APPCPU_CLKGATE_EN;
   putreg32(regval, DPORT_APPCPU_CTRL_B_REG);
 
   /* Set CPU frequency configured in board.h */
 
-  esp_set_cpu_freq();
+  esp32_clockconfig();
 
 #ifdef USE_EARLYSERIALINIT
  /* Perform early serial initialization */
diff --git a/arch/xtensa/src/esp32/esp32_start.h b/arch/xtensa/src/esp32/esp32_start.h
new file mode 100644
index 0000000000..d836f40147
--- /dev/null
+++ b/arch/xtensa/src/esp32/esp32_start.h
@@ -0,0 +1,69 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_start.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_START_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_board_initialize
+ *
+ * Description:
+ *   All ESP32 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured but before any devices have been initialized.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_board_initialize(void);
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_START_H */