From c5f5628875bc7acd9695a15a7a5f5c7d1773264d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 21 May 2015 16:50:55 -0600 Subject: [PATCH] SAML21 clock config: Fix a misthink in last commit. Move setting of ONDEMAND to after clock is enabled in most cases --- configs/saml21-xplained/include/board.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/configs/saml21-xplained/include/board.h b/configs/saml21-xplained/include/board.h index 5a453a19ed..d5ef68f556 100644 --- a/configs/saml21-xplained/include/board.h +++ b/configs/saml21-xplained/include/board.h @@ -192,7 +192,7 @@ * BOARD_DFLL48M_FINEVALUE - Value * * Closed loop mode only: - * BOARD_DFLL48M_REFCLK_CLKGEN - See GCLK_PCHCTRL_GEN* definitions + * BOARD_DFLL48M_REFCLK_CLKGEN - GCLK index in the range {0..8} * BOARD_DFLL48M_MULTIPLIER - Value * BOARD_DFLL48M_MAXCOARSESTEP - Value * BOARD_DFLL48M_MAXFINESTEP - Value @@ -215,7 +215,7 @@ /* DFLL closed loop mode configuration */ -#define BOARD_DFLL48M_REFCLK_CLKGEN GCLK_PCHCTRL_GEN1 +#define BOARD_DFLL48M_REFCLK_CLKGEN 1 #define BOARD_DFLL48M_MULTIPLIER 12 #define BOARD_DFLL48M_QUICKLOCK 1 #define BOARD_DFLL48M_TRACKAFTERFINELOCK 1 @@ -236,10 +236,10 @@ * BOARD_FDPLL96M_LPEN - Boolean (defined / not defined) * BOARD_FDPLL96M_FILTER - See OSCCTRL_DPLLCTRLB_FILTER_* definitions * BOARD_FDPLL96M_REFCLK - See OSCCTRL_DPLLCTRLB_REFLCK_* definitions - * BOARD_FDPLL96M_REFCLK_CLKGEN - See GCLK_PCHCTRL_GEN* definitions + * BOARD_FDPLL96M_REFCLK_CLKGEN - GCLK index in the range {0..8} * BOARD_FDPLL96M_LOCKTIME_ENABLE - Boolean (defined / not defined) * BOARD_FDPLL96M_LOCKTIME - See OSCCTRL_DPLLCTRLB_LTIME_* definitions - * BOARD_FDPLL96M_LOCKTIME_CLKGEN - See GCLK_PCHCTRL_GEN* definitions + * BOARD_FDPLL96M_LOCKTIME_CLKGEN - GCLK index in the range {0..8} * BOARD_FDPLL96M_REFDIV - Numeric value, 1 - 2047 * BOARD_FDPLL96M_PRESCALER - See OSCCTRL_DPLLPRESC_* definitions * BOARD_FDPLL96M_REFFREQ - Numeric value @@ -254,10 +254,10 @@ #undef BOARD_FDPLL96M_LPEN #define BOARD_FDPLL96M_FILTER OSCCTRL_DPLLCTRLB_FILTER_DEFAULT #define BOARD_FDPLL96M_REFCLK OSCCTRL_DPLLCTRLB_REFLCK_XOSCK32K -#define BOARD_FDPLL96M_REFCLK_CLKGEN GCLK_PCHCTRL_GEN1 +#define BOARD_FDPLL96M_REFCLK_CLKGEN 1 #undef BOARD_FDPLL96M_LOCKTIME_ENABLE #define BOARD_FDPLL96M_LOCKTIME OSCCTRL_DPLLCTRLB_LTIME_NONE -#define BOARD_FDPLL96M_LOCKTIME_CLKGEN GCLK_PCHCTRL_GEN1 +#define BOARD_FDPLL96M_LOCKTIME_CLKGEN 1 #define BOARD_FDPLL96M_REFDIV 1 #define BOARD_FDPLL96M_PRESCALER OSCCTRL_DPLLPRESC_DIV1