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boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver

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During PSRAM initialization and flash operations, the Cache needs to be disabled.
So all data and code for the aforementioned scope is required to be placed in Internal RAM.
This commit is contained in:
Dong Heng 2023-10-17 10:11:12 +08:00 committed by Alin Jerpelea
parent bc43c419f2
commit c655870b22
1 changed files with 11 additions and 0 deletions
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11
boards/xtensa/esp32s3/common/scripts/legacy_sections.ld
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@ -131,6 +131,12 @@ SECTIONS
#ifdef CONFIG_ESP32S3_SPIRAM_MODE_OCT
*libarch.a:esp32s3_psram_octal.*(.literal .text .literal.* .text.*)
#endif
#if defined(CONFIG_STACK_CANARIES) && \
(defined(CONFIG_ESP32S3_SPIFLASH) || \
defined(CONFIG_ESP32S3_SPIRAM))
*libc.a:lib_stackchk.*(.literal .text .literal.* .text.*)
#endif
*(.wifirxiram .wifirxiram.*)
*(.wifi0iram .wifi0iram.*)
*(.wifiorslpiram .wifiorslpiram.*)
@ -214,6 +220,11 @@ SECTIONS
*libphy.a:(.rodata .rodata.*)
*libarch.a:xtensa_context.*(.rodata .rodata.*)
#if defined(CONFIG_STACK_CANARIES) && \
(defined(CONFIG_ESP32S3_SPIFLASH) || \
defined(CONFIG_ESP32S3_SPIRAM))
*libc.a:lib_stackchk.*(.rodata .rodata.*)
#endif
_edata = ABSOLUTE(.);
. = ALIGN(4);