arch/arm/src/imxrt/imxrt_serial.c: Fix some interrupt instabilities; must be in a critical section when modifying serial interrupts. configs/imxrt1050-evk/nsh/defconfig: Use the BASEPRI register to enable/disable interrupts; enable the PROCFS file system.
This commit is contained in:
Gregory Nutt
parent
0275c8e9c7
commit
c681519720
@ -79,63 +79,63 @@
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/* First pick the console and ttys0. This could be any of LPUART1-8 */
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#if defined(CONFIG_LPUART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart1port /* LPUART1 is console */
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# define TTYS0_DEV g_uart1port /* LPUART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# define CONSOLE_DEV g_uart1port /* LPUART1 is console */
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# define TTYS0_DEV g_uart1port /* LPUART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_LPUART2_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart2port /* LPUART2 is console */
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# define TTYS0_DEV g_uart2port /* LPUART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# define CONSOLE_DEV g_uart2port /* LPUART2 is console */
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# define TTYS0_DEV g_uart2port /* LPUART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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#elif defined(CONFIG_LPUART3_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart3port /* LPUART3 is console */
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# define TTYS0_DEV g_uart3port /* LPUART3 is ttyS0 */
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# define UART3_ASSIGNED 1
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# define CONSOLE_DEV g_uart3port /* LPUART3 is console */
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# define TTYS0_DEV g_uart3port /* LPUART3 is ttyS0 */
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# define UART3_ASSIGNED 1
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#elif defined(CONFIG_LPUART4_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart4port /* LPUART4 is console */
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# define TTYS0_DEV g_uart4port /* LPUART4 is ttyS0 */
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# define UART4_ASSIGNED 1
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# define CONSOLE_DEV g_uart4port /* LPUART4 is console */
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# define TTYS0_DEV g_uart4port /* LPUART4 is ttyS0 */
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# define UART4_ASSIGNED 1
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#elif defined(CONFIG_LPUART5_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart5port /* LPUART5 is console */
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# define TTYS5_DEV g_uart5port /* LPUART5 is ttyS0 */
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# define UART5_ASSIGNED 1
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# define CONSOLE_DEV g_uart5port /* LPUART5 is console */
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# define TTYS5_DEV g_uart5port /* LPUART5 is ttyS0 */
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# define UART5_ASSIGNED 1
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#elif defined(CONFIG_LPUART6_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart6port /* LPUART6 is console */
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# define TTYS6_DEV g_uart6port /* LPUART6 is ttyS0 */
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# define UART6_ASSIGNED 1
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# define CONSOLE_DEV g_uart6port /* LPUART6 is console */
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# define TTYS6_DEV g_uart6port /* LPUART6 is ttyS0 */
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# define UART6_ASSIGNED 1
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#elif defined(CONFIG_LPUART7_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart7port /* LPUART7 is console */
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# define TTYS7_DEV g_uart7port /* LPUART7 is ttyS0 */
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# define UART7_ASSIGNED 1
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# define CONSOLE_DEV g_uart7port /* LPUART7 is console */
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# define TTYS7_DEV g_uart7port /* LPUART7 is ttyS0 */
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# define UART7_ASSIGNED 1
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#elif defined(CONFIG_LPUART8_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart8port /* LPUART8 is console */
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# define TTYS8_DEV g_uart8port /* LPUART8 is ttyS0 */
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# define UART8_ASSIGNED 1
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# define CONSOLE_DEV g_uart8port /* LPUART8 is console */
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# define TTYS8_DEV g_uart8port /* LPUART8 is ttyS0 */
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# define UART8_ASSIGNED 1
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#else
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# undef CONSOLE_DEV /* No console */
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# undef CONSOLE_DEV /* No console */
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# if defined(CONFIG_IMXRT_LPUART1)
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# define TTYS0_DEV g_uart1port /* LPUART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# define TTYS0_DEV g_uart1port /* LPUART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART2)
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# define TTYS0_DEV g_uart2port /* LPUART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# define TTYS0_DEV g_uart2port /* LPUART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART3)
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# define TTYS0_DEV g_uart3port /* LPUART3 is ttyS0 */
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# define UART3_ASSIGNED 1
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# define TTYS0_DEV g_uart3port /* LPUART3 is ttyS0 */
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# define UART3_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART4)
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# define TTYS0_DEV g_uart4port /* LPUART4 is ttyS0 */
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# define UART4_ASSIGNED 1
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# define TTYS0_DEV g_uart4port /* LPUART4 is ttyS0 */
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# define UART4_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART5)
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# define TTYS0_DEV g_uart5port /* LPUART5 is ttyS0 */
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# define UART5_ASSIGNED 1
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# define TTYS0_DEV g_uart5port /* LPUART5 is ttyS0 */
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# define UART5_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART6)
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# define TTYS0_DEV g_uart6port /* LPUART6 is ttyS0 */
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# define UART6_ASSIGNED 1
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# define TTYS0_DEV g_uart6port /* LPUART6 is ttyS0 */
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# define UART6_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART7)
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# define TTYS0_DEV g_uart7port /* LPUART7 is ttyS0 */
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# define UART7_ASSIGNED 1
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# define TTYS0_DEV g_uart7port /* LPUART7 is ttyS0 */
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# define UART7_ASSIGNED 1
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# elif defined(CONFIG_IMXRT_LPUART8)
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# define TTYS0_DEV g_uart8port /* LPUART8 is ttyS0 */
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# define UART8_ASSIGNED 1
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# define TTYS0_DEV g_uart8port /* LPUART8 is ttyS0 */
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# define UART8_ASSIGNED 1
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# endif
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#endif
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@ -306,7 +306,7 @@
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#endif
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#if defined(CONFIG_PM)
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# define PM_IDLE_DOMAIN 0 /* Revisit */
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# define PM_IDLE_DOMAIN 0 /* Revisit */
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#endif
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/****************************************************************************
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@ -331,13 +331,13 @@ struct imxrt_uart_s
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****************************************************************************/
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static inline uint32_t imxrt_serialin(struct imxrt_uart_s *priv,
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uint32_t offset);
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static inline void imxrt_serialout(struct imxrt_uart_s *priv, uint32_t offset,
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uint32_t value);
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uint32_t offset);
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static inline void imxrt_serialout(struct imxrt_uart_s *priv,
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uint32_t offset, uint32_t value);
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static inline void imxrt_disableuartint(struct imxrt_uart_s *priv,
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uint32_t *ie);
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uint32_t *ie);
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static inline void imxrt_restoreuartint(struct imxrt_uart_s *priv,
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uint32_t ie);
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uint32_t ie);
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static int imxrt_setup(struct uart_dev_s *dev);
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static void imxrt_shutdown(struct uart_dev_s *dev);
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@ -432,28 +432,28 @@ static char g_uart8txbuffer[CONFIG_LPUART8_TXBUFSIZE];
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#ifdef CONFIG_IMXRT_LPUART1
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static struct imxrt_uart_s g_uart1priv =
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{
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.uartbase = IMXRT_LPUART1_BASE,
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.baud = CONFIG_LPUART1_BAUD,
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.irq = IMXRT_IRQ_LPUART1,
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.parity = CONFIG_LPUART1_PARITY,
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.bits = CONFIG_LPUART1_BITS,
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.stopbits2 = CONFIG_LPUART1_2STOP,
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.uartbase = IMXRT_LPUART1_BASE,
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.baud = CONFIG_LPUART1_BAUD,
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.irq = IMXRT_IRQ_LPUART1,
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.parity = CONFIG_LPUART1_PARITY,
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.bits = CONFIG_LPUART1_BITS,
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.stopbits2 = CONFIG_LPUART1_2STOP,
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};
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static struct uart_dev_s g_uart1port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART1_RXBUFSIZE,
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.buffer = g_uart1rxbuffer,
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.size = CONFIG_LPUART1_RXBUFSIZE,
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.buffer = g_uart1rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART1_TXBUFSIZE,
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.buffer = g_uart1txbuffer,
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.size = CONFIG_LPUART1_TXBUFSIZE,
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.buffer = g_uart1txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart1priv,
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.ops = &g_uart_ops,
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.priv = &g_uart1priv,
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};
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#endif
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@ -462,204 +462,204 @@ static struct uart_dev_s g_uart1port =
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#ifdef CONFIG_IMXRT_LPUART2
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static struct imxrt_uart_s g_uart2priv =
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{
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.uartbase = IMXRT_LPUART2_BASE,
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.baud = CONFIG_LPUART2_BAUD,
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.irq = IMXRT_IRQ_LPUART2,
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.parity = CONFIG_LPUART2_PARITY,
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.bits = CONFIG_LPUART2_BITS,
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.stopbits2 = CONFIG_LPUART2_2STOP,
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.uartbase = IMXRT_LPUART2_BASE,
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.baud = CONFIG_LPUART2_BAUD,
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.irq = IMXRT_IRQ_LPUART2,
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.parity = CONFIG_LPUART2_PARITY,
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.bits = CONFIG_LPUART2_BITS,
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.stopbits2 = CONFIG_LPUART2_2STOP,
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};
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static struct uart_dev_s g_uart2port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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.size = CONFIG_LPUART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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.size = CONFIG_LPUART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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};
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#endif
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#ifdef CONFIG_IMXRT_LPUART3
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static struct imxrt_uart_s g_uart3priv =
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{
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.uartbase = IMXRT_LPUART3_BASE,
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.baud = CONFIG_LPUART3_BAUD,
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.irq = IMXRT_IRQ_LPUART3,
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.parity = CONFIG_LPUART3_PARITY,
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.bits = CONFIG_LPUART3_BITS,
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.stopbits2 = CONFIG_LPUART3_2STOP,
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.uartbase = IMXRT_LPUART3_BASE,
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.baud = CONFIG_LPUART3_BAUD,
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.irq = IMXRT_IRQ_LPUART3,
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.parity = CONFIG_LPUART3_PARITY,
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.bits = CONFIG_LPUART3_BITS,
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.stopbits2 = CONFIG_LPUART3_2STOP,
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};
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static struct uart_dev_s g_uart3port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART3_RXBUFSIZE,
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.buffer = g_uart3rxbuffer,
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.size = CONFIG_LPUART3_RXBUFSIZE,
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.buffer = g_uart3rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART3_TXBUFSIZE,
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.buffer = g_uart3txbuffer,
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.size = CONFIG_LPUART3_TXBUFSIZE,
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.buffer = g_uart3txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart3priv,
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.ops = &g_uart_ops,
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.priv = &g_uart3priv,
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};
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#endif
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#ifdef CONFIG_IMXRT_LPUART4
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static struct imxrt_uart_s g_uart4priv =
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{
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.uartbase = IMXRT_LPUART4_BASE,
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.baud = CONFIG_LPUART4_BAUD,
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.irq = IMXRT_IRQ_LPUART4,
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.parity = CONFIG_LPUART4_PARITY,
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.bits = CONFIG_LPUART4_BITS,
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.stopbits2 = CONFIG_LPUART4_2STOP,
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.uartbase = IMXRT_LPUART4_BASE,
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.baud = CONFIG_LPUART4_BAUD,
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.irq = IMXRT_IRQ_LPUART4,
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.parity = CONFIG_LPUART4_PARITY,
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.bits = CONFIG_LPUART4_BITS,
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.stopbits2 = CONFIG_LPUART4_2STOP,
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};
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static struct uart_dev_s g_uart4port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART4_RXBUFSIZE,
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.buffer = g_uart4rxbuffer,
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.size = CONFIG_LPUART4_RXBUFSIZE,
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.buffer = g_uart4rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART4_TXBUFSIZE,
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.buffer = g_uart4txbuffer,
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.size = CONFIG_LPUART4_TXBUFSIZE,
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.buffer = g_uart4txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart4priv,
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.ops = &g_uart_ops,
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.priv = &g_uart4priv,
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};
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#endif
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#ifdef CONFIG_IMXRT_LPUART5
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static struct imxrt_uart_s g_uart5priv =
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{
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.uartbase = IMXRT_LPUART5_BASE,
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.baud = CONFIG_LPUART5_BAUD,
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.irq = IMXRT_IRQ_LPUART5,
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.parity = CONFIG_LPUART5_PARITY,
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.bits = CONFIG_LPUART5_BITS,
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.stopbits2 = CONFIG_LPUART5_2STOP,
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.uartbase = IMXRT_LPUART5_BASE,
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.baud = CONFIG_LPUART5_BAUD,
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.irq = IMXRT_IRQ_LPUART5,
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.parity = CONFIG_LPUART5_PARITY,
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.bits = CONFIG_LPUART5_BITS,
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.stopbits2 = CONFIG_LPUART5_2STOP,
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};
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static struct uart_dev_s g_uart5port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART5_RXBUFSIZE,
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.buffer = g_uart5rxbuffer,
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.size = CONFIG_LPUART5_RXBUFSIZE,
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.buffer = g_uart5rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART5_TXBUFSIZE,
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.buffer = g_uart5txbuffer,
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.size = CONFIG_LPUART5_TXBUFSIZE,
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.buffer = g_uart5txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart5priv,
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.ops = &g_uart_ops,
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.priv = &g_uart5priv,
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};
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#endif
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#ifdef CONFIG_IMXRT_LPUART6
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static struct imxrt_uart_s g_uart6priv =
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{
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.uartbase = IMXRT_LPUART6_BASE,
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.baud = CONFIG_LPUART6_BAUD,
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.irq = IMXRT_IRQ_LPUART6,
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.parity = CONFIG_LPUART6_PARITY,
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.bits = CONFIG_LPUART6_BITS,
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.stopbits2 = CONFIG_LPUART6_2STOP,
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.uartbase = IMXRT_LPUART6_BASE,
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.baud = CONFIG_LPUART6_BAUD,
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.irq = IMXRT_IRQ_LPUART6,
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.parity = CONFIG_LPUART6_PARITY,
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.bits = CONFIG_LPUART6_BITS,
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.stopbits2 = CONFIG_LPUART6_2STOP,
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};
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static struct uart_dev_s g_uart6port =
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{
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.recv =
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.recv =
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{
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.size = CONFIG_LPUART6_RXBUFSIZE,
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.buffer = g_uart6rxbuffer,
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.size = CONFIG_LPUART6_RXBUFSIZE,
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.buffer = g_uart6rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_LPUART6_TXBUFSIZE,
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.buffer = g_uart6txbuffer,
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.size = CONFIG_LPUART6_TXBUFSIZE,
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.buffer = g_uart6txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart6priv,
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.ops = &g_uart_ops,
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.priv = &g_uart6priv,
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};
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#endif
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#ifdef CONFIG_IMXRT_LPUART7
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static struct imxrt_uart_s g_uart7priv =
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{
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.uartbase = IMXRT_LPUART7_BASE,
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.baud = CONFIG_LPUART7_BAUD,
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.irq = IMXRT_IRQ_LPUART7,
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.parity = CONFIG_LPUART7_PARITY,
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.bits = CONFIG_LPUART7_BITS,
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.stopbits2 = CONFIG_LPUART7_2STOP,
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.uartbase = IMXRT_LPUART7_BASE,
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.baud = CONFIG_LPUART7_BAUD,
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.irq = IMXRT_IRQ_LPUART7,
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.parity = CONFIG_LPUART7_PARITY,
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.bits = CONFIG_LPUART7_BITS,
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.stopbits2 = CONFIG_LPUART7_2STOP,
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};
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static struct uart_dev_s g_uart7port =
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{
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.recv =
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.recv =
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||||
{
|
||||
.size = CONFIG_LPUART7_RXBUFSIZE,
|
||||
.buffer = g_uart7rxbuffer,
|
||||
.size = CONFIG_LPUART7_RXBUFSIZE,
|
||||
.buffer = g_uart7rxbuffer,
|
||||
},
|
||||
.xmit =
|
||||
.xmit =
|
||||
{
|
||||
.size = CONFIG_LPUART7_TXBUFSIZE,
|
||||
.buffer = g_uart7txbuffer,
|
||||
.size = CONFIG_LPUART7_TXBUFSIZE,
|
||||
.buffer = g_uart7txbuffer,
|
||||
},
|
||||
.ops = &g_uart_ops,
|
||||
.priv = &g_uart7priv,
|
||||
.ops = &g_uart_ops,
|
||||
.priv = &g_uart7priv,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPUART8
|
||||
static struct imxrt_uart_s g_uart8priv =
|
||||
{
|
||||
.uartbase = IMXRT_LPUART8_BASE,
|
||||
.baud = CONFIG_LPUART8_BAUD,
|
||||
.irq = IMXRT_IRQ_LPUART8,
|
||||
.parity = CONFIG_LPUART8_PARITY,
|
||||
.bits = CONFIG_LPUART8_BITS,
|
||||
.stopbits2 = CONFIG_LPUART8_2STOP,
|
||||
.uartbase = IMXRT_LPUART8_BASE,
|
||||
.baud = CONFIG_LPUART8_BAUD,
|
||||
.irq = IMXRT_IRQ_LPUART8,
|
||||
.parity = CONFIG_LPUART8_PARITY,
|
||||
.bits = CONFIG_LPUART8_BITS,
|
||||
.stopbits2 = CONFIG_LPUART8_2STOP,
|
||||
};
|
||||
|
||||
static struct uart_dev_s g_uart8port =
|
||||
{
|
||||
.recv =
|
||||
.recv =
|
||||
{
|
||||
.size = CONFIG_LPUART8_RXBUFSIZE,
|
||||
.buffer = g_uart8rxbuffer,
|
||||
.size = CONFIG_LPUART8_RXBUFSIZE,
|
||||
.buffer = g_uart8rxbuffer,
|
||||
},
|
||||
.xmit =
|
||||
.xmit =
|
||||
{
|
||||
.size = CONFIG_LPUART8_TXBUFSIZE,
|
||||
.buffer = g_uart8txbuffer,
|
||||
.size = CONFIG_LPUART8_TXBUFSIZE,
|
||||
.buffer = g_uart8txbuffer,
|
||||
},
|
||||
.ops = &g_uart_ops,
|
||||
.priv = &g_uart8priv,
|
||||
.ops = &g_uart_ops,
|
||||
.priv = &g_uart8priv,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static struct pm_callback_s g_serial_pmcb =
|
||||
{
|
||||
.notify = up_pm_notify,
|
||||
.prepare = up_pm_prepare,
|
||||
.notify = up_pm_notify,
|
||||
.prepare = up_pm_prepare,
|
||||
};
|
||||
#endif
|
||||
|
||||
@ -695,9 +695,9 @@ static inline void imxrt_disableuartint(struct imxrt_uart_s *priv,
|
||||
uint32_t *ie)
|
||||
{
|
||||
irqstate_t flags;
|
||||
uint32_t regval = 0;
|
||||
uint32_t regval;
|
||||
|
||||
flags = enter_critical_section();
|
||||
flags = spin_lock_irqsave();
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET);
|
||||
|
||||
/* Return the current Rx and Tx interrupt state */
|
||||
@ -709,7 +709,7 @@ static inline void imxrt_disableuartint(struct imxrt_uart_s *priv,
|
||||
|
||||
regval &= ~LPUART_ALL_INTS;
|
||||
imxrt_serialout(priv, IMXRT_LPUART_CTRL_OFFSET, regval);
|
||||
leave_critical_section(flags);
|
||||
spin_unlock_irqrestore(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -719,14 +719,18 @@ static inline void imxrt_disableuartint(struct imxrt_uart_s *priv,
|
||||
static inline void imxrt_restoreuartint(struct imxrt_uart_s *priv,
|
||||
uint32_t ie)
|
||||
{
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
/* Enable/disable any interrupts that are currently disabled but should be
|
||||
* enabled/disabled.
|
||||
*/
|
||||
|
||||
uint32_t regval = 0;
|
||||
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET) | ie;
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET);
|
||||
regval &= ~LPUART_ALL_INTS;
|
||||
regval |= ie;
|
||||
imxrt_serialout(priv, IMXRT_LPUART_CTRL_OFFSET, regval);
|
||||
spin_unlock_irqrestore(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -857,9 +861,9 @@ static int imxrt_interrupt(int irq, void *context, FAR void *arg)
|
||||
DEBUGASSERT(dev != NULL && dev->priv != NULL);
|
||||
priv = (struct imxrt_uart_s *)dev->priv;
|
||||
|
||||
#if defined(CONFIG_PM) && CONFIG_PM_SERIAL_ACTIVITY > 0
|
||||
/* Report serial activity to the power management logic */
|
||||
|
||||
#if defined(CONFIG_PM) && CONFIG_PM_SERIAL_ACTIVITY > 0
|
||||
pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_SERIAL_ACTIVITY);
|
||||
#endif
|
||||
|
||||
@ -989,10 +993,12 @@ static int imxrt_receive(struct uart_dev_s *dev, uint32_t *status)
|
||||
static void imxrt_rxint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
|
||||
uint32_t regval = 0;
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
/* Enable interrupts for data available at Rx */
|
||||
|
||||
flags = spin_lock_irqsave();
|
||||
if (enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
@ -1001,11 +1007,14 @@ static void imxrt_rxint(struct uart_dev_s *dev, bool enable)
|
||||
}
|
||||
else
|
||||
{
|
||||
priv->ie &= ~ (LPUART_CTRL_RIE | LPUART_CTRL_FEIE | LPUART_CTRL_ORIE);
|
||||
priv->ie &= ~(LPUART_CTRL_RIE | LPUART_CTRL_FEIE | LPUART_CTRL_ORIE);
|
||||
}
|
||||
|
||||
regval = (imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET) & ~LPUART_ALL_INTS) | priv->ie;
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET);
|
||||
regval &= ~LPUART_ALL_INTS;
|
||||
regval |= priv->ie;
|
||||
imxrt_serialout(priv, IMXRT_LPUART_CTRL_OFFSET, regval);
|
||||
spin_unlock_irqrestore(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -1019,10 +1028,12 @@ static void imxrt_rxint(struct uart_dev_s *dev, bool enable)
|
||||
static bool imxrt_rxavailable(struct uart_dev_s *dev)
|
||||
{
|
||||
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
|
||||
uint32_t regval;
|
||||
|
||||
/* Return true is data is ready in the Rx FIFO */
|
||||
|
||||
return ((imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_RDRF) != 0);
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET);
|
||||
return ((regval & LPUART_STAT_RDRF) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -1050,10 +1061,12 @@ static void imxrt_send(struct uart_dev_s *dev, int ch)
|
||||
static void imxrt_txint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
|
||||
uint32_t regval = 0;
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
/* Enable interrupt for TX complete */
|
||||
|
||||
flags = spin_lock_irqsave();
|
||||
if (enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
@ -1065,8 +1078,11 @@ static void imxrt_txint(struct uart_dev_s *dev, bool enable)
|
||||
priv->ie &= ~LPUART_CTRL_TCIE;
|
||||
}
|
||||
|
||||
regval = (imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET) & ~LPUART_ALL_INTS) | priv->ie;
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_CTRL_OFFSET);
|
||||
regval &= ~LPUART_ALL_INTS;
|
||||
regval |= priv->ie;
|
||||
imxrt_serialout(priv, IMXRT_LPUART_CTRL_OFFSET, regval);
|
||||
spin_unlock_irqrestore(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -1080,8 +1096,10 @@ static void imxrt_txint(struct uart_dev_s *dev, bool enable)
|
||||
static bool imxrt_txready(struct uart_dev_s *dev)
|
||||
{
|
||||
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
|
||||
uint32_t regval;
|
||||
|
||||
return ((imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_TC) != 0);
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET);
|
||||
return ((regval & LPUART_STAT_TC) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -1095,8 +1113,10 @@ static bool imxrt_txready(struct uart_dev_s *dev)
|
||||
static bool imxrt_txempty(struct uart_dev_s *dev)
|
||||
{
|
||||
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
|
||||
uint32_t regval;
|
||||
|
||||
return ((imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) != 0);
|
||||
regval = imxrt_serialin(priv, IMXRT_LPUART_STAT_OFFSET);
|
||||
return ((regval & LPUART_STAT_TDRE) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
# CONFIG_NSH_DISABLE_IFCONFIG is not set
|
||||
# CONFIG_NSH_DISABLE_PS is not set
|
||||
CONFIG_ARCH_BOARD_IMXRT1050_EVK=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="imxrt1050-evk"
|
||||
CONFIG_ARCH_BOARD_IMXRT1050_EVK=y
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052DVL6A=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=20000
|
||||
CONFIG_EXAMPLES_NSH=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
@ -16,6 +16,7 @@ CONFIG_MAX_TASKS=16
|
||||
CONFIG_MAX_WDOGPARMS=2
|
||||
CONFIG_NFILE_DESCRIPTORS=8
|
||||
CONFIG_NFILE_STREAMS=8
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
|
||||
Loading…
Reference in New Issue
Block a user