Add a framework for an ADC test
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4180 42af7a65-404d-4744-a932-0658087f49c3
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@ -401,7 +401,7 @@
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/* ADC watchdog low threshold register */
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#define ADC_LTR_SHIFT (0) /* Bits 11:0: Analog watchdog low threshold */
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#define ADC_LTR_SHIFT (0) /* Bits 11-0: Analog watchdog low threshold */
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#define ADC_LTR_MASK (0x0fff << ADC_LTR_SHIFT)
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/* ADC regular sequence register 1 */
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@ -414,12 +414,12 @@
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#define ADC_SQR1_SQ15_MASK (0x1f << ADC_SQR1_SQ15_SHIFT)
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#define ADC_SQR1_SQ16_SHIFT (15) /* Bits 19-15: 16th conversion in regular sequence */
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#define ADC_SQR1_SQ16_MASK (0x1f << ADC_SQR1_SQ16_SHIFT)
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#define ADC_SQR1_L_SHIFT (20) /* Bits 23:20 L[3:0]: Regular channel sequence length */
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#define ADC_SQR1_L_SHIFT (20) /* Bits 23-20: Regular channel sequence length */
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#define ADC_SQR1_L_MASK (0x0f << ADC_SQR1_L_SHIFT)
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/* ADC regular sequence register 2 */
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#define ADC_SQR1_SQ7_SHIFT (0) /* Bits 4-0: 7th conversion in regular sequence */
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#define ADC_SQR2_SQ7_SHIFT (0) /* Bits 4-0: 7th conversion in regular sequence */
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#define ADC_SQR2_SQ7_MASK (0x1f << ADC_SQR2_SQ7_SHIFT)
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#define ADC_SQR2_SQ8_SHIFT (5) /* Bits 9-5: 8th conversion in regular sequence */
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#define ADC_SQR2_SQ8_MASK (0x1f << ADC_SQR2_SQ8_SHIFT)
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@ -427,9 +427,9 @@
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#define ADC_SQR2_SQ9_MASK (0x1f << ADC_SQR2_SQ9_SHIFT)
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#define ADC_SQR2_SQ10_SHIFT (15) /* Bits 19-15: 10th conversion in regular sequence */
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#define ADC_SQR2_SQ10_MASK (0x1f << ADC_SQR2_SQ10_SHIFT)
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#define ADC_SQR2_SQ11_SHIFT (20) /* Bits 24:20: 11th conversion in regular sequence */
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#define ADC_SQR2_SQ11_SHIFT (20) /* Bits 24-20: 11th conversion in regular sequence */
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#define ADC_SQR2_SQ11_MASK (0x1f << ADC_SQR2_SQ11_SHIFT )
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#define ADC_SQR2_SQ12_SHIFT (25) /* Bits 29:25: 12th conversion in regular sequence */
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#define ADC_SQR2_SQ12_SHIFT (25) /* Bits 29-25: 12th conversion in regular sequence */
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#define ADC_SQR2_SQ12_MASK (0x1f << ADC_SQR2_SQ12_SHIFT)
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/* ADC regular sequence register 3 */
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@ -442,22 +442,22 @@
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#define ADC_SQR3_SQ3_MASK (0x1f << ADC_SQR3_SQ3_SHIFT)
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#define ADC_SQR3_SQ4_SHIFT (15) /* Bits 19-15: 4th conversion in regular sequence */
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#define ADC_SQR3_SQ4_MASK (0x1f << ADC_SQR3_SQ4_SHIFT)
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#define ADC_SQR3_SQ5_SHIFT (20) /* Bits 24:20: 5th conversion in regular sequence */
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#define ADC_SQR3_SQ5_SHIFT (20) /* Bits 24-20: 5th conversion in regular sequence */
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#define ADC_SQR3_SQ5_MASK (0x1f << ADC_SQR3_SQ5_SHIFT )
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#define ADC_SQR3_SQ6_SHIFT (25) /* Bits 29:25: 6th conversion in regular sequence */
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#define ADC_SQR3_SQ6_SHIFT (25) /* Bits 29-25: 6th conversion in regular sequence */
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#define ADC_SQR3_SQ6_MASK (0x1f << ADC_SQR3_SQ6_SHIFT)
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/* ADC injected sequence register */
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#define ADC_JSQR_JSQ1_SHIFT (0) /* Bits 4:0 JSQ1[4:0]: 1st conversion in injected sequence */
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#define ADC_JSQR_JSQ1_SHIFT (0) /* Bits 4-0: 1st conversion in injected sequence */
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#define ADC_JSQR_JSQ1_MASK (0x1f << ADC_JSQR_JSQ1_SHIFT)
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#define ADC_JSQR_JSQ2_SHIFT (5) /* Bits 9:5 JSQ2[4:0]: 2nd conversion in injected sequence */
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#define ADC_JSQR_JSQ2_SHIFT (5) /* Bits 9-5: 2nd conversion in injected sequence */
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#define ADC_JSQR_JSQ2_MASK (0x1f << ADC_JSQR_JSQ2_MASK)
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#define ADC_JSQR_JSQ3_SHIFT (10) /* Bits 14:10 JSQ3[4:0]: 3rd conversion in injected sequence */
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#define ADC_JSQR_JSQ3_SHIFT (10) /* Bits 14-10: 3rd conversion in injected sequence */
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#define ADC_JSQR_JSQ3_MASK (0x1f << ADC_JSQR_JSQ3_SHIFT)
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#define ADC_JSQR_JSQ4_SHIFT (15) /* Bits 19:15 JSQ4[4:0]: 4th conversion in injected sequence */
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#define ADC_JSQR_JSQ4_SHIFT (15) /* Bits 19-15: 4th conversion in injected sequence */
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#define ADC_JSQR_JSQ4_MASK (0x1f << ADC_JSQR_JSQ4_SHIFT)
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#define ADC_JSQR_JL_SHIFT (20) /* Bits 21:20 JL[1:0]: Injected Sequence length */
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#define ADC_JSQR_JL_SHIFT (20) /* Bits 21-20: Injected Sequence length */
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#define ADC_JSQR_JL_MASK (3 << ADC_JSQR_JL_SHIFT)
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/* ADC injected data register 1-4 */
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@ -467,9 +467,9 @@
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/* ADC regular data register */
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#define ADC_DR_DATA_SHIFT (0) /* Bits 15:0 Regular data */
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#define ADC_DR_DATA_SHIFT (0) /* Bits 15-0 Regular data */
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#define ADC_DR_DATA_MASK (0xffff << ADC_DR_DATA_SHIFT)
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#define ADC_DR_ADC2DATA_SHIFT (16) /* Bits 31:16: ADC2 data */
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#define ADC_DR_ADC2DATA_SHIFT (16) /* Bits 31-16: ADC2 data */
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#define ADC_DR_ADC2DATA_MASK (0xffff << ADC_DR_ADC2DATA_SHIFT)
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/* Common status register */
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@ -52,6 +52,10 @@ ifeq ($(CONFIG_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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ifeq ($(CONFIG_ADC),y)
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CSRCS += up_adc.c
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endif
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ifeq ($(CONFIG_USBSTRG),y)
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CSRCS += up_usbstrg.c
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endif
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111
configs/stm3210e-eval/src/up_adc.c
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111
configs/stm3210e-eval/src/up_adc.c
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@ -0,0 +1,111 @@
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/************************************************************************************
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* configs/stm3210e-eval/src/up_adc.c
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* arch/arm/src/board/up_adc.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/analog/adc.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "stm3210e-internal.h"
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#ifdef CONFIG_ADC
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Configuration ************************************************************/
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/* Up to 3 ADC interfaces are supported */
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#if STM32_NADC < 3
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# undef CONFIG_STM32_ADC3
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#endif
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#if STM32_NADC < 2
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# undef CONFIG_STM32_ADC2
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#endif
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#if STM32_NADC < 1
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# undef CONFIG_STM32_ADC1
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#endif
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#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_boardinitialize
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*
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* Description:
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* All STM32 architectures must provide the following entry point. This entry point
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* is called early in the intitialization -- after all memory has been configured
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* and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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void adc_devinit(void)
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{
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struct adc_dev_s *adc;
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int ret;
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/* Call stm32_adcinitialize() to get an instance of the ADC interface */
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#warning "Missing Logic"
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/* Register the ADC driver at "/dev/adc0" */
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ret = adc_register("/dev/adc0", adc);
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if (ret < 0)
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{
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adbg("adc_register failed: %d\n", ret);
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}
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}
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#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
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#endif /* CONFIG_ADC */
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@ -42,6 +42,10 @@ AOBJS = $(ASRCS:.S=$(OBJEXT))
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CSRCS = up_boot.c up_leds.c up_buttons.c up_spi.c
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ifeq ($(CONFIG_ADC),y)
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CSRCS += up_adc.c
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endif
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COBJS = $(CSRCS:.c=$(OBJEXT))
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SRCS = $(ASRCS) $(CSRCS)
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111
configs/stm3240g-eval/src/up_adc.c
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111
configs/stm3240g-eval/src/up_adc.c
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@ -0,0 +1,111 @@
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/************************************************************************************
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* configs/stm3240g-eval/src/up_adc.c
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* arch/arm/src/board/up_adc.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/analog/adc.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "stm3240g-internal.h"
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#ifdef CONFIG_ADC
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Configuration ************************************************************/
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/* Up to 3 ADC interfaces are supported */
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#if STM32_NADC < 3
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# undef CONFIG_STM32_ADC3
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#endif
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#if STM32_NADC < 2
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# undef CONFIG_STM32_ADC2
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#endif
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#if STM32_NADC < 1
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# undef CONFIG_STM32_ADC1
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#endif
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#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_boardinitialize
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*
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* Description:
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* All STM32 architectures must provide the following entry point. This entry point
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* is called early in the intitialization -- after all memory has been configured
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* and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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void adc_devinit(void)
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{
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struct adc_dev_s *adc;
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int ret;
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/* Call stm32_adcinitialize() to get an instance of the ADC interface */
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#warning "Missing Logic"
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/* Register the ADC driver at "/dev/adc0" */
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ret = adc_register("/dev/adc0", adc);
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if (ret < 0)
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{
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adbg("adc_register failed: %d\n", ret);
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}
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}
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#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
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#endif /* CONFIG_ADC */
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