diff --git a/arch/arm/include/tiva/chip.h b/arch/arm/include/tiva/chip.h index bef035384b..43268d210d 100644 --- a/arch/arm/include/tiva/chip.h +++ b/arch/arm/include/tiva/chip.h @@ -248,7 +248,7 @@ # define TIVA_NAES 0 /* No AES module */ # define TIVA_NDES 0 /* No DES module */ # define TIVA_NHASH 0 /* No SHA1/MD5 hash module */ -#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#elif defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) # undef LM3S /* Not LM3S family */ # undef LM4F /* Not LM4F family */ # define TM4C 1 /* TM4C family */ diff --git a/arch/arm/include/tiva/tm4c_irq.h b/arch/arm/include/tiva/tm4c_irq.h index 367bd97733..adf2b69770 100644 --- a/arch/arm/include/tiva/tm4c_irq.h +++ b/arch/arm/include/tiva/tm4c_irq.h @@ -497,7 +497,7 @@ # define NR_IRQS (130) /* (Really fewer because of reserved vectors) */ -#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#elif defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) # define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */ # define TIVA_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */ # define TIVA_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */ diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig index bbbc58102b..12e8970121 100644 --- a/arch/arm/src/tiva/Kconfig +++ b/arch/arm/src/tiva/Kconfig @@ -106,8 +106,8 @@ config ARCH_CHIP_TM4C123GH6PM select TIVA_HAVE_ADC0 select TIVA_HAVE_ADC1 -config ARCH_CHIP_TM4C1294NC - bool "TM4C1294NC" +config ARCH_CHIP_TM4C1294NCPDT + bool "TM4C1294NCPDT" depends on ARCH_CHIP_TIVA select ARCH_CHIP_TM4C select ARCH_CHIP_TM4C129 diff --git a/arch/arm/src/tiva/common/tiva_flash.c b/arch/arm/src/tiva/common/tiva_flash.c index 01440fc14b..5b0256c739 100644 --- a/arch/arm/src/tiva/common/tiva_flash.c +++ b/arch/arm/src/tiva/common/tiva_flash.c @@ -296,7 +296,7 @@ static ssize_t tiva_write(FAR struct mtd_dev_s *dev, off_t offset, nbytes &= ~3; remaining = nbytes; -#if defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#if defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) while (remaining > 0) { /* Set the address of this block of words. */ diff --git a/arch/arm/src/tiva/common/tiva_pwm.c b/arch/arm/src/tiva/common/tiva_pwm.c index 38e91db388..e2526872ab 100644 --- a/arch/arm/src/tiva/common/tiva_pwm.c +++ b/arch/arm/src/tiva/common/tiva_pwm.c @@ -435,7 +435,7 @@ static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev) pwminfo("setup PWM for channel %d\n", chan->channel_id); /* Enable GPIO port, GPIO pin type and GPIO alternate function (refer to - * TM4C1294NC 23.4.2-4) + * TM4C1294NCPDT 23.4.2-4) */ int ret = tiva_configgpio(g_pwm_pinset[chan->channel_id]); @@ -587,7 +587,7 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan, pwminfo("> frequency = %d\n", frequency); pwminfo("> duty = %d\n", duty); - /* Configure PWM countdown mode (refer to TM4C1294NC 23.4.6) */ + /* Configure PWM countdown mode (refer to TM4C1294NCPDT 23.4.6) */ tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, 0); if (chan->channel_id % 2 == 0) @@ -603,7 +603,7 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan, GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD); } - /* Set the PWM period (refer to TM4C1294NC 23.4.7) */ + /* Set the PWM period (refer to TM4C1294NCPDT 23.4.7) */ uint32_t pwm_min_freq = (uint32_t)(g_pwm_freq / g_pwm_counter) + 1; uint32_t pwm_max_freq = g_pwm_freq; @@ -620,7 +620,7 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan, tiva_pwm_putreg(chan, TIVA_PWMn_LOAD_OFFSET, load - 1); - /* Configure PWM duty (refer to TM4C1294NC 23.4.8-9) + /* Configure PWM duty (refer to TM4C1294NCPDT 23.4.8-9) * * Workaround: * When comp equals to load, the signal is never pulled down, @@ -640,11 +640,11 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan, tiva_pwm_putreg(chan, TIVA_PWMn_CMPB_OFFSET, comp - 1); } - /* Enable the PWM generator (refer to TM4C1294NC 23.4.10) */ + /* Enable the PWM generator (refer to TM4C1294NCPDT 23.4.10) */ tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_ENABLE << TIVA_PWMn_CTL_ENABLE); - /* Enable PWM channel (refer to TM4C1294NC 23.4.11) */ + /* Enable PWM channel (refer to TM4C1294NCPDT 23.4.11) */ uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_ENABLE_OFFSET); enable |= (1 << chan->channel_id); @@ -803,15 +803,15 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel) pwminfo("> generator_id = %d\n", chan->generator_id); pwminfo("> generator_base = %08x\n", chan->generator_base); - /* Enable PWM controller (refer to TM4C1294NC 23.4.1) */ + /* Enable PWM controller (refer to TM4C1294NCPDT 23.4.1) */ assert(chan->controller_id == 0); tiva_pwm_enablepwr(chan->controller_id); tiva_pwm_enableclk(chan->controller_id); - /* Configure PWM Clock Configuration (refer to TM4C1294NC 23.4.5) + /* Configure PWM Clock Configuration (refer to TM4C1294NCPDT 23.4.5) * - * On TM4C1294NC, configure the PWM clock source as 1.875MHz (the system + * On TM4C1294NCPDT, configure the PWM clock source as 1.875MHz (the system * clock 120MHz divided by 64) * * TODO: need an algorithm to choose the best divider and load value combo. diff --git a/arch/arm/src/tiva/common/tiva_qencoder.c b/arch/arm/src/tiva/common/tiva_qencoder.c index b3a9072b0a..e80f83aebd 100644 --- a/arch/arm/src/tiva/common/tiva_qencoder.c +++ b/arch/arm/src/tiva/common/tiva_qencoder.c @@ -239,7 +239,7 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower) ctlreg |= VELDIV_1 << TIVA_QEI_CTL_VELDIV; tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg); - /* Set period load (10ms for TM4C1294NC) */ + /* Set period load (10ms for TM4C1294NCPDT) */ tiva_qe_putreg(qe, TIVA_QEI_LOAD_OFFSET, 1200000); diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h index 3637d627ee..b960775472 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h @@ -52,7 +52,7 @@ ************************************************************************************/ /* FLASH dimensions ****************************************************************/ -#if defined(CONFIG_ARCH_CHIP_TM4C129XNC) || defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#if defined(CONFIG_ARCH_CHIP_TM4C129XNC) || defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) /* For the TM4C129X family, the Flash memory is configured in groups of four banks * four banks of 16K x 128 bits (4 * 256 KB total) which are two-way interleaved. diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h index 03ed972869..2df7f887a7 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h @@ -91,7 +91,7 @@ # define TIVA_TPIU_BASE 0xe0040000 /* -0xe0040fff: Trace Port Interface Unit */ # define TIVA_ETM_BASE 0xe0041000 /* -0xe0041fff: Embedded Trace Macrocell */ /* -0xffffffff: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC) || defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC) || defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) # define TIVA_FLASH_BASE 0x00000000 /* -0x000fffff: On-chip FLASH */ /* -0x01ffffff: Reserved */ # define TIVA_ROM_BASE 0x02000000 /* -0x02ffffff: On-chip ROM (16 MB) */ @@ -389,7 +389,7 @@ /* -0x53fff: Reserved */ # define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY */ /* -0xfffff: Reserved */ -#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#elif defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) /* Peripheral region 1 */ # define TIVA_WDOG0_BASE (TIVA_PERIPH1_BASE + 0x00000) /* -0x00fff: Watchdog Timer 0 */ # define TIVA_WDOG1_BASE (TIVA_PERIPH1_BASE + 0x01000) /* -0x00fff: Watchdog Timer 1 */ diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h index 243d3af32f..9fa90041b5 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h @@ -1091,7 +1091,7 @@ # define GPIO_RTC_CLK_2 (GPIO_FUNC_PFIO | GPIO_ALT_7 | GPIO_PORTC | GPIO_PIN_5) # define GPIO_RTC_CLK_3 (GPIO_FUNC_PFIO | GPIO_ALT_7 | GPIO_PORTP | GPIO_PIN_3) -#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC) +#elif defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT) # define GPIO_ADC_AIN0 (GPIO_FUNC_ANINPUT | GPIO_PORTE | GPIO_PIN_3) # define GPIO_ADC_AIN1 (GPIO_FUNC_ANINPUT | GPIO_PORTE | GPIO_PIN_2) # define GPIO_ADC_AIN2 (GPIO_FUNC_ANINPUT | GPIO_PORTE | GPIO_PIN_1) diff --git a/configs/Kconfig b/configs/Kconfig index ace264694b..775b4b8b42 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -1627,7 +1627,7 @@ config ARCH_BOARD_TM4C123G_LAUNCHPAD config ARCH_BOARD_TM4C1294_LAUNCHPAD bool "Tiva EK-TM4C1294XL LaunchPad" - depends on ARCH_CHIP_TM4C1294NC + depends on ARCH_CHIP_TM4C1294NCPDT select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig index 4a6c8c4c29..cfca6d1662 100644 --- a/configs/tm4c1294-launchpad/ipv6/defconfig +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -14,7 +14,7 @@ CONFIG_ARCH_BOARD="tm4c1294-launchpad" CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y CONFIG_ARCH_BUTTONS=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C1294NC=y +CONFIG_ARCH_CHIP_TM4C1294NCPDT=y CONFIG_ARCH_CHIP_TM4C129=y CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_STACKDUMP=y diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig index 80f94b7b72..490e132eff 100644 --- a/configs/tm4c1294-launchpad/nsh/defconfig +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -12,7 +12,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="tm4c1294-launchpad" CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C1294NC=y +CONFIG_ARCH_CHIP_TM4C1294NCPDT=y CONFIG_ARCH_CHIP_TM4C129=y CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_STACKDUMP=y