diff --git a/arch/arm/src/sama5/chip/sam_mpddrc.h b/arch/arm/src/sama5/chip/sam_mpddrc.h
index d67c5ca2cc..1778f2f4de 100644
--- a/arch/arm/src/sama5/chip/sam_mpddrc.h
+++ b/arch/arm/src/sama5/chip/sam_mpddrc.h
@@ -353,8 +353,8 @@
 #  define MPDDRC_DLL_MOR_CLK90OFF(n)    ((n) << MPDDRC_DLL_MOR_CLK90OFF_SHIFT)
 #define MPDDRC_DLL_MOR_SELOFF           (1 << 16) /* Bit 16: DLL Offset Selection */
 #define MPDDRC_DLL_MOR_KEY_SHIFT        (24)      /* Bits 24-31: DLL CLK90 Delay Line Offset (REVISIT) */
-#define MPDDRC_DLL_MOR_KEY_MASK         (0xff << MPDDRC_DLL_MOR_CLK90OFF_SHIFT)
-#  define MPDDRC_DLL_MOR_KEY            (0xc5 << MPDDRC_DLL_MOR_CLK90OFF_SHIFT)
+#define MPDDRC_DLL_MOR_KEY_MASK         (0xff << MPDDRC_DLL_MOR_KEY_SHIFT)
+#  define MPDDRC_DLL_MOR_KEY            (0xc5 << MPDDRC_DLL_MOR_KEY_SHIFT)
 
 /* MPDDRC DLL Slave Offset Register */
 
diff --git a/arch/arm/src/sama5/chip/sam_pmc.h b/arch/arm/src/sama5/chip/sam_pmc.h
index c1e801d84f..92d1701a68 100644
--- a/arch/arm/src/sama5/chip/sam_pmc.h
+++ b/arch/arm/src/sama5/chip/sam_pmc.h
@@ -128,7 +128,7 @@
  * Clock Status Register common bit-field definitions
  */
 
-#define PMC_PCK                        (1 << 2)  /* Bit 2:  Processor Clock */
+#define PMC_PCK                        (1 << 0)  /* Bit 0:  Processor Clock */
 #define PMC_DDRCK                      (1 << 2)  /* Bit 2:  DDR Clock */
 #define PMC_LCDCK                      (1 << 3)  /* Bit 3:  LCD2x Clock */
 #define PMC_SMDCK                      (1 << 4)  /* Bit 4:  SMD Clock */