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drivers/sensors/as5048b: fix lower half init issue

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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko 2022-01-02 21:54:05 +02:00 committed by Xiang Xiao
parent d2309195da
commit c7d3a674fd
9 changed files with 46 additions and 40 deletions
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8
arch/arm/src/imxrt/imxrt_enc.c
View File

@ -300,10 +300,9 @@ static inline void imxrt_enc_modifyreg16
static void imxrt_enc_clock_enable (uint32_t base);
static void imxrt_enc_clock_disable (uint32_t base);
static inline int imxrt_enc_sem_wait(
FAR struct imxrt_enc_lowerhalf_s *priv);
static inline void imxrt_enc_sem_post(
FAR struct imxrt_enc_lowerhalf_s *priv);
static inline int imxrt_enc_sem_wait(FAR struct imxrt_enc_lowerhalf_s *priv);
static inline void imxrt_enc_sem_post
(FAR struct imxrt_enc_lowerhalf_s *priv);
static int imxrt_enc_reconfig(FAR struct imxrt_enc_lowerhalf_s *priv,
uint16_t args);
@ -341,6 +340,7 @@ static const struct qe_ops_s g_qecallbacks =
.position = imxrt_position,
.setposmax = NULL, /* not supported yet */
.reset = imxrt_reset,
.setindex = NULL, /* not supported yet */
.ioctl = imxrt_ioctl,
};

4
arch/arm/src/sam34/sam4cm_tc.c
View File

@ -476,7 +476,7 @@ static bool sam_checkreg(struct sam_chan_s *chan, bool wr, uint32_t regaddr,
* Name: sam_chan_getreg
*
* Description:
* Read an SPI register
* Read an TC register
*
****************************************************************************/
@ -500,7 +500,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
* Name: sam_chan_putreg
*
* Description:
* Write a value to an SPI register
* Write a value to an TC register
*
****************************************************************************/

8
arch/arm/src/sama5/sam_tc.c
View File

@ -587,7 +587,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
* Name: sam_tc_getreg
*
* Description:
* Read an SPI register
* Read an TC register
*
****************************************************************************/
@ -612,7 +612,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
* Name: sam_tc_putreg
*
* Description:
* Write a value to an SPI register
* Write a value to an TC register
*
****************************************************************************/
@ -636,7 +636,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
* Name: sam_chan_getreg
*
* Description:
* Read an SPI register
* Read an TC channel register
*
****************************************************************************/
@ -660,7 +660,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
* Name: sam_chan_putreg
*
* Description:
* Write a value to an SPI register
* Write a value to an TC channel register
*
****************************************************************************/

8
arch/arm/src/samv7/sam_tc.c
View File

@ -737,7 +737,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
* Name: sam_tc_getreg
*
* Description:
* Read an SPI register
* Read an TC register
*
****************************************************************************/
@ -762,7 +762,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
* Name: sam_tc_putreg
*
* Description:
* Write a value to an SPI register
* Write a value to an TC register
*
****************************************************************************/
@ -786,7 +786,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
* Name: sam_chan_getreg
*
* Description:
* Read an SPI register
* Read an TC channel register
*
****************************************************************************/
@ -810,7 +810,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
* Name: sam_chan_putreg
*
* Description:
* Write a value to an SPI register
* Write a value to an TC channel register
*
****************************************************************************/

1
arch/arm/src/stm32f7/stm32_qencoder.c
View File

@ -268,6 +268,7 @@ static const struct qe_ops_s g_qecallbacks =
.position = stm32_position,
.setposmax = NULL, /* not supported yet */
.reset = stm32_reset,
.setindex = NULL, /* not supported yet */
.ioctl = stm32_ioctl,
};

1
arch/arm/src/stm32h7/stm32_qencoder.c
View File

@ -268,6 +268,7 @@ static const struct qe_ops_s g_qecallbacks =
.position = stm32_position,
.setposmax = NULL, /* not supported yet */
.reset = stm32_reset,
.setindex = NULL, /* not supported yet */
.ioctl = stm32_ioctl,
};

5
arch/arm/src/stm32l4/stm32l4_qencoder.c
View File

@ -247,8 +247,8 @@ static int stm32l4_shutdown(FAR struct qe_lowerhalf_s *lower);
static int stm32l4_position(FAR struct qe_lowerhalf_s *lower,
FAR int32_t *pos);
static int stm32l4_reset(FAR struct qe_lowerhalf_s *lower);
static int stm32l4_ioctl(FAR struct qe_lowerhalf_s *lower,
int cmd, unsigned long arg);
static int stm32l4_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
unsigned long arg);
/****************************************************************************
* Private Data
@ -263,6 +263,7 @@ static const struct qe_ops_s g_qecallbacks =
.position = stm32l4_position,
.setposmax = NULL, /* not supported yet */
.reset = stm32l4_reset,
.setindex = NULL, /* not supported yet */
.ioctl = stm32l4_ioctl,
};

1
arch/arm/src/tiva/common/tiva_qencoder.c
View File

@ -112,6 +112,7 @@ static const struct qe_ops_s g_qe_ops =
.position = tiva_qe_position,
.setposmax = NULL, /* not supported yet */
.reset = tiva_qe_reset,
.setindex = NULL, /* not supported yet */
.ioctl = tiva_qe_ioctl,
};

12
drivers/sensors/as5048b.c
View File

@ -91,11 +91,13 @@ static int as5048b_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
static const struct qe_ops_s g_qeops =
{
as5048b_setup,
as5048b_shutdown,
as5048b_position,
as5048b_reset,
as5048b_ioctl
.setup = as5048b_setup,
.shutdown = as5048b_shutdown,
.position = as5048b_position,
.setposmax = NULL, /* not supported yet */
.reset = as5048b_reset,
.setindex = NULL, /* not supported yet */
.ioctl = as5048b_ioctl
};
/****************************************************************************