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stm32f0l0g0/SPI: enable SPI for STM32G0

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This commit is contained in:
raiden00pl 2022-07-15 11:51:02 +02:00 committed by Gustavo Henrique Nihei
parent f702c89c33
commit c7e6366e91
3 changed files with 18 additions and 3 deletions
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3
arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
View File

@ -536,6 +536,9 @@
# define DMACHAN_USART5_TX_1 DMACHAN_SETTING(STM32_DMA1_CHAN7, 13)
# define DMACHAN_USART5_TX_2 DMACHAN_SETTING(STM32_DMA1_CHAN3, 13)
#elif defined(CONFIG_ARCH_CHIP_STM32G0)
/* This family uses a DMAMUX */
#else
# error "Unknown DMA channel assignments"
#endif

2
arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
View File

@ -30,7 +30,7 @@
/* Select STM32 SPI IP core */
#if defined(CONFIG_STM32F0L0G0_STM32F0)
#if defined(CONFIG_STM32F0L0G0_STM32F0) || defined(CONFIG_STM32F0L0G0_STM32G0)
# define HAVE_IP_SPI_V2
#elif defined(CONFIG_STM32F0L0G0_STM32L0)
# define HAVE_IP_SPI_V1

16
arch/arm/src/stm32f0l0g0/stm32_spi.c
View File

@ -126,6 +126,18 @@
#define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR)
#define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR)
/* SPI clocks */
#if defined(CONFIG_STM32F0L0G0_STM32F0) || defined(CONFIG_STM32F0L0G0_STM32L0)
# define SPI1_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
# define SPI2_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
#elif defined(CONFIG_STM32F0L0G0_STM32G0)
# define SPI1_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
# define SPI2_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
#else
# error Unsupported family
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -281,7 +293,7 @@ static struct stm32_spidev_s g_spi1dev =
&g_spi1ops
},
.spibase = STM32_SPI1_BASE,
.spiclock = STM32_PCLK2_FREQUENCY,
.spiclock = SPI1_PCLK_FREQUENCY,
#ifdef CONFIG_STM32F0L0G0_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI1,
#endif
@ -336,7 +348,7 @@ static struct stm32_spidev_s g_spi2dev =
&g_spi2ops
},
.spibase = STM32_SPI2_BASE,
.spiclock = STM32_PCLK1_FREQUENCY,
.spiclock = SPI1_PCLK_FREQUENCY,
#ifdef CONFIG_STM32F0L0G0_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI2,
#endif